1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21c4ddbbe1SDaniel Beauregard 22c4ddbbe1SDaniel Beauregard /* 23c4ddbbe1SDaniel Beauregard * Copyright 2009 QLogic Corporation. All rights reserved. 24c4ddbbe1SDaniel Beauregard * Use is subject to license terms. 25c4ddbbe1SDaniel Beauregard */ 26c4ddbbe1SDaniel Beauregard 27fcf3ce44SJohn Forte /* 28*3fb517f7SJames Moore * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved. 29fcf3ce44SJohn Forte */ 30c4ddbbe1SDaniel Beauregard 31fcf3ce44SJohn Forte #ifndef _QLT_H 32fcf3ce44SJohn Forte #define _QLT_H 33fcf3ce44SJohn Forte 34fcf3ce44SJohn Forte #include <stmf_defines.h> 35fcf3ce44SJohn Forte #include <qlt_regs.h> 36fcf3ce44SJohn Forte 37fcf3ce44SJohn Forte #ifdef __cplusplus 38fcf3ce44SJohn Forte extern "C" { 39fcf3ce44SJohn Forte #endif 40fcf3ce44SJohn Forte 41fcf3ce44SJohn Forte /* 42fcf3ce44SJohn Forte * Qlogic logging 43fcf3ce44SJohn Forte */ 44fcf3ce44SJohn Forte extern int enable_extended_logging; 45fcf3ce44SJohn Forte 46fcf3ce44SJohn Forte /* 47fcf3ce44SJohn Forte * Caution: 1) LOG will be available in debug/non-debug mode 48fcf3ce44SJohn Forte * 2) Anything which can potentially flood the log should be under 49fcf3ce44SJohn Forte * extended logging, and use QLT_EXT_LOG. 50fcf3ce44SJohn Forte * 3) Don't use QLT_EXT_LOG in performance-critical code path, such 51fcf3ce44SJohn Forte * as normal SCSI I/O code path. It could hurt system performance. 52fcf3ce44SJohn Forte * 4) Use kmdb to change enable_extened_logging in the fly to adjust 53fcf3ce44SJohn Forte * tracing 54fcf3ce44SJohn Forte */ 55fcf3ce44SJohn Forte #define QLT_EXT_LOG(log_ident, ...) \ 56fcf3ce44SJohn Forte if (enable_extended_logging) { \ 57fcf3ce44SJohn Forte stmf_trace(log_ident, __VA_ARGS__); \ 58fcf3ce44SJohn Forte } 59fcf3ce44SJohn Forte 60fcf3ce44SJohn Forte #define QLT_LOG(log_ident, ...) \ 61fcf3ce44SJohn Forte stmf_trace(log_ident, __VA_ARGS__) 62fcf3ce44SJohn Forte 63fcf3ce44SJohn Forte /* 64fcf3ce44SJohn Forte * Error codes. FSC stands for Failure sub code. 65fcf3ce44SJohn Forte */ 66fcf3ce44SJohn Forte #define QLT_FAILURE FCT_FCA_FAILURE 67fcf3ce44SJohn Forte #define QLT_SUCCESS FCT_SUCCESS 68fcf3ce44SJohn Forte #define QLT_FSC(x) ((uint64_t)(x) << 40) 69fcf3ce44SJohn Forte #define QLT_DMA_STUCK (QLT_FAILURE | QLT_FSC(1)) 70fcf3ce44SJohn Forte #define QLT_MAILBOX_STUCK (QLT_FAILURE | QLT_FSC(2)) 71fcf3ce44SJohn Forte #define QLT_ROM_STUCK (QLT_FAILURE | QLT_FSC(3)) 72fcf3ce44SJohn Forte #define QLT_UNEXPECTED_RESPONSE (QLT_FAILURE | QLT_FSC(4)) 73fcf3ce44SJohn Forte #define QLT_MBOX_FAILED (QLT_FAILURE | QLT_FSC(5)) 74fcf3ce44SJohn Forte #define QLT_MBOX_NOT_INITIALIZED (QLT_FAILURE | QLT_FSC(6)) 75fcf3ce44SJohn Forte #define QLT_MBOX_BUSY (QLT_FAILURE | QLT_FSC(7)) 76fcf3ce44SJohn Forte #define QLT_MBOX_ABORTED (QLT_FAILURE | QLT_FSC(8)) 77fcf3ce44SJohn Forte #define QLT_MBOX_TIMEOUT (QLT_FAILURE | QLT_FSC(9)) 78fcf3ce44SJohn Forte #define QLT_RESP_TIMEOUT (QLT_FAILURE | QLT_FSC(10)) 79fcf3ce44SJohn Forte #define QLT_FLASH_TIMEOUT (QLT_FAILURE | QLT_FSC(11)) 80fcf3ce44SJohn Forte #define QLT_FLASH_ACCESS_ERROR (QLT_FAILURE | QLT_FSC(12)) 81fcf3ce44SJohn Forte #define QLT_BAD_NVRAM_DATA (QLT_FAILURE | QLT_FSC(13)) 82fcf3ce44SJohn Forte #define QLT_FIRMWARE_ERROR_CODE (QLT_FAILURE | QLT_FSC(14)) 83fcf3ce44SJohn Forte 84fcf3ce44SJohn Forte #define QLT_FIRMWARE_ERROR(s, c1, c2) (QLT_FIRMWARE_ERROR_CODE | \ 85fcf3ce44SJohn Forte (((uint64_t)s) << 32) | (((uint64_t)c1) << 24) | ((uint64_t)c2)) 86fcf3ce44SJohn Forte 87fcf3ce44SJohn Forte extern uint32_t fw2400_code01[]; 88fcf3ce44SJohn Forte extern uint32_t fw2400_length01; 89fcf3ce44SJohn Forte extern uint32_t fw2400_addr01; 90fcf3ce44SJohn Forte extern uint32_t fw2400_code02[]; 91fcf3ce44SJohn Forte extern uint32_t fw2400_length02; 92fcf3ce44SJohn Forte extern uint32_t fw2400_addr02; 93fcf3ce44SJohn Forte 94fcf3ce44SJohn Forte extern uint32_t fw2500_code01[]; 95fcf3ce44SJohn Forte extern uint32_t fw2500_length01; 96fcf3ce44SJohn Forte extern uint32_t fw2500_addr01; 97fcf3ce44SJohn Forte extern uint32_t fw2500_code02[]; 98fcf3ce44SJohn Forte extern uint32_t fw2500_length02; 99fcf3ce44SJohn Forte extern uint32_t fw2500_addr02; 100fcf3ce44SJohn Forte 101c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_code01[]; 102c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_length01; 103c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_addr01; 104c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_code02[]; 105c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_length02; 106c4ddbbe1SDaniel Beauregard extern uint32_t fw8100_addr02; 107c4ddbbe1SDaniel Beauregard 108fcf3ce44SJohn Forte typedef enum { 109fcf3ce44SJohn Forte MBOX_STATE_UNKNOWN = 0, 110fcf3ce44SJohn Forte MBOX_STATE_READY, 111fcf3ce44SJohn Forte MBOX_STATE_CMD_RUNNING, 112fcf3ce44SJohn Forte MBOX_STATE_CMD_DONE 113fcf3ce44SJohn Forte } mbox_state_t; 114fcf3ce44SJohn Forte 115a2255df3SDaniel Beauregard /* 116a2255df3SDaniel Beauregard * ISP mailbox commands 117a2255df3SDaniel Beauregard */ 118a2255df3SDaniel Beauregard #define MBC_LOAD_RAM 0x01 /* Load RAM. */ 119a2255df3SDaniel Beauregard #define MBC_EXECUTE_FIRMWARE 0x02 /* Execute firmware. */ 120a2255df3SDaniel Beauregard #define MBC_DUMP_RAM 0x03 /* Dump RAM. */ 121a2255df3SDaniel Beauregard #define MBC_WRITE_RAM_WORD 0x04 /* Write RAM word. */ 122a2255df3SDaniel Beauregard #define MBC_READ_RAM_WORD 0x05 /* Read RAM word. */ 123a2255df3SDaniel Beauregard #define MBC_MAILBOX_REGISTER_TEST 0x06 /* Wrap incoming mailboxes */ 124a2255df3SDaniel Beauregard #define MBC_VERIFY_CHECKSUM 0x07 /* Verify checksum. */ 125a2255df3SDaniel Beauregard #define MBC_ABOUT_FIRMWARE 0x08 /* About Firmware. */ 126a2255df3SDaniel Beauregard #define MBC_DUMP_RISC_RAM 0x0a /* Dump RISC RAM command. */ 127a2255df3SDaniel Beauregard #define MBC_LOAD_RAM_EXTENDED 0x0b /* Load RAM extended. */ 128a2255df3SDaniel Beauregard #define MBC_DUMP_RAM_EXTENDED 0x0c /* Dump RAM extended. */ 129a2255df3SDaniel Beauregard #define MBC_WRITE_RAM_EXTENDED 0x0d /* Write RAM word. */ 130a2255df3SDaniel Beauregard #define MBC_READ_RAM_EXTENDED 0x0f /* Read RAM extended. */ 131a2255df3SDaniel Beauregard #define MBC_SERDES_TRANSMIT_PARAMETERS 0x10 /* Serdes Xmit Parameters */ 132a2255df3SDaniel Beauregard #define MBC_2300_EXECUTE_IOCB 0x12 /* ISP2300 Execute IOCB cmd */ 133a2255df3SDaniel Beauregard #define MBC_GET_IO_STATUS 0x12 /* ISP2422 Get I/O Status */ 134a2255df3SDaniel Beauregard #define MBC_STOP_FIRMWARE 0x14 /* Stop firmware */ 135a2255df3SDaniel Beauregard #define MBC_ABORT_COMMAND_IOCB 0x15 /* Abort IOCB command. */ 136a2255df3SDaniel Beauregard #define MBC_ABORT_DEVICE 0x16 /* Abort device (ID/LUN). */ 137a2255df3SDaniel Beauregard #define MBC_ABORT_TARGET 0x17 /* Abort target (ID). */ 138a2255df3SDaniel Beauregard #define MBC_RESET 0x18 /* Target reset. */ 139a2255df3SDaniel Beauregard #define MBC_XMIT_PARM 0x19 /* Change default xmit parms */ 140a2255df3SDaniel Beauregard #define MBC_PORT_PARAM 0x1a /* Get/set port speed parms */ 141a2255df3SDaniel Beauregard #define MBC_GET_ID 0x20 /* Get loop id of ISP2200. */ 142a2255df3SDaniel Beauregard #define MBC_GET_TIMEOUT_PARAMETERS 0x22 /* Get Timeout Parameters. */ 143a2255df3SDaniel Beauregard #define MBC_TRACE_CONTROL 0x27 /* Trace control. */ 144a2255df3SDaniel Beauregard #define MBC_GET_FIRMWARE_OPTIONS 0x28 /* Get firmware options */ 145a2255df3SDaniel Beauregard #define MBC_READ_SFP 0x31 /* Read SFP. */ 146a2255df3SDaniel Beauregard 147a2255df3SDaniel Beauregard #define MBC_SET_ADDITIONAL_FIRMWARE_OPT 0x38 /* set firmware options */ 148a2255df3SDaniel Beauregard 149a2255df3SDaniel Beauregard #define OPT_PUREX_ENABLE (BIT_10) 150a2255df3SDaniel Beauregard 151a2255df3SDaniel Beauregard #define MBC_RESET_MENLO 0x3a /* Reset Menlo. */ 152a2255df3SDaniel Beauregard #define MBC_RESTART_MPI 0x3d /* Restart MPI. */ 153a2255df3SDaniel Beauregard #define MBC_FLASH_ACCESS 0x3e /* Flash Access Control */ 154a2255df3SDaniel Beauregard #define MBC_LOOP_PORT_BYPASS 0x40 /* Loop Port Bypass. */ 155a2255df3SDaniel Beauregard #define MBC_LOOP_PORT_ENABLE 0x41 /* Loop Port Enable. */ 156a2255df3SDaniel Beauregard #define MBC_GET_RESOURCE_COUNTS 0x42 /* Get Resource Counts. */ 157a2255df3SDaniel Beauregard #define MBC_NON_PARTICIPATE 0x43 /* Non-Participating Mode. */ 158a2255df3SDaniel Beauregard #define MBC_ECHO 0x44 /* ELS ECHO */ 159a2255df3SDaniel Beauregard #define MBC_DIAGNOSTIC_LOOP_BACK 0x45 /* Diagnostic loop back. */ 160a2255df3SDaniel Beauregard #define MBC_ONLINE_SELF_TEST 0x46 /* Online self-test. */ 161a2255df3SDaniel Beauregard #define MBC_ENHANCED_GET_PORT_DATABASE 0x47 /* Get Port Database + login */ 162a2255df3SDaniel Beauregard #define MBC_INITIALIZE_MULTI_ID_FW 0x48 /* Initialize multi-id fw */ 163a2255df3SDaniel Beauregard #define MBC_GET_DCBX_PARAMS 0x51 /* Get DCBX parameters */ 164a2255df3SDaniel Beauregard #define MBC_RESET_LINK_STATUS 0x52 /* Reset Link Error Status */ 165a2255df3SDaniel Beauregard #define MBC_EXECUTE_IOCB 0x54 /* 64 Bit Execute IOCB cmd. */ 166a2255df3SDaniel Beauregard #define MBC_SEND_RNID_ELS 0x57 /* Send RNID ELS request */ 167a2255df3SDaniel Beauregard 168a2255df3SDaniel Beauregard #define MBC_SET_PARAMETERS 0x59 /* Set parameters */ 169a2255df3SDaniel Beauregard 170a2255df3SDaniel Beauregard #define RNID_PARAMS_DF_FMT 0x00 171a2255df3SDaniel Beauregard #define RNID_PARAMS_E0_FMT 0x01 172a2255df3SDaniel Beauregard #define PUREX_ELS_CMDS 0x05 173a2255df3SDaniel Beauregard #define FLOGI_PARAMS 0x06 174a2255df3SDaniel Beauregard 175a2255df3SDaniel Beauregard #define PARAM_TYPE_FIELD_MASK 0xff 176a2255df3SDaniel Beauregard #define PARAM_TYPE_FIELD_SHIFT 8 177a2255df3SDaniel Beauregard #define PARAM_TYPE(type) ((type & PARAM_TYPE_FIELD_MASK) << \ 178a2255df3SDaniel Beauregard PARAM_TYPE_FIELD_SHIFT) 179a2255df3SDaniel Beauregard 180a2255df3SDaniel Beauregard #define MBC_GET_PARAMETERS 0x5a /* Get RNID parameters */ 181a2255df3SDaniel Beauregard #define MBC_DATA_RATE 0x5d /* Data Rate */ 182a2255df3SDaniel Beauregard #define MBC_INITIALIZE_FIRMWARE 0x60 /* Initialize firmware */ 183a2255df3SDaniel Beauregard #define MBC_INITIATE_LIP 0x62 /* Initiate LIP */ 184a2255df3SDaniel Beauregard #define MBC_GET_FC_AL_POSITION_MAP 0x63 /* Get FC_AL Position Map. */ 185a2255df3SDaniel Beauregard #define MBC_GET_PORT_DATABASE 0x64 /* Get Port Database. */ 186a2255df3SDaniel Beauregard #define MBC_CLEAR_ACA 0x65 /* Clear ACA. */ 187a2255df3SDaniel Beauregard #define MBC_TARGET_RESET 0x66 /* Target Reset. */ 188a2255df3SDaniel Beauregard #define MBC_CLEAR_TASK_SET 0x67 /* Clear Task Set. */ 189a2255df3SDaniel Beauregard #define MBC_ABORT_TASK_SET 0x68 /* Abort Task Set. */ 190a2255df3SDaniel Beauregard #define MBC_GET_FIRMWARE_STATE 0x69 /* Get firmware state. */ 191a2255df3SDaniel Beauregard #define MBC_GET_PORT_NAME 0x6a /* Get port name. */ 192a2255df3SDaniel Beauregard #define MBC_GET_LINK_STATUS 0x6b /* Get Link Status. */ 193a2255df3SDaniel Beauregard #define MBC_LIP_RESET 0x6c /* LIP reset. */ 194a2255df3SDaniel Beauregard #define MBC_GET_STATUS_COUNTS 0x6d /* Get Link Statistics and */ 195a2255df3SDaniel Beauregard /* Private Data Counts */ 196a2255df3SDaniel Beauregard #define MBC_SEND_SNS_COMMAND 0x6e /* Send Simple Name Server */ 197a2255df3SDaniel Beauregard #define MBC_LOGIN_FABRIC_PORT 0x6f /* Login fabric port. */ 198a2255df3SDaniel Beauregard #define MBC_SEND_CHANGE_REQUEST 0x70 /* Send Change Request. */ 199a2255df3SDaniel Beauregard #define MBC_LOGOUT_FABRIC_PORT 0x71 /* Logout fabric port. */ 200a2255df3SDaniel Beauregard #define MBC_LIP_FULL_LOGIN 0x72 /* Full login LIP. */ 201a2255df3SDaniel Beauregard #define MBC_LOGIN_LOOP_PORT 0x74 /* Login Loop Port. */ 202a2255df3SDaniel Beauregard #define MBC_PORT_NODE_NAME_LIST 0x75 /* Get port/node name list */ 203a2255df3SDaniel Beauregard #define MBC_INITIALIZE_IP 0x77 /* Initialize IP */ 204a2255df3SDaniel Beauregard #define MBC_SEND_FARP_REQ_COMMAND 0x78 /* FARP request. */ 205a2255df3SDaniel Beauregard #define MBC_UNLOAD_IP 0x79 /* Unload IP */ 206a2255df3SDaniel Beauregard #define MBC_GET_XGMAC_STATS 0x7a /* Get XGMAC Statistics. */ 207a2255df3SDaniel Beauregard #define MBC_GET_ID_LIST 0x7c /* Get port ID list. */ 208a2255df3SDaniel Beauregard #define MBC_SEND_LFA_COMMAND 0x7d /* Send Loop Fabric Address */ 209a2255df3SDaniel Beauregard #define MBC_LUN_RESET 0x7e /* Send Task mgmt LUN reset */ 210a2255df3SDaniel Beauregard #define MBC_IDC_REQUEST 0x100 /* IDC request */ 211a2255df3SDaniel Beauregard #define MBC_IDC_ACK 0x101 /* IDC acknowledge */ 212a2255df3SDaniel Beauregard #define MBC_IDC_TIME_EXTEND 0x102 /* IDC extend time */ 213a2255df3SDaniel Beauregard #define MBC_PORT_RESET 0x120 /* Port Reset */ 214a2255df3SDaniel Beauregard #define MBC_SET_PORT_CONFIG 0x122 /* Set port configuration */ 215a2255df3SDaniel Beauregard #define MBC_GET_PORT_CONFIG 0x123 /* Get port configuration */ 216a2255df3SDaniel Beauregard 217fcf3ce44SJohn Forte #define IOCB_SIZE 64 218fcf3ce44SJohn Forte 219fcf3ce44SJohn Forte /* 220fcf3ce44SJohn Forte * These should not be constents but should be obtained from fw. 221fcf3ce44SJohn Forte */ 222fcf3ce44SJohn Forte #define QLT_MAX_LOGINS 2048 223fcf3ce44SJohn Forte #define QLT_MAX_XCHGES 2048 224fcf3ce44SJohn Forte 225fcf3ce44SJohn Forte #define MAX_MBOXES 32 226fcf3ce44SJohn Forte #define MBOX_TIMEOUT (2*1000*1000) 227fcf3ce44SJohn Forte #define DEREG_RP_TIMEOUT (2*1000*1000) 228fcf3ce44SJohn Forte 229fcf3ce44SJohn Forte typedef struct { 230fcf3ce44SJohn Forte uint16_t to_fw[MAX_MBOXES]; 231fcf3ce44SJohn Forte uint32_t to_fw_mask; 232fcf3ce44SJohn Forte uint16_t from_fw[MAX_MBOXES]; 233fcf3ce44SJohn Forte uint32_t from_fw_mask; 234fcf3ce44SJohn Forte stmf_data_buf_t *dbuf; 235fcf3ce44SJohn Forte } mbox_cmd_t; 236fcf3ce44SJohn Forte 237fcf3ce44SJohn Forte typedef struct qlt_abts_cmd { 238fcf3ce44SJohn Forte uint8_t buf[IOCB_SIZE]; 239fcf3ce44SJohn Forte } qlt_abts_cmd_t; 240fcf3ce44SJohn Forte 241fcf3ce44SJohn Forte struct qlt_dmem_bucket; 242*3fb517f7SJames Moore struct qlt_ddi_dma_handle_pool; 243fcf3ce44SJohn Forte 244fcf3ce44SJohn Forte #define QLT_INTR_FIXED 0x1 245fcf3ce44SJohn Forte #define QLT_INTR_MSI 0x2 246fcf3ce44SJohn Forte #define QLT_INTR_MSIX 0x4 247fcf3ce44SJohn Forte 248c4ddbbe1SDaniel Beauregard typedef struct qlt_el_trace_desc { 249c4ddbbe1SDaniel Beauregard kmutex_t mutex; 250c4ddbbe1SDaniel Beauregard uint16_t next; 251c4ddbbe1SDaniel Beauregard uint32_t trace_buffer_size; 252c4ddbbe1SDaniel Beauregard char *trace_buffer; 253c4ddbbe1SDaniel Beauregard } qlt_el_trace_desc_t; 254c4ddbbe1SDaniel Beauregard 255fcf3ce44SJohn Forte typedef struct qlt_state { 256fcf3ce44SJohn Forte dev_info_t *dip; 257fcf3ce44SJohn Forte char qlt_minor_name[16]; 258fcf3ce44SJohn Forte char qlt_port_alias[16]; 259fcf3ce44SJohn Forte fct_local_port_t *qlt_port; 260fcf3ce44SJohn Forte struct qlt_dmem_bucket **dmem_buckets; 261fcf3ce44SJohn Forte 262*3fb517f7SJames Moore struct qlt_dma_handle_pool 263*3fb517f7SJames Moore *qlt_dma_handle_pool; 264*3fb517f7SJames Moore 265fcf3ce44SJohn Forte int instance; 266fcf3ce44SJohn Forte uint8_t qlt_state:7, 267fcf3ce44SJohn Forte qlt_state_not_acked:1; 268fcf3ce44SJohn Forte uint8_t qlt_intr_enabled:1, 269fcf3ce44SJohn Forte qlt_25xx_chip:1, 270fcf3ce44SJohn Forte qlt_stay_offline:1, 271fcf3ce44SJohn Forte qlt_link_up, 272c4ddbbe1SDaniel Beauregard qlt_81xx_chip:1, 273c4ddbbe1SDaniel Beauregard qlt_rsvd1:3; 274fcf3ce44SJohn Forte uint8_t cur_topology; 275fcf3ce44SJohn Forte 276fcf3ce44SJohn Forte /* Registers */ 277fcf3ce44SJohn Forte caddr_t regs; 278fcf3ce44SJohn Forte ddi_acc_handle_t regs_acc_handle; 279fcf3ce44SJohn Forte ddi_acc_handle_t pcicfg_acc_handle; 280fcf3ce44SJohn Forte 281fcf3ce44SJohn Forte /* Interrupt stuff */ 282fcf3ce44SJohn Forte kmutex_t intr_lock; /* Only used by intr routine */ 283fcf3ce44SJohn Forte int intr_sneak_counter; 284fcf3ce44SJohn Forte ddi_intr_handle_t *htable; 285fcf3ce44SJohn Forte int intr_size; 286fcf3ce44SJohn Forte int intr_cnt; 287fcf3ce44SJohn Forte uint_t intr_pri; 288fcf3ce44SJohn Forte int intr_cap; 289fcf3ce44SJohn Forte int intr_flags; 290fcf3ce44SJohn Forte 291fcf3ce44SJohn Forte /* Queues */ 292fcf3ce44SJohn Forte ddi_dma_handle_t queue_mem_dma_handle; 293fcf3ce44SJohn Forte ddi_acc_handle_t queue_mem_acc_handle; 294fcf3ce44SJohn Forte caddr_t queue_mem_ptr; 295fcf3ce44SJohn Forte ddi_dma_cookie_t queue_mem_cookie; 296fcf3ce44SJohn Forte 297fcf3ce44SJohn Forte kmutex_t req_lock; 298fcf3ce44SJohn Forte caddr_t req_ptr; 299fcf3ce44SJohn Forte uint32_t req_ndx_to_fw; 300fcf3ce44SJohn Forte uint32_t req_ndx_from_fw; 301fcf3ce44SJohn Forte uint32_t req_available; 302fcf3ce44SJohn Forte 303fcf3ce44SJohn Forte caddr_t resp_ptr; 304fcf3ce44SJohn Forte uint32_t resp_ndx_to_fw; 305fcf3ce44SJohn Forte uint32_t resp_ndx_from_fw; 306fcf3ce44SJohn Forte 307fcf3ce44SJohn Forte kmutex_t preq_lock; 308fcf3ce44SJohn Forte caddr_t preq_ptr; 309fcf3ce44SJohn Forte uint32_t preq_ndx_to_fw; 310fcf3ce44SJohn Forte uint32_t preq_ndx_from_fw; 311fcf3ce44SJohn Forte 312fcf3ce44SJohn Forte kcondvar_t rp_dereg_cv; /* for deregister cmd */ 313fcf3ce44SJohn Forte uint32_t rp_id_in_dereg; /* remote port in deregistering */ 314fcf3ce44SJohn Forte fct_status_t rp_dereg_status; 315fcf3ce44SJohn Forte 316fcf3ce44SJohn Forte caddr_t atio_ptr; 317fcf3ce44SJohn Forte uint16_t atio_ndx_to_fw; 318fcf3ce44SJohn Forte uint16_t atio_ndx_from_fw; 319fcf3ce44SJohn Forte 320fcf3ce44SJohn Forte kmutex_t dma_mem_lock; 321fcf3ce44SJohn Forte 322fcf3ce44SJohn Forte /* MailBox data */ 323fcf3ce44SJohn Forte kmutex_t mbox_lock; 324fcf3ce44SJohn Forte kcondvar_t mbox_cv; 325fcf3ce44SJohn Forte mbox_state_t mbox_io_state; 326fcf3ce44SJohn Forte mbox_cmd_t *mcp; 327fcf3ce44SJohn Forte qlt_nvram_t *nvram; 328fcf3ce44SJohn Forte 329fcf3ce44SJohn Forte uint8_t link_speed; /* Cached from intr routine */ 330fcf3ce44SJohn Forte uint16_t fw_major; 331fcf3ce44SJohn Forte uint16_t fw_minor; 332fcf3ce44SJohn Forte uint16_t fw_subminor; 333fcf3ce44SJohn Forte uint16_t fw_endaddrlo; 334fcf3ce44SJohn Forte uint16_t fw_endaddrhi; 335fcf3ce44SJohn Forte uint16_t fw_attr; 336fcf3ce44SJohn Forte 337fcf3ce44SJohn Forte uint32_t fw_addr01; 338fcf3ce44SJohn Forte uint32_t fw_length01; 339fcf3ce44SJohn Forte uint32_t *fw_code01; 340fcf3ce44SJohn Forte uint32_t fw_addr02; 341fcf3ce44SJohn Forte uint32_t fw_length02; 342fcf3ce44SJohn Forte uint32_t *fw_code02; 343fcf3ce44SJohn Forte 344fcf3ce44SJohn Forte uint32_t qlt_ioctl_flags; 345fcf3ce44SJohn Forte kmutex_t qlt_ioctl_lock; 346fcf3ce44SJohn Forte caddr_t qlt_fwdump_buf; /* FWDUMP will use ioctl flags/lock */ 347fcf3ce44SJohn Forte uint32_t qlt_change_state_flags; /* Cached for ACK handling */ 348c4ddbbe1SDaniel Beauregard 349c4ddbbe1SDaniel Beauregard qlt_el_trace_desc_t *el_trace_desc; 350a2255df3SDaniel Beauregard 351a2255df3SDaniel Beauregard /* temp ref & stat counters */ 352a2255df3SDaniel Beauregard uint32_t qlt_bucketcnt[5]; /* element 0 = 2k */ 353a2255df3SDaniel Beauregard uint64_t qlt_bufref[5]; /* element 0 = 2k */ 354a2255df3SDaniel Beauregard uint64_t qlt_bumpbucket; /* bigger buffer supplied */ 3553f3ce7b9SDaniel Beauregard uint64_t qlt_pmintry; 3563f3ce7b9SDaniel Beauregard uint64_t qlt_pmin_ok; 357fcf3ce44SJohn Forte } qlt_state_t; 358fcf3ce44SJohn Forte 359fcf3ce44SJohn Forte /* 360fcf3ce44SJohn Forte * FWDUMP flags (part of IOCTL flags) 361fcf3ce44SJohn Forte */ 362fcf3ce44SJohn Forte #define QLT_FWDUMP_INPROGRESS 0x0100 /* if it's dumping now */ 363fcf3ce44SJohn Forte #define QLT_FWDUMP_TRIGGERED_BY_USER 0x0200 /* if users triggered it */ 364fcf3ce44SJohn Forte #define QLT_FWDUMP_FETCHED_BY_USER 0x0400 /* if users have viewed it */ 365fcf3ce44SJohn Forte #define QLT_FWDUMP_ISVALID 0x0800 366fcf3ce44SJohn Forte 367fcf3ce44SJohn Forte /* 368fcf3ce44SJohn Forte * IOCTL supporting stuff 369fcf3ce44SJohn Forte */ 370fcf3ce44SJohn Forte #define QLT_IOCTL_FLAG_MASK 0xFF 371fcf3ce44SJohn Forte #define QLT_IOCTL_FLAG_IDLE 0x00 372fcf3ce44SJohn Forte #define QLT_IOCTL_FLAG_OPEN 0x01 373fcf3ce44SJohn Forte #define QLT_IOCTL_FLAG_EXCL 0x02 374fcf3ce44SJohn Forte 375fcf3ce44SJohn Forte typedef struct qlt_cmd { 376fcf3ce44SJohn Forte stmf_data_buf_t *dbuf; /* dbuf with handle 0 for SCSI cmds */ 377fcf3ce44SJohn Forte stmf_data_buf_t *dbuf_rsp_iu; /* dbuf for possible FCP_RSP IU */ 378fcf3ce44SJohn Forte uint32_t fw_xchg_addr; 379fcf3ce44SJohn Forte uint16_t flags; 380fcf3ce44SJohn Forte union { 381fcf3ce44SJohn Forte uint16_t resp_offset; 382fcf3ce44SJohn Forte uint8_t atio_byte3; 383fcf3ce44SJohn Forte } param; 384fcf3ce44SJohn Forte } qlt_cmd_t; 385fcf3ce44SJohn Forte 386fcf3ce44SJohn Forte /* 387fcf3ce44SJohn Forte * cmd flags 388fcf3ce44SJohn Forte */ 389fcf3ce44SJohn Forte #define QLT_CMD_ABORTING 1 390fcf3ce44SJohn Forte #define QLT_CMD_ABORTED 2 391fcf3ce44SJohn Forte #define QLT_CMD_TYPE_SOLICITED 4 392fcf3ce44SJohn Forte 393fcf3ce44SJohn Forte typedef struct { 394fcf3ce44SJohn Forte int dummy; 395fcf3ce44SJohn Forte } qlt_remote_port_t; 396fcf3ce44SJohn Forte 397fcf3ce44SJohn Forte #define REQUEST_QUEUE_ENTRIES 2048 398fcf3ce44SJohn Forte #define RESPONSE_QUEUE_ENTRIES 2048 399fcf3ce44SJohn Forte #define ATIO_QUEUE_ENTRIES 2048 400fcf3ce44SJohn Forte #define PRIORITY_QUEUE_ENTRIES 128 401fcf3ce44SJohn Forte 402fcf3ce44SJohn Forte #define REQUEST_QUEUE_OFFSET 0 403fcf3ce44SJohn Forte #define RESPONSE_QUEUE_OFFSET (REQUEST_QUEUE_OFFSET + \ 404fcf3ce44SJohn Forte (REQUEST_QUEUE_ENTRIES * IOCB_SIZE)) 405fcf3ce44SJohn Forte #define ATIO_QUEUE_OFFSET (RESPONSE_QUEUE_OFFSET + \ 406fcf3ce44SJohn Forte (RESPONSE_QUEUE_ENTRIES * IOCB_SIZE)) 407fcf3ce44SJohn Forte #define PRIORITY_QUEUE_OFFSET (ATIO_QUEUE_OFFSET + \ 408fcf3ce44SJohn Forte (ATIO_QUEUE_ENTRIES * IOCB_SIZE)) 409fcf3ce44SJohn Forte #define MBOX_DMA_MEM_SIZE 4096 410fcf3ce44SJohn Forte #define MBOX_DMA_MEM_OFFSET (PRIORITY_QUEUE_OFFSET + \ 411fcf3ce44SJohn Forte (PRIORITY_QUEUE_ENTRIES * IOCB_SIZE)) 412fcf3ce44SJohn Forte #define TOTAL_DMA_MEM_SIZE (MBOX_DMA_MEM_OFFSET + MBOX_DMA_MEM_SIZE) 413fcf3ce44SJohn Forte 414fcf3ce44SJohn Forte #define QLT_MAX_ITERATIONS_PER_INTR 32 415fcf3ce44SJohn Forte 416fcf3ce44SJohn Forte #define REG_RD16(qlt, addr) \ 417fcf3ce44SJohn Forte ddi_get16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr)) 418fcf3ce44SJohn Forte #define REG_RD32(qlt, addr) \ 419fcf3ce44SJohn Forte ddi_get32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr)) 420fcf3ce44SJohn Forte #define REG_WR16(qlt, addr, data) \ 421fcf3ce44SJohn Forte ddi_put16(qlt->regs_acc_handle, (uint16_t *)(qlt->regs + addr), \ 422fcf3ce44SJohn Forte (uint16_t)(data)) 423fcf3ce44SJohn Forte #define REG_WR32(qlt, addr, data) \ 424fcf3ce44SJohn Forte ddi_put32(qlt->regs_acc_handle, (uint32_t *)(qlt->regs + addr), \ 425fcf3ce44SJohn Forte (uint32_t)(data)) 426fcf3ce44SJohn Forte #define PCICFG_RD16(qlt, addr) \ 427fcf3ce44SJohn Forte pci_config_get16(qlt->pcicfg_acc_handle, (off_t)(addr)) 428fcf3ce44SJohn Forte #define PCICFG_RD32(qlt, addr) \ 429fcf3ce44SJohn Forte pci_config_get32(qlt->pcicfg_acc_handle, (off_t)(addr)) 430fcf3ce44SJohn Forte #define PCICFG_WR16(qlt, addr, data) \ 431fcf3ce44SJohn Forte pci_config_put16(qlt->pcicfg_acc_handle, (off_t)(addr), \ 432fcf3ce44SJohn Forte (uint16_t)(data)) 433fcf3ce44SJohn Forte #define QMEM_RD16(qlt, addr) \ 434fcf3ce44SJohn Forte ddi_get16(qlt->queue_mem_acc_handle, (uint16_t *)(addr)) 435fcf3ce44SJohn Forte #define DMEM_RD16(qlt, addr) LE_16((uint16_t)(*((uint16_t *)(addr)))) 436fcf3ce44SJohn Forte #define QMEM_RD32(qlt, addr) \ 437fcf3ce44SJohn Forte ddi_get32(qlt->queue_mem_acc_handle, (uint32_t *)(addr)) 438fcf3ce44SJohn Forte #define DMEM_RD32(qlt, addr) LE_32((uint32_t)(*((uint32_t *)(addr)))) 439fcf3ce44SJohn Forte /* 440fcf3ce44SJohn Forte * #define QMEM_RD64(qlt, addr) \ 441fcf3ce44SJohn Forte * ddi_get64(qlt->queue_mem_acc_handle, (uint64_t *)(addr)) 442fcf3ce44SJohn Forte */ 443fcf3ce44SJohn Forte #define QMEM_WR16(qlt, addr, data) \ 444fcf3ce44SJohn Forte ddi_put16(qlt->queue_mem_acc_handle, (uint16_t *)(addr), \ 445fcf3ce44SJohn Forte (uint16_t)(data)) 446fcf3ce44SJohn Forte #define DMEM_WR16(qlt, addr, data) (*((uint16_t *)(addr)) = \ 447c4ddbbe1SDaniel Beauregard (uint16_t)LE_16((uint16_t)(data))) 448fcf3ce44SJohn Forte #define QMEM_WR32(qlt, addr, data) \ 449fcf3ce44SJohn Forte ddi_put32(qlt->queue_mem_acc_handle, (uint32_t *)(addr), \ 450fcf3ce44SJohn Forte (uint32_t)(data)) 451fcf3ce44SJohn Forte #define DMEM_WR32(qlt, addr, data) (*((uint32_t *)(addr)) = \ 452fcf3ce44SJohn Forte LE_32((uint32_t)(data))) 453fcf3ce44SJohn Forte 454fcf3ce44SJohn Forte /* 455fcf3ce44SJohn Forte * [QD]MEM is always little endian so the [QD]MEM_WR64 macro works for 456fcf3ce44SJohn Forte * both sparc and x86. 457fcf3ce44SJohn Forte */ 458fcf3ce44SJohn Forte #define QMEM_WR64(qlt, addr, data) \ 459fcf3ce44SJohn Forte QMEM_WR32(qlt, addr, (data & 0xffffffff)), \ 460fcf3ce44SJohn Forte QMEM_WR32(qlt, (addr)+4, ((uint64_t)data) >> 32) 461fcf3ce44SJohn Forte 462fcf3ce44SJohn Forte #define DMEM_WR64(qlt, addr, data) \ 463fcf3ce44SJohn Forte DMEM_WR32(qlt, addr, (data & 0xffffffff)), \ 464fcf3ce44SJohn Forte DMEM_WR32(qlt, (addr)+4, ((uint64_t)data) >> 32) 465fcf3ce44SJohn Forte 4660ff6bfafSDaniel Beauregard /* 4670ff6bfafSDaniel Beauregard * Structure used to associate values with strings which describe them. 4680ff6bfafSDaniel Beauregard */ 4690ff6bfafSDaniel Beauregard typedef struct string_table_entry { 4700ff6bfafSDaniel Beauregard uint32_t value; 4710ff6bfafSDaniel Beauregard char *string; 4720ff6bfafSDaniel Beauregard } string_table_t; 4730ff6bfafSDaniel Beauregard 4740ff6bfafSDaniel Beauregard char *prop_text(int prop_status); 4750ff6bfafSDaniel Beauregard char *value2string(string_table_t *entry, int value, int delimiter); 4760ff6bfafSDaniel Beauregard 4770ff6bfafSDaniel Beauregard #define PROP_STATUS_DELIMITER ((uint32_t)0xFFFF) 4780ff6bfafSDaniel Beauregard 4790ff6bfafSDaniel Beauregard #define DDI_PROP_STATUS() \ 4800ff6bfafSDaniel Beauregard { \ 4810ff6bfafSDaniel Beauregard {DDI_PROP_SUCCESS, "DDI_PROP_SUCCESS"}, \ 4820ff6bfafSDaniel Beauregard {DDI_PROP_NOT_FOUND, "DDI_PROP_NOT_FOUND"}, \ 4830ff6bfafSDaniel Beauregard {DDI_PROP_UNDEFINED, "DDI_PROP_UNDEFINED"}, \ 4840ff6bfafSDaniel Beauregard {DDI_PROP_NO_MEMORY, "DDI_PROP_NO_MEMORY"}, \ 4850ff6bfafSDaniel Beauregard {DDI_PROP_INVAL_ARG, "DDI_PROP_INVAL_ARG"}, \ 4860ff6bfafSDaniel Beauregard {DDI_PROP_BUF_TOO_SMALL, "DDI_PROP_BUF_TOO_SMALL"}, \ 4870ff6bfafSDaniel Beauregard {DDI_PROP_CANNOT_DECODE, "DDI_PROP_CANNOT_DECODE"}, \ 4880ff6bfafSDaniel Beauregard {DDI_PROP_CANNOT_ENCODE, "DDI_PROP_CANNOT_ENCODE"}, \ 4890ff6bfafSDaniel Beauregard {DDI_PROP_END_OF_DATA, "DDI_PROP_END_OF_DATA"}, \ 4900ff6bfafSDaniel Beauregard {PROP_STATUS_DELIMITER, "DDI_PROP_UNKNOWN"} \ 4910ff6bfafSDaniel Beauregard } 4920ff6bfafSDaniel Beauregard 4930ff6bfafSDaniel Beauregard #ifndef TRUE 4940ff6bfafSDaniel Beauregard #define TRUE B_TRUE 4950ff6bfafSDaniel Beauregard #endif 4960ff6bfafSDaniel Beauregard 4970ff6bfafSDaniel Beauregard #ifndef FALSE 4980ff6bfafSDaniel Beauregard #define FALSE B_FALSE 4990ff6bfafSDaniel Beauregard #endif 5000ff6bfafSDaniel Beauregard 5010ff6bfafSDaniel Beauregard /* Little endian machine correction defines. */ 5020ff6bfafSDaniel Beauregard #ifdef _LITTLE_ENDIAN 5030ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_16(x) 5040ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_24(x) 5050ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_32(x) 5060ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_64(x) 5070ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN(bp, bytes) 5080ff6bfafSDaniel Beauregard #define BIG_ENDIAN_16(x) qlt_chg_endian((uint8_t *)x, 2) 5090ff6bfafSDaniel Beauregard #define BIG_ENDIAN_24(x) qlt_chg_endian((uint8_t *)x, 3) 5100ff6bfafSDaniel Beauregard #define BIG_ENDIAN_32(x) qlt_chg_endian((uint8_t *)x, 4) 5110ff6bfafSDaniel Beauregard #define BIG_ENDIAN_64(x) qlt_chg_endian((uint8_t *)x, 8) 5120ff6bfafSDaniel Beauregard #define BIG_ENDIAN(bp, bytes) qlt_chg_endian((uint8_t *)bp, bytes) 5130ff6bfafSDaniel Beauregard #endif /* _LITTLE_ENDIAN */ 5140ff6bfafSDaniel Beauregard 5150ff6bfafSDaniel Beauregard /* Big endian machine correction defines. */ 5160ff6bfafSDaniel Beauregard #ifdef _BIG_ENDIAN 5170ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_16(x) qlt_chg_endian((uint8_t *)x, 2) 5180ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_24(x) qlt_chg_endian((uint8_t *)x, 3) 5190ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_32(x) qlt_chg_endian((uint8_t *)x, 4) 5200ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN_64(x) qlt_chg_endian((uint8_t *)x, 8) 5210ff6bfafSDaniel Beauregard #define LITTLE_ENDIAN(bp, bytes) qlt_chg_endian((uint8_t *)bp, bytes) 5220ff6bfafSDaniel Beauregard #define BIG_ENDIAN_16(x) 5230ff6bfafSDaniel Beauregard #define BIG_ENDIAN_24(x) 5240ff6bfafSDaniel Beauregard #define BIG_ENDIAN_32(x) 5250ff6bfafSDaniel Beauregard #define BIG_ENDIAN_64(x) 5260ff6bfafSDaniel Beauregard #define BIG_ENDIAN(bp, bytes) 5270ff6bfafSDaniel Beauregard #endif /* _BIG_ENDIAN */ 5280ff6bfafSDaniel Beauregard 529a2255df3SDaniel Beauregard #define LSB(x) (uint8_t)(x) 530a2255df3SDaniel Beauregard #define MSB(x) (uint8_t)((uint16_t)(x) >> 8) 531a2255df3SDaniel Beauregard #define MSW(x) (uint16_t)((uint32_t)(x) >> 16) 532a2255df3SDaniel Beauregard #define LSW(x) (uint16_t)(x) 533a2255df3SDaniel Beauregard #define LSD(x) (uint32_t)(x) 534a2255df3SDaniel Beauregard #define MSD(x) (uint32_t)((uint64_t)(x) >> 32) 535a2255df3SDaniel Beauregard 5360ff6bfafSDaniel Beauregard void qlt_chg_endian(uint8_t *, size_t); 5370ff6bfafSDaniel Beauregard 538c4ddbbe1SDaniel Beauregard void qlt_el_msg(qlt_state_t *qlt, const char *fn, int ce, ...); 539c4ddbbe1SDaniel Beauregard void qlt_dump_el_trace_buffer(qlt_state_t *qlt); 540c4ddbbe1SDaniel Beauregard #define EL(qlt, ...) qlt_el_msg(qlt, __func__, CE_CONT, __VA_ARGS__); 541c4ddbbe1SDaniel Beauregard #define EL_TRACE_BUF_SIZE 8192 542c4ddbbe1SDaniel Beauregard #define EL_BUFFER_RESERVE 256 543c4ddbbe1SDaniel Beauregard #define DEBUG_STK_DEPTH 24 544c4ddbbe1SDaniel Beauregard #define EL_TRACE_BUF_SIZE 8192 545fcf3ce44SJohn Forte 546fcf3ce44SJohn Forte #ifdef __cplusplus 547fcf3ce44SJohn Forte } 548fcf3ce44SJohn Forte #endif 549fcf3ce44SJohn Forte 550fcf3ce44SJohn Forte #endif /* _QLT_H */ 551