1*d39a76e7Sxw /*
2*d39a76e7Sxw * CDDL HEADER START
3*d39a76e7Sxw *
4*d39a76e7Sxw * The contents of this file are subject to the terms of the
5*d39a76e7Sxw * Common Development and Distribution License (the "License").
6*d39a76e7Sxw * You may not use this file except in compliance with the License.
7*d39a76e7Sxw *
8*d39a76e7Sxw * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*d39a76e7Sxw * or http://www.opensolaris.org/os/licensing.
10*d39a76e7Sxw * See the License for the specific language governing permissions
11*d39a76e7Sxw * and limitations under the License.
12*d39a76e7Sxw *
13*d39a76e7Sxw * When distributing Covered Code, include this CDDL HEADER in each
14*d39a76e7Sxw * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*d39a76e7Sxw * If applicable, add the following below this CDDL HEADER, with the
16*d39a76e7Sxw * fields enclosed by brackets "[]" replaced with your own identifying
17*d39a76e7Sxw * information: Portions Copyright [yyyy] [name of copyright owner]
18*d39a76e7Sxw *
19*d39a76e7Sxw * CDDL HEADER END
20*d39a76e7Sxw */
21*d39a76e7Sxw
22*d39a76e7Sxw /*
23*d39a76e7Sxw * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved.
24*d39a76e7Sxw */
25*d39a76e7Sxw
26*d39a76e7Sxw #pragma ident "%Z%%M% %I% %E% SMI" /* xpak.c */
27*d39a76e7Sxw
28*d39a76e7Sxw #include "cphy.h"
29*d39a76e7Sxw #include "elmer0.h"
30*d39a76e7Sxw
31*d39a76e7Sxw /* ARGSUSED */
xpak_reset(struct cphy * cphy,int wait)32*d39a76e7Sxw static int xpak_reset(struct cphy *cphy, int wait)
33*d39a76e7Sxw {
34*d39a76e7Sxw return 0;
35*d39a76e7Sxw }
36*d39a76e7Sxw
37*d39a76e7Sxw /* ARGSUSED */
xpak_interrupt_enable(struct cphy * cphy)38*d39a76e7Sxw static int xpak_interrupt_enable(struct cphy *cphy)
39*d39a76e7Sxw {
40*d39a76e7Sxw return 0;
41*d39a76e7Sxw }
42*d39a76e7Sxw
43*d39a76e7Sxw /* ARGSUSED */
xpak_interrupt_disable(struct cphy * cphy)44*d39a76e7Sxw static int xpak_interrupt_disable(struct cphy *cphy)
45*d39a76e7Sxw {
46*d39a76e7Sxw return 0;
47*d39a76e7Sxw }
48*d39a76e7Sxw
49*d39a76e7Sxw /* ARGSUSED */
xpak_interrupt_clear(struct cphy * cphy)50*d39a76e7Sxw static int xpak_interrupt_clear(struct cphy *cphy)
51*d39a76e7Sxw {
52*d39a76e7Sxw return 0;
53*d39a76e7Sxw }
54*d39a76e7Sxw
55*d39a76e7Sxw /* ARGSUSED */
xpak_set_loopback(struct cphy * cphy,int on)56*d39a76e7Sxw static int xpak_set_loopback(struct cphy *cphy, int on)
57*d39a76e7Sxw {
58*d39a76e7Sxw return 0;
59*d39a76e7Sxw }
60*d39a76e7Sxw
61*d39a76e7Sxw /* ARGSUSED */
xpak_get_link_status(struct cphy * cphy,int * link_ok,int * speed,int * duplex,int * fc)62*d39a76e7Sxw static int xpak_get_link_status(struct cphy *cphy, int *link_ok, int *speed,
63*d39a76e7Sxw int *duplex, int *fc)
64*d39a76e7Sxw {
65*d39a76e7Sxw if (link_ok)
66*d39a76e7Sxw *link_ok = 1;
67*d39a76e7Sxw if (speed)
68*d39a76e7Sxw *speed = SPEED_10000;
69*d39a76e7Sxw if (duplex)
70*d39a76e7Sxw *duplex = DUPLEX_FULL;
71*d39a76e7Sxw if (fc)
72*d39a76e7Sxw *fc = PAUSE_RX | PAUSE_TX;
73*d39a76e7Sxw return 0;
74*d39a76e7Sxw }
75*d39a76e7Sxw
xpak_destroy(struct cphy * cphy)76*d39a76e7Sxw static void xpak_destroy(struct cphy *cphy)
77*d39a76e7Sxw {
78*d39a76e7Sxw t1_os_free((void *)cphy, sizeof(*cphy));
79*d39a76e7Sxw }
80*d39a76e7Sxw
81*d39a76e7Sxw #ifdef C99_NOT_SUPPORTED
82*d39a76e7Sxw static struct cphy_ops xpak_ops = {
83*d39a76e7Sxw xpak_destroy,
84*d39a76e7Sxw xpak_reset,
85*d39a76e7Sxw xpak_interrupt_enable,
86*d39a76e7Sxw xpak_interrupt_disable,
87*d39a76e7Sxw xpak_interrupt_clear,
88*d39a76e7Sxw NULL,
89*d39a76e7Sxw NULL,
90*d39a76e7Sxw NULL,
91*d39a76e7Sxw NULL,
92*d39a76e7Sxw NULL,
93*d39a76e7Sxw xpak_set_loopback,
94*d39a76e7Sxw NULL,
95*d39a76e7Sxw xpak_get_link_status,
96*d39a76e7Sxw };
97*d39a76e7Sxw #else
98*d39a76e7Sxw static struct cphy_ops xpak_ops = {
99*d39a76e7Sxw .destroy = xpak_destroy,
100*d39a76e7Sxw .reset = xpak_reset,
101*d39a76e7Sxw .interrupt_enable = xpak_interrupt_enable,
102*d39a76e7Sxw .interrupt_disable = xpak_interrupt_disable,
103*d39a76e7Sxw .interrupt_clear = xpak_interrupt_clear,
104*d39a76e7Sxw .get_link_status = xpak_get_link_status,
105*d39a76e7Sxw .set_loopback = xpak_set_loopback,
106*d39a76e7Sxw };
107*d39a76e7Sxw #endif
108*d39a76e7Sxw
109*d39a76e7Sxw /* ARGSUSED */
xpak_phy_create(adapter_t * adapter,int phy_addr,struct mdio_ops * mdio_ops)110*d39a76e7Sxw static struct cphy *xpak_phy_create(adapter_t * adapter, int phy_addr,
111*d39a76e7Sxw struct mdio_ops *mdio_ops)
112*d39a76e7Sxw {
113*d39a76e7Sxw struct cphy *cphy = t1_os_malloc_wait_zero(sizeof(*cphy));
114*d39a76e7Sxw
115*d39a76e7Sxw if (!cphy)
116*d39a76e7Sxw return NULL;
117*d39a76e7Sxw
118*d39a76e7Sxw cphy->ops = &xpak_ops;
119*d39a76e7Sxw cphy->adapter = adapter;
120*d39a76e7Sxw cphy->mdio_read = mdio_ops->read;
121*d39a76e7Sxw cphy->mdio_write = mdio_ops->write;
122*d39a76e7Sxw return cphy;
123*d39a76e7Sxw }
124*d39a76e7Sxw
xpak_phy_reset(adapter_t * adapter)125*d39a76e7Sxw static int xpak_phy_reset(adapter_t *adapter)
126*d39a76e7Sxw {
127*d39a76e7Sxw u32 val;
128*d39a76e7Sxw
129*d39a76e7Sxw (void) t1_tpi_read(adapter, A_ELMER0_GPO, &val);
130*d39a76e7Sxw val &= ~4;
131*d39a76e7Sxw (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
132*d39a76e7Sxw DELAY_MS(100);
133*d39a76e7Sxw
134*d39a76e7Sxw /*
135*d39a76e7Sxw * Errata #26 states to wait 5 seconds after reset before transceiver
136*d39a76e7Sxw * becomes operational.
137*d39a76e7Sxw */
138*d39a76e7Sxw (void) t1_tpi_write(adapter, A_ELMER0_GPO, val | 4);
139*d39a76e7Sxw DELAY_MS(5000);
140*d39a76e7Sxw
141*d39a76e7Sxw /* Now lets enable the Laser. Delay 100us
142*d39a76e7Sxw * as defined in XPAK errata.
143*d39a76e7Sxw */
144*d39a76e7Sxw (void) t1_tpi_read(adapter, A_ELMER0_GPO, &val);
145*d39a76e7Sxw val |= 0x8000;
146*d39a76e7Sxw (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
147*d39a76e7Sxw DELAY_US(100);
148*d39a76e7Sxw return 0;
149*d39a76e7Sxw }
150*d39a76e7Sxw
151*d39a76e7Sxw struct gphy t1_xpak_ops = {
152*d39a76e7Sxw xpak_phy_create,
153*d39a76e7Sxw xpak_phy_reset
154*d39a76e7Sxw };
155*d39a76e7Sxw
156