1*d14abf15SRobert Mustacchi /******************************************************************************* 2*d14abf15SRobert Mustacchi * CDDL HEADER START 3*d14abf15SRobert Mustacchi * 4*d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 5*d14abf15SRobert Mustacchi * Common Development and Distribution License (the "License"). 6*d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 7*d14abf15SRobert Mustacchi * 8*d14abf15SRobert Mustacchi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*d14abf15SRobert Mustacchi * or http://www.opensolaris.org/os/licensing. 10*d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 11*d14abf15SRobert Mustacchi * and limitations under the License. 12*d14abf15SRobert Mustacchi * 13*d14abf15SRobert Mustacchi * When distributing Covered Code, include this CDDL HEADER in each 14*d14abf15SRobert Mustacchi * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*d14abf15SRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the 16*d14abf15SRobert Mustacchi * fields enclosed by brackets "[]" replaced with your own identifying 17*d14abf15SRobert Mustacchi * information: Portions Copyright [yyyy] [name of copyright owner] 18*d14abf15SRobert Mustacchi * 19*d14abf15SRobert Mustacchi * CDDL HEADER END 20*d14abf15SRobert Mustacchi * 21*d14abf15SRobert Mustacchi * Copyright 2014 QLogic Corporation 22*d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 23*d14abf15SRobert Mustacchi * QLogic End User License (the "License"). 24*d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 25*d14abf15SRobert Mustacchi * 26*d14abf15SRobert Mustacchi * You can obtain a copy of the License at 27*d14abf15SRobert Mustacchi * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/ 28*d14abf15SRobert Mustacchi * QLogic_End_User_Software_License.txt 29*d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 30*d14abf15SRobert Mustacchi * and limitations under the License. 31*d14abf15SRobert Mustacchi * 32*d14abf15SRobert Mustacchi ******************************************************************************/ 33*d14abf15SRobert Mustacchi 34*d14abf15SRobert Mustacchi #ifndef _LM_DEFS_H 35*d14abf15SRobert Mustacchi #define _LM_DEFS_H 36*d14abf15SRobert Mustacchi 37*d14abf15SRobert Mustacchi #include "bcmtype.h" 38*d14abf15SRobert Mustacchi 39*d14abf15SRobert Mustacchi 40*d14abf15SRobert Mustacchi 41*d14abf15SRobert Mustacchi /******************************************************************************* 42*d14abf15SRobert Mustacchi * Simple constants. 43*d14abf15SRobert Mustacchi ******************************************************************************/ 44*d14abf15SRobert Mustacchi 45*d14abf15SRobert Mustacchi #ifndef TRUE 46*d14abf15SRobert Mustacchi #define TRUE 1 47*d14abf15SRobert Mustacchi #endif 48*d14abf15SRobert Mustacchi 49*d14abf15SRobert Mustacchi #ifndef FALSE 50*d14abf15SRobert Mustacchi #define FALSE 0 51*d14abf15SRobert Mustacchi #endif 52*d14abf15SRobert Mustacchi 53*d14abf15SRobert Mustacchi #ifndef NULL 54*d14abf15SRobert Mustacchi #define NULL ((void *) 0) 55*d14abf15SRobert Mustacchi #endif 56*d14abf15SRobert Mustacchi 57*d14abf15SRobert Mustacchi 58*d14abf15SRobert Mustacchi /* Signatures for integrity checks. */ 59*d14abf15SRobert Mustacchi #define LM_DEVICE_SIG 0x6d635242 /* BRcm */ 60*d14abf15SRobert Mustacchi #define L2PACKET_RX_SIG 0x7872324c /* L2rx */ 61*d14abf15SRobert Mustacchi #define L2PACKET_TX_SIG 0x7874324c /* L2tx */ 62*d14abf15SRobert Mustacchi #define L4BUFFER_RX_SIG 0x7872344c /* L4rx */ 63*d14abf15SRobert Mustacchi #define L4BUFFER_TX_SIG 0x7874344c /* L4tx */ 64*d14abf15SRobert Mustacchi #define L4BUFFER_SIG 0x66754254 /* TBuf */ 65*d14abf15SRobert Mustacchi #define L4GEN_BUFFER_SIG 0x006e6567 /* gen */ 66*d14abf15SRobert Mustacchi #define L4GEN_BUFFER_SIG_END 0x0067656e /* neg */ 67*d14abf15SRobert Mustacchi 68*d14abf15SRobert Mustacchi #define SIZEOF_SIG 16 69*d14abf15SRobert Mustacchi #define SIG(_p) (*((u32_t *) ((u8_t *) (_p) - sizeof(u32_t)))) 70*d14abf15SRobert Mustacchi #define END_SIG(_p, _size) (*((u32_t *) ((u8_t *) (_p) + (_size)))) 71*d14abf15SRobert Mustacchi 72*d14abf15SRobert Mustacchi 73*d14abf15SRobert Mustacchi /* This macro rounds the given value to the next word boundary if it 74*d14abf15SRobert Mustacchi * is not already at a word boundary. */ 75*d14abf15SRobert Mustacchi #define ALIGN_VALUE_TO_WORD_BOUNDARY(_v) \ 76*d14abf15SRobert Mustacchi (((_v) + (sizeof(void *) - 1)) & ~(sizeof(void *) - 1)) 77*d14abf15SRobert Mustacchi 78*d14abf15SRobert Mustacchi /* This macro determines the delta to the next alignment which is 79*d14abf15SRobert Mustacchi * either 1, 2, 4, 8, 16, 32, etc. */ 80*d14abf15SRobert Mustacchi #define ALIGN_DELTA_TO_BOUNDARY(_p, _a) \ 81*d14abf15SRobert Mustacchi (((((u8_t *) (_p) - (u8_t *) 0) + ((_a) - 1)) & ~((_a) - 1)) - \ 82*d14abf15SRobert Mustacchi ((u8_t *) (_p) - (u8_t *) 0)) 83*d14abf15SRobert Mustacchi 84*d14abf15SRobert Mustacchi /* This macro returns the pointer to the next alignment if the pointer 85*d14abf15SRobert Mustacchi * is not currently on the indicated alignment boundary. */ 86*d14abf15SRobert Mustacchi #define ALIGN_PTR_TO_BOUNDARY(_p, _a) \ 87*d14abf15SRobert Mustacchi ((u8_t *) (_p) + ALIGN_DELTA_TO_BOUNDARY(_p, _a)) 88*d14abf15SRobert Mustacchi 89*d14abf15SRobert Mustacchi 90*d14abf15SRobert Mustacchi 91*d14abf15SRobert Mustacchi /******************************************************************************* 92*d14abf15SRobert Mustacchi * Status codes. 93*d14abf15SRobert Mustacchi ******************************************************************************/ 94*d14abf15SRobert Mustacchi 95*d14abf15SRobert Mustacchi typedef enum 96*d14abf15SRobert Mustacchi { 97*d14abf15SRobert Mustacchi LM_STATUS_SUCCESS = 0, 98*d14abf15SRobert Mustacchi LM_STATUS_LINK_UNKNOWN = 0, 99*d14abf15SRobert Mustacchi LM_STATUS_FAILURE = 1, 100*d14abf15SRobert Mustacchi LM_STATUS_RESOURCE = 2, 101*d14abf15SRobert Mustacchi LM_STATUS_ABORTED = 3, 102*d14abf15SRobert Mustacchi LM_STATUS_PENDING = 4, 103*d14abf15SRobert Mustacchi LM_STATUS_PAUSED = 5, 104*d14abf15SRobert Mustacchi LM_STATUS_INVALID_PARAMETER = 6, 105*d14abf15SRobert Mustacchi LM_STATUS_LINK_ACTIVE = 7, 106*d14abf15SRobert Mustacchi LM_STATUS_LINK_DOWN = 8, 107*d14abf15SRobert Mustacchi LM_STATUS_UNKNOWN_ADAPTER = 9, 108*d14abf15SRobert Mustacchi LM_STATUS_UNKNOWN_PHY = 10, 109*d14abf15SRobert Mustacchi LM_STATUS_UNKNOWN_MEDIUM = 11, 110*d14abf15SRobert Mustacchi LM_STATUS_TOO_MANY_FRAGMENTS = 12, 111*d14abf15SRobert Mustacchi LM_STATUS_BUFFER_TOO_SHORT = 16, 112*d14abf15SRobert Mustacchi LM_STATUS_UPLOAD_IN_PROGRESS = 17, 113*d14abf15SRobert Mustacchi LM_STATUS_BUSY = 18, 114*d14abf15SRobert Mustacchi LM_STATUS_INVALID_KEY = 19, 115*d14abf15SRobert Mustacchi LM_STATUS_TIMEOUT = 20, 116*d14abf15SRobert Mustacchi LM_STATUS_REQUEST_NOT_ACCEPTED = 21, 117*d14abf15SRobert Mustacchi LM_STATUS_CONNECTION_CLOSED = 22, 118*d14abf15SRobert Mustacchi LM_STATUS_BAD_SIGNATURE = 23, 119*d14abf15SRobert Mustacchi LM_STATUS_CONNECTION_RESET = 24, 120*d14abf15SRobert Mustacchi LM_STATUS_EXISTING_OBJECT = 25, 121*d14abf15SRobert Mustacchi LM_STATUS_OBJECT_NOT_FOUND = 26, 122*d14abf15SRobert Mustacchi LM_STATUS_CONNECTION_RM_DISC = 27, 123*d14abf15SRobert Mustacchi LM_STATUS_VF_LAMAC_REJECTED = 28, 124*d14abf15SRobert Mustacchi LM_STATUS_NOT_IMPLEMENTED = 29, 125*d14abf15SRobert Mustacchi LM_STATUS_UNKNOWN_EVENT_CODE = 30 126*d14abf15SRobert Mustacchi } lm_status_t; 127*d14abf15SRobert Mustacchi 128*d14abf15SRobert Mustacchi 129*d14abf15SRobert Mustacchi /******************************************************************************* 130*d14abf15SRobert Mustacchi * Receive filter masks. 131*d14abf15SRobert Mustacchi ******************************************************************************/ 132*d14abf15SRobert Mustacchi 133*d14abf15SRobert Mustacchi typedef u32_t lm_rx_mask_t; 134*d14abf15SRobert Mustacchi 135*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_NONE 0x0000 136*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_UNICAST 0x0001 137*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_MULTICAST 0x0002 138*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_ALL_MULTICAST 0x0004 139*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_BROADCAST 0x0008 140*d14abf15SRobert Mustacchi #define LM_RX_MASK_ACCEPT_ERROR_PACKET 0x0010 141*d14abf15SRobert Mustacchi 142*d14abf15SRobert Mustacchi #define LM_RX_MASK_PROMISCUOUS_MODE 0x10000 143*d14abf15SRobert Mustacchi 144*d14abf15SRobert Mustacchi 145*d14abf15SRobert Mustacchi 146*d14abf15SRobert Mustacchi /******************************************************************************* 147*d14abf15SRobert Mustacchi * Flow control. 148*d14abf15SRobert Mustacchi ******************************************************************************/ 149*d14abf15SRobert Mustacchi 150*d14abf15SRobert Mustacchi typedef u32_t lm_flow_control_t; 151*d14abf15SRobert Mustacchi 152*d14abf15SRobert Mustacchi #define LM_FLOW_CONTROL_NONE 0x00 153*d14abf15SRobert Mustacchi #define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01 154*d14abf15SRobert Mustacchi #define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02 155*d14abf15SRobert Mustacchi 156*d14abf15SRobert Mustacchi /* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the 157*d14abf15SRobert Mustacchi * auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE 158*d14abf15SRobert Mustacchi * bits are set, then flow control is enabled regardless of link partner's 159*d14abf15SRobert Mustacchi * flow control capability. Otherwise, if this bit is set, then flow 160*d14abf15SRobert Mustacchi * is negotiated with the link partner. Values 0x80000000 and 0x80000003 are 161*d14abf15SRobert Mustacchi * equivalent. */ 162*d14abf15SRobert Mustacchi #define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000 163*d14abf15SRobert Mustacchi 164*d14abf15SRobert Mustacchi 165*d14abf15SRobert Mustacchi /******************************************************************************* 166*d14abf15SRobert Mustacchi * EEE control. 167*d14abf15SRobert Mustacchi ******************************************************************************/ 168*d14abf15SRobert Mustacchi 169*d14abf15SRobert Mustacchi // values match the registry values for EeeCtrlMode . Default is MED ("Balanced") 170*d14abf15SRobert Mustacchi typedef enum 171*d14abf15SRobert Mustacchi { 172*d14abf15SRobert Mustacchi LM_EEE_CONTROL_HIGH = 0, // MaxPowerSave 173*d14abf15SRobert Mustacchi LM_EEE_CONTROL_MED = 1, // Balance 174*d14abf15SRobert Mustacchi LM_EEE_CONTROL_LOW = 2, // MaxPreformance 175*d14abf15SRobert Mustacchi LM_EEE_CONTROL_NVRAM = 3, // use NVRAM 176*d14abf15SRobert Mustacchi LM_EEE_CONTROL_NA = 4 // either N/A or disabled 177*d14abf15SRobert Mustacchi } lm_eee_policy_t; 178*d14abf15SRobert Mustacchi 179*d14abf15SRobert Mustacchi /******************************************************************************* 180*d14abf15SRobert Mustacchi * media type. 181*d14abf15SRobert Mustacchi ******************************************************************************/ 182*d14abf15SRobert Mustacchi 183*d14abf15SRobert Mustacchi typedef u32_t lm_medium_t; 184*d14abf15SRobert Mustacchi 185*d14abf15SRobert Mustacchi #define LM_MEDIUM_AUTO_DETECT 0x0000 186*d14abf15SRobert Mustacchi 187*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_UNKNOWN 0x0000 188*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_BNC 0x0001 189*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_UTP 0x0002 190*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_FIBER 0x0003 191*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_SERDES 0x0004 192*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_SERDES_SGMII 0x0005 193*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_XGXS 0x0006 194*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_XGXS_SGMII 0x0007 195*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_XMAC_LOOPBACK 0x0008 196*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_UMAC_LOOPBACK 0x0009 197*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_EXT_LOOPBACK 0x00f6 198*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK 0x00f7 199*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_SERDES_LOOPBACK 0x00f8 200*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_XGXS_LOOPBACK 0x00f9 201*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_XGXS_10_LOOPBACK 0x00fa 202*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_BMAC_LOOPBACK 0x00fb 203*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_EMAC_LOOPBACK 0x00fc 204*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_PHY_LOOPBACK 0x00fd 205*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_MAC_LOOPBACK 0x00fe 206*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_NULL 0x00ff 207*d14abf15SRobert Mustacchi #define LM_MEDIUM_TYPE_MASK 0x00ff 208*d14abf15SRobert Mustacchi #define GET_MEDIUM_TYPE(m) ((m) & LM_MEDIUM_TYPE_MASK) 209*d14abf15SRobert Mustacchi #define SET_MEDIUM_TYPE(m, t) \ 210*d14abf15SRobert Mustacchi (m) = ((m) & ~LM_MEDIUM_TYPE_MASK) | (t) 211*d14abf15SRobert Mustacchi 212*d14abf15SRobert Mustacchi #define LM_MEDIUM_IS_LOOPBACK(_medium) (((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_BMAC_LOOPBACK) || \ 213*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_UMAC_LOOPBACK) || \ 214*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XMAC_LOOPBACK) || \ 215*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_LOOPBACK) || \ 216*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_EXT_PHY_LOOPBACK) || \ 217*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_SERDES_LOOPBACK) || \ 218*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_LOOPBACK) || \ 219*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_XGXS_10_LOOPBACK) || \ 220*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_PHY_LOOPBACK) || \ 221*d14abf15SRobert Mustacchi ((GET_MEDIUM_TYPE(_medium)) == LM_MEDIUM_TYPE_MAC_LOOPBACK)) 222*d14abf15SRobert Mustacchi 223*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_AUTONEG 0x0000 224*d14abf15SRobert Mustacchi 225*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_UNKNOWN 0x0000 226*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_10MBPS 0x0100 227*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_100MBPS 0x0200 228*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_1000MBPS 0x0300 229*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_2500MBPS 0x0400 230*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_10GBPS 0x0600 231*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_12GBPS 0x0700 232*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_12_5GBPS 0x0800 233*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_13GBPS 0x0900 234*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_15GBPS 0x0a00 235*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_16GBPS 0x0b00 236*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_20GBPS 0x0c00 237*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_25GBPS 0x0d00 238*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_40GBPS 0x0e00 239*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_50GBPS 0x0f00 240*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_SEQ_START 0x1d00 // 100Mbps 241*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_SEQ_END 0xE400 // 20Gbps 242*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_AUTONEG_1G_FALLBACK 0xFD00 /* Serdes */ 243*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_AUTONEG_2_5G_FALLBACK 0xFE00 /* Serdes */ 244*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_HARDWARE_DEFAULT 0xff00 /* Serdes nvram def. */ 245*d14abf15SRobert Mustacchi #define LM_MEDIUM_SPEED_MASK 0xff00 246*d14abf15SRobert Mustacchi #define GET_MEDIUM_SPEED(m) ((m) & LM_MEDIUM_SPEED_MASK) 247*d14abf15SRobert Mustacchi #define SET_MEDIUM_SPEED(m, s) \ 248*d14abf15SRobert Mustacchi (m) = ((m) & ~LM_MEDIUM_SPEED_MASK) | (s) 249*d14abf15SRobert Mustacchi 250*d14abf15SRobert Mustacchi #define LM_MEDIUM_FULL_DUPLEX 0x00000 251*d14abf15SRobert Mustacchi #define LM_MEDIUM_HALF_DUPLEX 0x10000 252*d14abf15SRobert Mustacchi #define GET_MEDIUM_DUPLEX(m) ((m) & LM_MEDIUM_HALF_DUPLEX) 253*d14abf15SRobert Mustacchi #define SET_MEDIUM_DUPLEX(m, d) \ 254*d14abf15SRobert Mustacchi (m) = ((m) & ~LM_MEDIUM_HALF_DUPLEX) | (d) 255*d14abf15SRobert Mustacchi 256*d14abf15SRobert Mustacchi #define LM_MEDIUM_SELECTIVE_AUTONEG 0x01000000 257*d14abf15SRobert Mustacchi #define GET_MEDIUM_AUTONEG_MODE(m) ((m) & 0xff000000) 258*d14abf15SRobert Mustacchi 259*d14abf15SRobert Mustacchi typedef struct _lm_link_settings_t 260*d14abf15SRobert Mustacchi { 261*d14abf15SRobert Mustacchi u32_t flag; 262*d14abf15SRobert Mustacchi #define LINK_FLAG_SELECTIVE_AUTONEG_MASK 0x0f 263*d14abf15SRobert Mustacchi #define LINK_FLAG_SELECTIVE_AUTONEG_ONE_SPEED 0x01 264*d14abf15SRobert Mustacchi #define LINK_FLAG_SELECTIVE_AUTONEG_ENABLE_SLOWER_SPEEDS 0x02 265*d14abf15SRobert Mustacchi #define LINK_FLAG_WIRE_SPEED 0x10 266*d14abf15SRobert Mustacchi 267*d14abf15SRobert Mustacchi lm_medium_t req_medium; 268*d14abf15SRobert Mustacchi lm_flow_control_t flow_ctrl; 269*d14abf15SRobert Mustacchi 270*d14abf15SRobert Mustacchi u32_t _reserved; 271*d14abf15SRobert Mustacchi } lm_link_settings_t; 272*d14abf15SRobert Mustacchi 273*d14abf15SRobert Mustacchi 274*d14abf15SRobert Mustacchi 275*d14abf15SRobert Mustacchi /******************************************************************************* 276*d14abf15SRobert Mustacchi * Power state. 277*d14abf15SRobert Mustacchi ******************************************************************************/ 278*d14abf15SRobert Mustacchi 279*d14abf15SRobert Mustacchi typedef enum 280*d14abf15SRobert Mustacchi { 281*d14abf15SRobert Mustacchi LM_POWER_STATE_D0 = 0, 282*d14abf15SRobert Mustacchi LM_POWER_STATE_D1 = 1, 283*d14abf15SRobert Mustacchi LM_POWER_STATE_D2 = 2, 284*d14abf15SRobert Mustacchi LM_POWER_STATE_D3 = 3 285*d14abf15SRobert Mustacchi } lm_power_state_t; 286*d14abf15SRobert Mustacchi 287*d14abf15SRobert Mustacchi 288*d14abf15SRobert Mustacchi 289*d14abf15SRobert Mustacchi /******************************************************************************* 290*d14abf15SRobert Mustacchi * offloading. 291*d14abf15SRobert Mustacchi ******************************************************************************/ 292*d14abf15SRobert Mustacchi 293*d14abf15SRobert Mustacchi typedef u32_t lm_offload_t; 294*d14abf15SRobert Mustacchi 295*d14abf15SRobert Mustacchi #define LM_OFFLOAD_NONE 0x00000000 296*d14abf15SRobert Mustacchi #define LM_OFFLOAD_TX_IP_CKSUM 0x00000001 297*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RX_IP_CKSUM 0x00000002 298*d14abf15SRobert Mustacchi #define LM_OFFLOAD_TX_TCP_CKSUM 0x00000004 299*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RX_TCP_CKSUM 0x00000008 300*d14abf15SRobert Mustacchi #define LM_OFFLOAD_TX_UDP_CKSUM 0x00000010 301*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RX_UDP_CKSUM 0x00000020 302*d14abf15SRobert Mustacchi #define LM_OFFLOAD_IPV4_TCP_LSO 0x00000040 303*d14abf15SRobert Mustacchi #define LM_OFFLOAD_IPV6_TCP_LSO 0x00000080 304*d14abf15SRobert Mustacchi #define LM_OFFLOAD_CHIMNEY 0x00000100 305*d14abf15SRobert Mustacchi #define LM_OFFLOAD_IPV6_CHIMNEY 0x00000200 306*d14abf15SRobert Mustacchi #define LM_OFFLOAD_TX_TCP6_CKSUM 0x00001000 307*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RX_TCP6_CKSUM 0x00002000 308*d14abf15SRobert Mustacchi #define LM_OFFLOAD_TX_UDP6_CKSUM 0x00004000 309*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RX_UDP6_CKSUM 0x00008000 310*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RSC_IPV4 0x00010000 311*d14abf15SRobert Mustacchi #define LM_OFFLOAD_RSC_IPV6 0x00020000 312*d14abf15SRobert Mustacchi #define LM_OFFLOAD_ENCAP_PACKET 0x00040000 313*d14abf15SRobert Mustacchi 314*d14abf15SRobert Mustacchi 315*d14abf15SRobert Mustacchi 316*d14abf15SRobert Mustacchi /******************************************************************************* 317*d14abf15SRobert Mustacchi * RSS Hash Types 318*d14abf15SRobert Mustacchi ******************************************************************************/ 319*d14abf15SRobert Mustacchi 320*d14abf15SRobert Mustacchi typedef u32_t lm_rss_hash_t; 321*d14abf15SRobert Mustacchi 322*d14abf15SRobert Mustacchi #define LM_RSS_HASH_IPV4 0x00000100 323*d14abf15SRobert Mustacchi #define LM_RSS_HASH_TCP_IPV4 0x00000200 324*d14abf15SRobert Mustacchi #define LM_RSS_HASH_IPV6 0x00000400 325*d14abf15SRobert Mustacchi #define LM_RSS_HASH_IPV6_EX 0x00000800 326*d14abf15SRobert Mustacchi #define LM_RSS_HASH_TCP_IPV6 0x00001000 327*d14abf15SRobert Mustacchi #define LM_RSS_HASH_TCP_IPV6_EX 0x00002000 328*d14abf15SRobert Mustacchi 329*d14abf15SRobert Mustacchi 330*d14abf15SRobert Mustacchi 331*d14abf15SRobert Mustacchi /******************************************************************************* 332*d14abf15SRobert Mustacchi * Chip reset reasons. 333*d14abf15SRobert Mustacchi ******************************************************************************/ 334*d14abf15SRobert Mustacchi 335*d14abf15SRobert Mustacchi typedef enum 336*d14abf15SRobert Mustacchi { 337*d14abf15SRobert Mustacchi LM_REASON_NONE = 0, 338*d14abf15SRobert Mustacchi LM_REASON_DRIVER_RESET = 1, 339*d14abf15SRobert Mustacchi LM_REASON_DRIVER_UNLOAD = 2, 340*d14abf15SRobert Mustacchi LM_REASON_DRIVER_SHUTDOWN = 3, 341*d14abf15SRobert Mustacchi LM_REASON_WOL_SUSPEND = 4, 342*d14abf15SRobert Mustacchi LM_REASON_NO_WOL_SUSPEND = 5, 343*d14abf15SRobert Mustacchi LM_REASON_DIAG = 6, 344*d14abf15SRobert Mustacchi LM_REASON_DRIVER_UNLOAD_POWER_DOWN = 7, /* Power down phy/serdes */ 345*d14abf15SRobert Mustacchi LM_REASON_ERROR_RECOVERY = 8 346*d14abf15SRobert Mustacchi } lm_reason_t; 347*d14abf15SRobert Mustacchi 348*d14abf15SRobert Mustacchi 349*d14abf15SRobert Mustacchi 350*d14abf15SRobert Mustacchi /******************************************************************************* 351*d14abf15SRobert Mustacchi * Wake up mode. 352*d14abf15SRobert Mustacchi ******************************************************************************/ 353*d14abf15SRobert Mustacchi 354*d14abf15SRobert Mustacchi typedef u32_t lm_wake_up_mode_t; 355*d14abf15SRobert Mustacchi 356*d14abf15SRobert Mustacchi #define LM_WAKE_UP_MODE_NONE 0 357*d14abf15SRobert Mustacchi #define LM_WAKE_UP_MODE_MAGIC_PACKET 1 358*d14abf15SRobert Mustacchi #define LM_WAKE_UP_MODE_NWUF 2 359*d14abf15SRobert Mustacchi #define LM_WAKE_UP_MODE_LINK_CHANGE 4 360*d14abf15SRobert Mustacchi 361*d14abf15SRobert Mustacchi 362*d14abf15SRobert Mustacchi 363*d14abf15SRobert Mustacchi /******************************************************************************* 364*d14abf15SRobert Mustacchi * Event code. 365*d14abf15SRobert Mustacchi ******************************************************************************/ 366*d14abf15SRobert Mustacchi typedef enum 367*d14abf15SRobert Mustacchi { 368*d14abf15SRobert Mustacchi LM_EVENT_CODE_LINK_CHANGE = 0, 369*d14abf15SRobert Mustacchi LM_EVENT_CODE_PAUSE_OFFLOAD = 1, 370*d14abf15SRobert Mustacchi LM_EVENT_CODE_RESUME_OFFLOAD = 2, 371*d14abf15SRobert Mustacchi LM_EVENT_CODE_STOP_CHIP_ACCESS = 3, /* For Error Recovery Flow */ 372*d14abf15SRobert Mustacchi LM_EVENT_CODE_RESTART_CHIP_ACCESS = 4, /* For Error Recovery Flow */ 373*d14abf15SRobert Mustacchi LM_EVENT_CODE_UPLOAD_ALL = 5, 374*d14abf15SRobert Mustacchi LM_EVENT_CODE_DCBX_OPERA_CHANGE = 6, 375*d14abf15SRobert Mustacchi LM_EVENT_CODE_DCBX_REMOTE_CHANGE = 7, 376*d14abf15SRobert Mustacchi LM_EVENT_CODE_INVALIDATE_VF_BLOCK = 8, 377*d14abf15SRobert Mustacchi } lm_event_code_t; 378*d14abf15SRobert Mustacchi 379*d14abf15SRobert Mustacchi 380*d14abf15SRobert Mustacchi 381*d14abf15SRobert Mustacchi 382*d14abf15SRobert Mustacchi 383*d14abf15SRobert Mustacchi /******************************************************************************* 384*d14abf15SRobert Mustacchi * Transmit control flags. 385*d14abf15SRobert Mustacchi ******************************************************************************/ 386*d14abf15SRobert Mustacchi 387*d14abf15SRobert Mustacchi typedef u32_t lm_tx_flag_t; 388*d14abf15SRobert Mustacchi 389*d14abf15SRobert Mustacchi #define LM_TX_FLAG_INSERT_VLAN_TAG 0x01 390*d14abf15SRobert Mustacchi #define LM_TX_FLAG_COMPUTE_IP_CKSUM 0x02 391*d14abf15SRobert Mustacchi #define LM_TX_FLAG_COMPUTE_TCP_UDP_CKSUM 0x04 392*d14abf15SRobert Mustacchi #define LM_TX_FLAG_TCP_LSO_FRAME 0x08 393*d14abf15SRobert Mustacchi #define LM_TX_FLAG_TCP_LSO_SNAP_FRAME 0x10 394*d14abf15SRobert Mustacchi #define LM_TX_FLAG_COAL_NOW 0x20 395*d14abf15SRobert Mustacchi #define LM_TX_FLAG_DONT_COMPUTE_CRC 0x40 396*d14abf15SRobert Mustacchi #define LM_TX_FLAG_SKIP_MBQ_WRITE 0x80 397*d14abf15SRobert Mustacchi #define LM_TX_FLAG_IPV6_PACKET 0x100 398*d14abf15SRobert Mustacchi #define LM_TX_FLAG_VLAN_TAG_EXISTS 0x200 399*d14abf15SRobert Mustacchi /** 400*d14abf15SRobert Mustacchi * If this flag is set, the firmware will ignore global 401*d14abf15SRobert Mustacchi * configuration (except Outer VLAN)and will handle inner Vlan 402*d14abf15SRobert Mustacchi * only according to driver instructions on the bd: 403*d14abf15SRobert Mustacchi * 1. LM_TX_FLAG_VLAN_TAG_EXISTS. 404*d14abf15SRobert Mustacchi * 2. LM_TX_FLAG_INSERT_VLAN_TAG. 405*d14abf15SRobert Mustacchi * Note that if set the firmware will not handle default vlan / 406*d14abf15SRobert Mustacchi * NIV tag / DCB. 407*d14abf15SRobert Mustacchi */ 408*d14abf15SRobert Mustacchi #define LM_TX_FLAG_FORCE_VLAN_MODE 0x400 409*d14abf15SRobert Mustacchi /* Encapsulated packet offload flags. */ 410*d14abf15SRobert Mustacchi #define LM_TX_FLAG_IS_ENCAP_PACKET 0x800 411*d14abf15SRobert Mustacchi #define LM_TX_FLAG_ENCAP_PACKET_IS_INNER_IPV6 0x1000 412*d14abf15SRobert Mustacchi 413*d14abf15SRobert Mustacchi typedef struct _lm_pkt_tx_info_t 414*d14abf15SRobert Mustacchi { 415*d14abf15SRobert Mustacchi lm_tx_flag_t flags; 416*d14abf15SRobert Mustacchi 417*d14abf15SRobert Mustacchi u16_t vlan_tag; 418*d14abf15SRobert Mustacchi u16_t lso_mss; 419*d14abf15SRobert Mustacchi u16_t lso_ip_hdr_len; 420*d14abf15SRobert Mustacchi u16_t lso_tcp_hdr_len; 421*d14abf15SRobert Mustacchi u32_t lso_payload_len; 422*d14abf15SRobert Mustacchi 423*d14abf15SRobert Mustacchi /* Everest only fields. */ 424*d14abf15SRobert Mustacchi u32_t lso_tcp_send_seq; 425*d14abf15SRobert Mustacchi u16_t lso_ipid; 426*d14abf15SRobert Mustacchi u16_t tcp_pseudo_csum; 427*d14abf15SRobert Mustacchi u8_t lso_tcp_flags; 428*d14abf15SRobert Mustacchi u8_t tcp_nonce_sum_bit; 429*d14abf15SRobert Mustacchi u16_t fw_ip_csum; 430*d14abf15SRobert Mustacchi 431*d14abf15SRobert Mustacchi u8_t dst_mac_addr[8]; 432*d14abf15SRobert Mustacchi s8_t cs_any_offset; 433*d14abf15SRobert Mustacchi u8_t src_mac_addr[8]; 434*d14abf15SRobert Mustacchi u8_t _unused1; 435*d14abf15SRobert Mustacchi u8_t eth_type[4]; 436*d14abf15SRobert Mustacchi 437*d14abf15SRobert Mustacchi /* Encapsulated packet offsets. These fields are only valid when 438*d14abf15SRobert Mustacchi * LM_TX_FLAG_IS_ENCAP_PACKET is set. */ 439*d14abf15SRobert Mustacchi u8_t encap_packet_inner_frame_offset; 440*d14abf15SRobert Mustacchi u8_t encap_packet_inner_ip_relative_offset; 441*d14abf15SRobert Mustacchi u16_t encap_packet_inner_tcp_relative_offset; 442*d14abf15SRobert Mustacchi } lm_pkt_tx_info_t; 443*d14abf15SRobert Mustacchi 444*d14abf15SRobert Mustacchi 445*d14abf15SRobert Mustacchi 446*d14abf15SRobert Mustacchi /******************************************************************************* 447*d14abf15SRobert Mustacchi * Receive control flags. 448*d14abf15SRobert Mustacchi ******************************************************************************/ 449*d14abf15SRobert Mustacchi 450*d14abf15SRobert Mustacchi typedef u32_t lm_rx_flag_t; 451*d14abf15SRobert Mustacchi 452*d14abf15SRobert Mustacchi #define LM_RX_FLAG_VALID_VLAN_TAG 0x01 453*d14abf15SRobert Mustacchi #define LM_RX_FLAG_VALID_HASH_VALUE 0x10 454*d14abf15SRobert Mustacchi 455*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IS_IPV4_DATAGRAM 0x0100 456*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IS_IPV6_DATAGRAM 0x0200 457*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IP_CKSUM_IS_GOOD 0x0400 458*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IP_CKSUM_IS_BAD 0x0800 459*d14abf15SRobert Mustacchi 460*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IS_UDP_DATAGRAM 0x1000 461*d14abf15SRobert Mustacchi #define LM_RX_FLAG_UDP_CKSUM_IS_GOOD 0x2000 462*d14abf15SRobert Mustacchi #define LM_RX_FLAG_UDP_CKSUM_IS_BAD 0x4000 463*d14abf15SRobert Mustacchi 464*d14abf15SRobert Mustacchi #define LM_RX_FLAG_IS_TCP_SEGMENT 0x010000 465*d14abf15SRobert Mustacchi #define LM_RX_FLAG_TCP_CKSUM_IS_GOOD 0x020000 466*d14abf15SRobert Mustacchi #define LM_RX_FLAG_TCP_CKSUM_IS_BAD 0x040000 467*d14abf15SRobert Mustacchi #define LM_RX_FLAG_START_RSC_TPA 0x080000 468*d14abf15SRobert Mustacchi 469*d14abf15SRobert Mustacchi typedef struct _lm_pkt_rx_info_t 470*d14abf15SRobert Mustacchi { 471*d14abf15SRobert Mustacchi lm_rx_flag_t flags; 472*d14abf15SRobert Mustacchi 473*d14abf15SRobert Mustacchi u32_t size; 474*d14abf15SRobert Mustacchi 475*d14abf15SRobert Mustacchi u16_t vlan_tag; 476*d14abf15SRobert Mustacchi u16_t _pad; 477*d14abf15SRobert Mustacchi 478*d14abf15SRobert Mustacchi /* Virtual address corresponding to the first byte of the first SGL entry. 479*d14abf15SRobert Mustacchi * This is the starting location of the packet which may begin with some 480*d14abf15SRobert Mustacchi * control information. */ 481*d14abf15SRobert Mustacchi u8_t *mem_virt; 482*d14abf15SRobert Mustacchi u32_t mem_size; 483*d14abf15SRobert Mustacchi 484*d14abf15SRobert Mustacchi /* these fields only valid when LM_RX_FLAG_START_RSC_TPA is set */ 485*d14abf15SRobert Mustacchi u16_t coal_seg_cnt; 486*d14abf15SRobert Mustacchi u16_t dup_ack_cnt; 487*d14abf15SRobert Mustacchi u32_t ts_delta; /* valid when timestamp is enabled */ 488*d14abf15SRobert Mustacchi /* if the packet is RSC, this field will hold the total size of the 489*d14abf15SRobert Mustacchi * RSC SCU */ 490*d14abf15SRobert Mustacchi u32_t total_packet_size; 491*d14abf15SRobert Mustacchi 492*d14abf15SRobert Mustacchi u32_t unused; 493*d14abf15SRobert Mustacchi } lm_pkt_rx_info_t; 494*d14abf15SRobert Mustacchi 495*d14abf15SRobert Mustacchi 496*d14abf15SRobert Mustacchi 497*d14abf15SRobert Mustacchi /******************************************************************************* 498*d14abf15SRobert Mustacchi * various type of counters. 499*d14abf15SRobert Mustacchi ******************************************************************************/ 500*d14abf15SRobert Mustacchi 501*d14abf15SRobert Mustacchi typedef enum 502*d14abf15SRobert Mustacchi { 503*d14abf15SRobert Mustacchi LM_STATS_BASE = 0x686b3000, 504*d14abf15SRobert Mustacchi LM_STATS_FRAMES_XMITTED_OK = 0x686b3001, 505*d14abf15SRobert Mustacchi LM_STATS_FRAMES_RECEIVED_OK = 0x686b3002, 506*d14abf15SRobert Mustacchi LM_STATS_ERRORED_TRANSMIT_CNT = 0x686b3003, 507*d14abf15SRobert Mustacchi LM_STATS_ERRORED_RECEIVE_CNT = 0x686b3004, 508*d14abf15SRobert Mustacchi LM_STATS_RCV_CRC_ERROR = 0x686b3005, 509*d14abf15SRobert Mustacchi LM_STATS_ALIGNMENT_ERROR = 0x686b3006, 510*d14abf15SRobert Mustacchi LM_STATS_SINGLE_COLLISION_FRAMES = 0x686b3007, 511*d14abf15SRobert Mustacchi LM_STATS_MULTIPLE_COLLISION_FRAMES = 0x686b3008, 512*d14abf15SRobert Mustacchi LM_STATS_FRAMES_DEFERRED = 0x686b3009, 513*d14abf15SRobert Mustacchi LM_STATS_MAX_COLLISIONS = 0x686b300a, 514*d14abf15SRobert Mustacchi LM_STATS_RCV_OVERRUN = 0x686b300b, 515*d14abf15SRobert Mustacchi LM_STATS_XMIT_UNDERRUN = 0x686b300c, 516*d14abf15SRobert Mustacchi LM_STATS_UNICAST_FRAMES_XMIT = 0x686b300d, 517*d14abf15SRobert Mustacchi LM_STATS_MULTICAST_FRAMES_XMIT = 0x686b300e, 518*d14abf15SRobert Mustacchi LM_STATS_BROADCAST_FRAMES_XMIT = 0x686b300f, 519*d14abf15SRobert Mustacchi LM_STATS_UNICAST_FRAMES_RCV = 0x686b3010, 520*d14abf15SRobert Mustacchi LM_STATS_MULTICAST_FRAMES_RCV = 0x686b3011, 521*d14abf15SRobert Mustacchi LM_STATS_BROADCAST_FRAMES_RCV = 0x686b3012, 522*d14abf15SRobert Mustacchi LM_STATS_RCV_NO_BUFFER_DROP = 0x686b3013, 523*d14abf15SRobert Mustacchi LM_STATS_BYTES_RCV = 0x686b3014, 524*d14abf15SRobert Mustacchi LM_STATS_BYTES_XMIT = 0x686b3015, 525*d14abf15SRobert Mustacchi LM_STATS_IP4_OFFLOAD = 0x686b3016, 526*d14abf15SRobert Mustacchi LM_STATS_TCP_OFFLOAD = 0x686b3017, 527*d14abf15SRobert Mustacchi LM_STATS_IF_IN_DISCARDS = 0x686b3018, 528*d14abf15SRobert Mustacchi LM_STATS_IF_IN_ERRORS = 0x686b3019, 529*d14abf15SRobert Mustacchi LM_STATS_IF_OUT_ERRORS = 0x686b301a, 530*d14abf15SRobert Mustacchi LM_STATS_IP6_OFFLOAD = 0x686b301b, 531*d14abf15SRobert Mustacchi LM_STATS_TCP6_OFFLOAD = 0x686b301c, 532*d14abf15SRobert Mustacchi LM_STATS_XMIT_DISCARDS = 0x686b301d, 533*d14abf15SRobert Mustacchi LM_STATS_DIRECTED_BYTES_RCV = 0x686b301e, 534*d14abf15SRobert Mustacchi LM_STATS_MULTICAST_BYTES_RCV = 0x686b301f, 535*d14abf15SRobert Mustacchi LM_STATS_BROADCAST_BYTES_RCV = 0x686b3020, 536*d14abf15SRobert Mustacchi LM_STATS_DIRECTED_BYTES_XMIT = 0x686b3021, 537*d14abf15SRobert Mustacchi LM_STATS_MULTICAST_BYTES_XMIT = 0x686b3022, 538*d14abf15SRobert Mustacchi LM_STATS_BROADCAST_BYTES_XMIT = 0x686b3023, 539*d14abf15SRobert Mustacchi } lm_stats_t; 540*d14abf15SRobert Mustacchi 541*d14abf15SRobert Mustacchi #define NUM_OF_LM_STATS 36 542*d14abf15SRobert Mustacchi 543*d14abf15SRobert Mustacchi 544*d14abf15SRobert Mustacchi 545*d14abf15SRobert Mustacchi /******************************************************************************* 546*d14abf15SRobert Mustacchi * 64-bit value. 547*d14abf15SRobert Mustacchi ******************************************************************************/ 548*d14abf15SRobert Mustacchi 549*d14abf15SRobert Mustacchi typedef union _lm_u64_t 550*d14abf15SRobert Mustacchi { 551*d14abf15SRobert Mustacchi struct _lm_u64_as_u32_t 552*d14abf15SRobert Mustacchi { 553*d14abf15SRobert Mustacchi #ifdef BIG_ENDIAN_HOST 554*d14abf15SRobert Mustacchi u32_t high; 555*d14abf15SRobert Mustacchi u32_t low; 556*d14abf15SRobert Mustacchi #else 557*d14abf15SRobert Mustacchi u32_t low; 558*d14abf15SRobert Mustacchi u32_t high; 559*d14abf15SRobert Mustacchi #endif 560*d14abf15SRobert Mustacchi } as_u32; 561*d14abf15SRobert Mustacchi 562*d14abf15SRobert Mustacchi u64_t as_u64; 563*d14abf15SRobert Mustacchi 564*d14abf15SRobert Mustacchi void *as_ptr; 565*d14abf15SRobert Mustacchi } lm_u64_t; 566*d14abf15SRobert Mustacchi 567*d14abf15SRobert Mustacchi 568*d14abf15SRobert Mustacchi typedef lm_u64_t lm_address_t; 569*d14abf15SRobert Mustacchi 570*d14abf15SRobert Mustacchi 571*d14abf15SRobert Mustacchi /* 64-bit increment. The second argument is a 32-bit value. */ 572*d14abf15SRobert Mustacchi #define LM_INC64(result, addend32) \ 573*d14abf15SRobert Mustacchi { \ 574*d14abf15SRobert Mustacchi u32_t low; \ 575*d14abf15SRobert Mustacchi \ 576*d14abf15SRobert Mustacchi low = (result)->as_u32.low; \ 577*d14abf15SRobert Mustacchi (result)->as_u32.low += (addend32); \ 578*d14abf15SRobert Mustacchi if((result)->as_u32.low < low) \ 579*d14abf15SRobert Mustacchi { \ 580*d14abf15SRobert Mustacchi (result)->as_u32.high++; \ 581*d14abf15SRobert Mustacchi } \ 582*d14abf15SRobert Mustacchi } 583*d14abf15SRobert Mustacchi 584*d14abf15SRobert Mustacchi 585*d14abf15SRobert Mustacchi /* 64-bit decrement. The second argument is a 32-bit value. */ 586*d14abf15SRobert Mustacchi #define LM_DEC64(result, addend32) \ 587*d14abf15SRobert Mustacchi { \ 588*d14abf15SRobert Mustacchi u32_t low; \ 589*d14abf15SRobert Mustacchi \ 590*d14abf15SRobert Mustacchi low = (result)->as_u32.low; \ 591*d14abf15SRobert Mustacchi (result)->as_u32.low -= (addend32); \ 592*d14abf15SRobert Mustacchi if((result)->as_u32.low > low) \ 593*d14abf15SRobert Mustacchi { \ 594*d14abf15SRobert Mustacchi (result)->as_u32.high--; \ 595*d14abf15SRobert Mustacchi } \ 596*d14abf15SRobert Mustacchi } 597*d14abf15SRobert Mustacchi 598*d14abf15SRobert Mustacchi /******************************************************************************* 599*d14abf15SRobert Mustacchi * IP4 and TCP offload stats. 600*d14abf15SRobert Mustacchi ******************************************************************************/ 601*d14abf15SRobert Mustacchi 602*d14abf15SRobert Mustacchi typedef struct _lm_ip4_offload_stats_t 603*d14abf15SRobert Mustacchi { 604*d14abf15SRobert Mustacchi u64_t in_receives; 605*d14abf15SRobert Mustacchi u64_t in_delivers; 606*d14abf15SRobert Mustacchi u64_t out_requests; 607*d14abf15SRobert Mustacchi u32_t in_header_errors; 608*d14abf15SRobert Mustacchi u32_t in_discards; 609*d14abf15SRobert Mustacchi u32_t out_discards; 610*d14abf15SRobert Mustacchi u32_t out_no_routes; 611*d14abf15SRobert Mustacchi 612*d14abf15SRobert Mustacchi u32_t _pad[8]; 613*d14abf15SRobert Mustacchi } lm_ip4_offload_stats_t; 614*d14abf15SRobert Mustacchi 615*d14abf15SRobert Mustacchi 616*d14abf15SRobert Mustacchi typedef struct _lm_tcp_offload_stats_t 617*d14abf15SRobert Mustacchi { 618*d14abf15SRobert Mustacchi u64_t in_segments; 619*d14abf15SRobert Mustacchi u64_t out_segments; 620*d14abf15SRobert Mustacchi u32_t retran_segments; 621*d14abf15SRobert Mustacchi u32_t in_errors; 622*d14abf15SRobert Mustacchi u32_t out_resets; 623*d14abf15SRobert Mustacchi 624*d14abf15SRobert Mustacchi u32_t _pad[8]; 625*d14abf15SRobert Mustacchi } lm_tcp_offload_stats_t; 626*d14abf15SRobert Mustacchi 627*d14abf15SRobert Mustacchi 628*d14abf15SRobert Mustacchi 629*d14abf15SRobert Mustacchi /******************************************************************************* 630*d14abf15SRobert Mustacchi * Host to network order conversion. 631*d14abf15SRobert Mustacchi ******************************************************************************/ 632*d14abf15SRobert Mustacchi 633*d14abf15SRobert Mustacchi #ifdef BIG_ENDIAN_HOST 634*d14abf15SRobert Mustacchi 635*d14abf15SRobert Mustacchi #ifndef HTON16 636*d14abf15SRobert Mustacchi #define HTON16(_val16) (_val16) 637*d14abf15SRobert Mustacchi #endif 638*d14abf15SRobert Mustacchi #ifndef HTON32 639*d14abf15SRobert Mustacchi #define HTON32(_val32) (_val32) 640*d14abf15SRobert Mustacchi #ifndef NTOH16 641*d14abf15SRobert Mustacchi #endif 642*d14abf15SRobert Mustacchi #define NTOH16(_val16) (_val16) 643*d14abf15SRobert Mustacchi #endif 644*d14abf15SRobert Mustacchi #ifndef NTOH32 645*d14abf15SRobert Mustacchi #define NTOH32(_val32) (_val32) 646*d14abf15SRobert Mustacchi #endif 647*d14abf15SRobert Mustacchi 648*d14abf15SRobert Mustacchi #else 649*d14abf15SRobert Mustacchi 650*d14abf15SRobert Mustacchi #ifndef HTON16 651*d14abf15SRobert Mustacchi #define HTON16(_val16) (((_val16 & 0xff00) >> 8) | ((_val16 & 0xff) << 8)) 652*d14abf15SRobert Mustacchi #endif 653*d14abf15SRobert Mustacchi #ifndef HTON32 654*d14abf15SRobert Mustacchi #define HTON32(_val32) ((HTON16(_val32) << 16) | (HTON16(_val32 >> 16))) 655*d14abf15SRobert Mustacchi #endif 656*d14abf15SRobert Mustacchi #ifndef NTOH16 657*d14abf15SRobert Mustacchi #define NTOH16(_val16) HTON16(_val16) 658*d14abf15SRobert Mustacchi #endif 659*d14abf15SRobert Mustacchi #ifndef NTOH32 660*d14abf15SRobert Mustacchi #define NTOH32(_val32) HTON32(_val32) 661*d14abf15SRobert Mustacchi #endif 662*d14abf15SRobert Mustacchi 663*d14abf15SRobert Mustacchi #endif 664*d14abf15SRobert Mustacchi 665*d14abf15SRobert Mustacchi 666*d14abf15SRobert Mustacchi 667*d14abf15SRobert Mustacchi /******************************************************************************* 668*d14abf15SRobert Mustacchi * Fragment structure. 669*d14abf15SRobert Mustacchi ******************************************************************************/ 670*d14abf15SRobert Mustacchi 671*d14abf15SRobert Mustacchi typedef struct _lm_frag_t 672*d14abf15SRobert Mustacchi { 673*d14abf15SRobert Mustacchi lm_address_t addr; 674*d14abf15SRobert Mustacchi u32_t size; 675*d14abf15SRobert Mustacchi 676*d14abf15SRobert Mustacchi #if defined(_WIN64) /* mirror the SCATTER_GATHER_ELEMENT structure. */ 677*d14abf15SRobert Mustacchi u64_t _reserved; 678*d14abf15SRobert Mustacchi #else 679*d14abf15SRobert Mustacchi u32_t _reserved; 680*d14abf15SRobert Mustacchi #endif 681*d14abf15SRobert Mustacchi } lm_frag_t; 682*d14abf15SRobert Mustacchi 683*d14abf15SRobert Mustacchi typedef struct _lm_frag_list_t 684*d14abf15SRobert Mustacchi { 685*d14abf15SRobert Mustacchi u32_t cnt; 686*d14abf15SRobert Mustacchi 687*d14abf15SRobert Mustacchi #if defined(_WIN64) /* mirror the SCATTER_GATHER_LIST structure. */ 688*d14abf15SRobert Mustacchi u64_t size; 689*d14abf15SRobert Mustacchi #else 690*d14abf15SRobert Mustacchi u32_t size; 691*d14abf15SRobert Mustacchi #endif 692*d14abf15SRobert Mustacchi 693*d14abf15SRobert Mustacchi lm_frag_t frag_arr[1]; 694*d14abf15SRobert Mustacchi } lm_frag_list_t; 695*d14abf15SRobert Mustacchi 696*d14abf15SRobert Mustacchi /* a macro for declaring 'lm_frag_list_t' with various array sizes. */ 697*d14abf15SRobert Mustacchi #define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_CNT) \ 698*d14abf15SRobert Mustacchi typedef struct _##_FRAG_LIST_TYPE_NAME \ 699*d14abf15SRobert Mustacchi { \ 700*d14abf15SRobert Mustacchi lm_frag_list_t list; \ 701*d14abf15SRobert Mustacchi lm_frag_t frag_arr[_MAX_FRAG_CNT-1]; \ 702*d14abf15SRobert Mustacchi } _FRAG_LIST_TYPE_NAME 703*d14abf15SRobert Mustacchi 704*d14abf15SRobert Mustacchi 705*d14abf15SRobert Mustacchi 706*d14abf15SRobert Mustacchi /******************************************************************************* 707*d14abf15SRobert Mustacchi * DCBX indicate event parameters. 708*d14abf15SRobert Mustacchi ******************************************************************************/ 709*d14abf15SRobert Mustacchi typedef enum _dcb_condition_selector_t 710*d14abf15SRobert Mustacchi { 711*d14abf15SRobert Mustacchi DCB_CONDITION_RESERVED, 712*d14abf15SRobert Mustacchi DCB_CONDITION_DEFAULT, 713*d14abf15SRobert Mustacchi DCB_CONDITION_TCP_PORT, 714*d14abf15SRobert Mustacchi DCB_CONDITION_UDP_PORT, 715*d14abf15SRobert Mustacchi DCB_CONDITION_TCP_OR_UDP_PORT, 716*d14abf15SRobert Mustacchi DCB_CONDITION_ETHERTYPE, 717*d14abf15SRobert Mustacchi DCB_CONDITION_NETDIRECT_PORT, 718*d14abf15SRobert Mustacchi DCB_CONDITION_MAX, 719*d14abf15SRobert Mustacchi }dcb_condition_selector_t; 720*d14abf15SRobert Mustacchi 721*d14abf15SRobert Mustacchi typedef enum _action_selector_t 722*d14abf15SRobert Mustacchi { 723*d14abf15SRobert Mustacchi DCB_ACTION_PRIORITY, 724*d14abf15SRobert Mustacchi DCB_ACTION_MAX, 725*d14abf15SRobert Mustacchi } action_selector_t; 726*d14abf15SRobert Mustacchi 727*d14abf15SRobert Mustacchi typedef struct _dcb_classif_elem_t 728*d14abf15SRobert Mustacchi { 729*d14abf15SRobert Mustacchi u32_t flags; 730*d14abf15SRobert Mustacchi #define DCB_CLASSIF_ENFORCED_BY_VBD 0x1 731*d14abf15SRobert Mustacchi dcb_condition_selector_t condition_selector; 732*d14abf15SRobert Mustacchi u16_t condition_field; 733*d14abf15SRobert Mustacchi action_selector_t action_selector; 734*d14abf15SRobert Mustacchi u16_t action_field; 735*d14abf15SRobert Mustacchi }dcb_classif_elem_t; 736*d14abf15SRobert Mustacchi 737*d14abf15SRobert Mustacchi typedef enum _dcb_classif_version_t 738*d14abf15SRobert Mustacchi { 739*d14abf15SRobert Mustacchi DCB_CLASSIFI_VER_SIMPLE_ELEM, 740*d14abf15SRobert Mustacchi DCB_CLASSIFI_VER_SIMPLE_ELEM_MAX, 741*d14abf15SRobert Mustacchi }dcb_classif_version_t; 742*d14abf15SRobert Mustacchi 743*d14abf15SRobert Mustacchi typedef struct _dcb_classif_params_t 744*d14abf15SRobert Mustacchi { 745*d14abf15SRobert Mustacchi u16_t num_classif_elements; 746*d14abf15SRobert Mustacchi u16_t _pad; 747*d14abf15SRobert Mustacchi dcb_classif_version_t classif_version; 748*d14abf15SRobert Mustacchi void *classif_table; 749*d14abf15SRobert Mustacchi }dcb_classif_params_t; 750*d14abf15SRobert Mustacchi 751*d14abf15SRobert Mustacchi typedef struct _dcb_pfc_param_t 752*d14abf15SRobert Mustacchi { 753*d14abf15SRobert Mustacchi u32_t pfc_enable; 754*d14abf15SRobert Mustacchi #define DCB_PFC_MAX_BIT_ENABLE_MASK (0xFF) 755*d14abf15SRobert Mustacchi }dcb_pfc_param_t; 756*d14abf15SRobert Mustacchi 757*d14abf15SRobert Mustacchi typedef enum _tsa_assignment 758*d14abf15SRobert Mustacchi { 759*d14abf15SRobert Mustacchi TSA_ASSIGNMENT_DCB_TSA_STRICT, 760*d14abf15SRobert Mustacchi TSA_ASSIGNMENT_DCB_TSA_CBS, 761*d14abf15SRobert Mustacchi TSA_ASSIGNMENT_DCB_TSA_ETS, 762*d14abf15SRobert Mustacchi }tsa_assignment; 763*d14abf15SRobert Mustacchi 764*d14abf15SRobert Mustacchi typedef struct _dcb_ets_tsa_param_t 765*d14abf15SRobert Mustacchi { 766*d14abf15SRobert Mustacchi u32_t num_traffic_classes; 767*d14abf15SRobert Mustacchi u8_t priority_assignment_table[8]; 768*d14abf15SRobert Mustacchi u8_t tc_bw_assignment_table[8]; 769*d14abf15SRobert Mustacchi tsa_assignment tsa_assignment_table[8]; 770*d14abf15SRobert Mustacchi } dcb_ets_tsa_param_t; 771*d14abf15SRobert Mustacchi 772*d14abf15SRobert Mustacchi typedef struct _dcb_indicate_event_params_t 773*d14abf15SRobert Mustacchi { 774*d14abf15SRobert Mustacchi u32_t flags; 775*d14abf15SRobert Mustacchi #define DCB_PARAMS_ETS_ENABLED 0x00000001 776*d14abf15SRobert Mustacchi #define DCB_PARAMS_ETS_CHANGED 0x00000002 777*d14abf15SRobert Mustacchi #define DCB_PARAMS_PFC_ENABLED 0x00000004 778*d14abf15SRobert Mustacchi #define DCB_PARAMS_PFC_CHANGED 0x00000008 779*d14abf15SRobert Mustacchi #define DCB_PARAMS_CLASSIF_ENABLED 0x00000020 780*d14abf15SRobert Mustacchi #define DCB_PARAMS_CLASSIF_CHANGED 0x00000040 781*d14abf15SRobert Mustacchi #define DCB_PARAMS_WILLING 0x00000080 782*d14abf15SRobert Mustacchi 783*d14abf15SRobert Mustacchi dcb_ets_tsa_param_t ets_params; 784*d14abf15SRobert Mustacchi dcb_pfc_param_t pfc_params; 785*d14abf15SRobert Mustacchi dcb_classif_params_t classif_params; 786*d14abf15SRobert Mustacchi u32_t reserved[4]; 787*d14abf15SRobert Mustacchi } dcb_indicate_event_params_t; 788*d14abf15SRobert Mustacchi 789*d14abf15SRobert Mustacchi /******************************************************************************* 790*d14abf15SRobert Mustacchi * Macro fore calculating the address of the base of the structure given its 791*d14abf15SRobert Mustacchi * type, and an address of a field within the structure. 792*d14abf15SRobert Mustacchi ******************************************************************************/ 793*d14abf15SRobert Mustacchi 794*d14abf15SRobert Mustacchi #define GET_CONTAINING_RECORD(address, type, field) \ 795*d14abf15SRobert Mustacchi ((type *) ((u8_t *) (address) - (u8_t *) (&((type *) 0)->field))) 796*d14abf15SRobert Mustacchi 797*d14abf15SRobert Mustacchi 798*d14abf15SRobert Mustacchi 799*d14abf15SRobert Mustacchi /******************************************************************************* 800*d14abf15SRobert Mustacchi * Simple macros. 801*d14abf15SRobert Mustacchi ******************************************************************************/ 802*d14abf15SRobert Mustacchi 803*d14abf15SRobert Mustacchi #define IS_ETH_BROADCAST(eth_addr) \ 804*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr))[0] == ((unsigned char) 0xff)) 805*d14abf15SRobert Mustacchi 806*d14abf15SRobert Mustacchi #define IS_ETH_MULTICAST(eth_addr) \ 807*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr))[0] & ((unsigned char) 0x01)) 808*d14abf15SRobert Mustacchi 809*d14abf15SRobert Mustacchi #define IS_ETH_ADDRESS_EQUAL(eth_addr1, eth_addr2) \ 810*d14abf15SRobert Mustacchi ((((unsigned char *) (eth_addr1))[0] == \ 811*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[0]) && \ 812*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr1))[1] == \ 813*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[1]) && \ 814*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr1))[2] == \ 815*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[2]) && \ 816*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr1))[3] == \ 817*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[3]) && \ 818*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr1))[4] == \ 819*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[4]) && \ 820*d14abf15SRobert Mustacchi (((unsigned char *) (eth_addr1))[5] == \ 821*d14abf15SRobert Mustacchi ((unsigned char *) (eth_addr2))[5])) 822*d14abf15SRobert Mustacchi 823*d14abf15SRobert Mustacchi #define COPY_ETH_ADDRESS(src, dst) \ 824*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[0] = ((unsigned char *) (src))[0]; \ 825*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[1] = ((unsigned char *) (src))[1]; \ 826*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[2] = ((unsigned char *) (src))[2]; \ 827*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[3] = ((unsigned char *) (src))[3]; \ 828*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[4] = ((unsigned char *) (src))[4]; \ 829*d14abf15SRobert Mustacchi ((unsigned char *) (dst))[5] = ((unsigned char *) (src))[5]; 830*d14abf15SRobert Mustacchi 831*d14abf15SRobert Mustacchi #endif /* _LM_DEFS_H */ 832