1*d14abf15SRobert Mustacchi /******************************************************************************* 2*d14abf15SRobert Mustacchi * lm_l5st.h - L5 lm data structures 3*d14abf15SRobert Mustacchi ******************************************************************************/ 4*d14abf15SRobert Mustacchi #ifndef _LM_L5ST_H 5*d14abf15SRobert Mustacchi #define _LM_L5ST_H 6*d14abf15SRobert Mustacchi 7*d14abf15SRobert Mustacchi 8*d14abf15SRobert Mustacchi #include "everest_iscsi_constants.h" 9*d14abf15SRobert Mustacchi #include "57xx_fcoe_constants.h" 10*d14abf15SRobert Mustacchi #include "57xx_iscsi_constants.h" 11*d14abf15SRobert Mustacchi #include "57xx_iscsi_rfc_constants.h" 12*d14abf15SRobert Mustacchi 13*d14abf15SRobert Mustacchi #include "lm_l4st.h" 14*d14abf15SRobert Mustacchi 15*d14abf15SRobert Mustacchi 16*d14abf15SRobert Mustacchi /* utility macros */ 17*d14abf15SRobert Mustacchi #define SET_FIELD(fieldName, mask, newVal) ((fieldName) = (((fieldName) & ~mask) | (((newVal) << mask ## _SHIFT) & mask))) 18*d14abf15SRobert Mustacchi #define GET_FIELD(fieldName, mask) (((fieldName) & mask) >> mask ## _SHIFT) 19*d14abf15SRobert Mustacchi 20*d14abf15SRobert Mustacchi 21*d14abf15SRobert Mustacchi #define ISCSI_LICENSE_CONNECTION_LIMIT (0xffff) /* TODO: add iSCSI licensing support */ 22*d14abf15SRobert Mustacchi 23*d14abf15SRobert Mustacchi /*This is needed because the BD chain has not been set yet*/ 24*d14abf15SRobert Mustacchi /* The number of bds (EQEs) per page including the last bd which is used as 25*d14abf15SRobert Mustacchi * a pointer to the next bd page. */ 26*d14abf15SRobert Mustacchi #define ISCSI_EQES_PER_PAGE(_is_next_ptr_needed) (USABLE_BDS_PER_PAGE(sizeof(struct iscsi_kcqe),_is_next_ptr_needed)) 27*d14abf15SRobert Mustacchi #define FCOE_EQES_PER_PAGE(_is_next_ptr_needed) (USABLE_BDS_PER_PAGE(sizeof(struct fcoe_kcqe),_is_next_ptr_needed)) 28*d14abf15SRobert Mustacchi 29*d14abf15SRobert Mustacchi 30*d14abf15SRobert Mustacchi /* offset within a EQ page of the next page address */ 31*d14abf15SRobert Mustacchi #define NEXT_EQ_PAGE_ADDRESS_OFFSET (LM_PAGE_SIZE - sizeof(struct iscsi_kcqe)) 32*d14abf15SRobert Mustacchi 33*d14abf15SRobert Mustacchi /* max number of eq chains, everst convention */ 34*d14abf15SRobert Mustacchi #define MAX_EQ_CHAIN (ISCSI_NUM_OF_CQS*8) /* per function */ 35*d14abf15SRobert Mustacchi 36*d14abf15SRobert Mustacchi /* max EQ pages limitation */ 37*d14abf15SRobert Mustacchi #define MAX_EQ_PAGES (256) 38*d14abf15SRobert Mustacchi 39*d14abf15SRobert Mustacchi 40*d14abf15SRobert Mustacchi /* The number of useable bds per page. This number does not include 41*d14abf15SRobert Mustacchi * the last bd at the end of the page. */ 42*d14abf15SRobert Mustacchi //#define MAX_EQ_BD_PER_PAGE ((u32_t) (ISCSI_EQES_PER_PAGE - 1)) 43*d14abf15SRobert Mustacchi 44*d14abf15SRobert Mustacchi #define MAX_EQ_SIZE_FCOE(_is_next_ptr_needed) (MAX_EQ_PAGES * (FCOE_EQES_PER_PAGE(_is_next_ptr_needed) -1)) 45*d14abf15SRobert Mustacchi #define MAX_EQ_SIZE_ISCSI(_is_next_ptr_needed) (MAX_EQ_PAGES * (ISCSI_EQES_PER_PAGE(_is_next_ptr_needed) -1)) 46*d14abf15SRobert Mustacchi /* number of bits to shift to edjeust the page_size from the kwqe_init2 to 0 */ 47*d14abf15SRobert Mustacchi #define ISCSI_PAGE_BITS_SHIFT (8) 48*d14abf15SRobert Mustacchi 49*d14abf15SRobert Mustacchi /* layer mask value in the KCQEs */ 50*d14abf15SRobert Mustacchi #define KCQE_FLAGS_LAYER_MASK_L6 (ISCSI_KWQE_LAYER_CODE<<4) 51*d14abf15SRobert Mustacchi 52*d14abf15SRobert Mustacchi /* pbl data */ 53*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_pbl_t 54*d14abf15SRobert Mustacchi { 55*d14abf15SRobert Mustacchi void *base_virt; 56*d14abf15SRobert Mustacchi lm_address_t base_phy; 57*d14abf15SRobert Mustacchi u32_t base_size; /* size allocated in bytes */ 58*d14abf15SRobert Mustacchi 59*d14abf15SRobert Mustacchi lm_address_t *pbl_phys_table_virt; 60*d14abf15SRobert Mustacchi lm_address_t pbl_phys_table_phys; 61*d14abf15SRobert Mustacchi void *pbl_virt_table; 62*d14abf15SRobert Mustacchi u32_t pbl_size; /* size allocated in bytes */ 63*d14abf15SRobert Mustacchi u32_t pbl_entries;/* number of entries in PBL */ 64*d14abf15SRobert Mustacchi } lm_iscsi_pbl_t; 65*d14abf15SRobert Mustacchi 66*d14abf15SRobert Mustacchi 67*d14abf15SRobert Mustacchi 68*d14abf15SRobert Mustacchi typedef struct _lm_eq_addr_t 69*d14abf15SRobert Mustacchi { 70*d14abf15SRobert Mustacchi u8_t b_allocated; 71*d14abf15SRobert Mustacchi u32_t prev_mem_size; 72*d14abf15SRobert Mustacchi void *bd_chain_virt; /* virt addr of first page of the chain */ 73*d14abf15SRobert Mustacchi lm_address_t bd_chain_phy; /* phys addr of first page of the chain */ 74*d14abf15SRobert Mustacchi }lm_eq_addr_t; 75*d14abf15SRobert Mustacchi 76*d14abf15SRobert Mustacchi typedef struct _lm_eq_addr_save_t 77*d14abf15SRobert Mustacchi { 78*d14abf15SRobert Mustacchi lm_eq_addr_t eq_addr[MAX_EQ_CHAIN]; 79*d14abf15SRobert Mustacchi }lm_eq_addr_save_t; 80*d14abf15SRobert Mustacchi 81*d14abf15SRobert Mustacchi /******************************************************************************* 82*d14abf15SRobert Mustacchi * iSCSI info that will be allocated in the bind phase. 83*d14abf15SRobert Mustacchi * This is the only parameters that stays valid when iscsi goes to hibernate. 84*d14abf15SRobert Mustacchi ******************************************************************************/ 85*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_info_bind_alloc_t 86*d14abf15SRobert Mustacchi { 87*d14abf15SRobert Mustacchi u8_t *global_buff_base_virt; 88*d14abf15SRobert Mustacchi lm_address_t global_buff_base_phy; 89*d14abf15SRobert Mustacchi }lm_iscsi_info_bind_alloc_t; 90*d14abf15SRobert Mustacchi 91*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_statistics_t 92*d14abf15SRobert Mustacchi { 93*d14abf15SRobert Mustacchi u32_t total_ofld; /* cyclic counter of number of offloaded tcp states */ 94*d14abf15SRobert Mustacchi u32_t total_upld; /* cyclic counter of number of uploaded tcp states */ 95*d14abf15SRobert Mustacchi }lm_iscsi_statistics_t; 96*d14abf15SRobert Mustacchi 97*d14abf15SRobert Mustacchi /******************************************************************************* 98*d14abf15SRobert Mustacchi * iSCSI info that will be allocated in the bind phase. 99*d14abf15SRobert Mustacchi * These parameters become not valid when iscsi goes to hibernate. 100*d14abf15SRobert Mustacchi ******************************************************************************/ 101*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_info_real_time_t 102*d14abf15SRobert Mustacchi { 103*d14abf15SRobert Mustacchi lm_state_block_t state_blk; 104*d14abf15SRobert Mustacchi d_list_t iscsi_list; 105*d14abf15SRobert Mustacchi 106*d14abf15SRobert Mustacchi u32_t num_of_tasks; 107*d14abf15SRobert Mustacchi u8_t num_of_cqs; 108*d14abf15SRobert Mustacchi u32_t cq_size; 109*d14abf15SRobert Mustacchi u16_t hq_size; 110*d14abf15SRobert Mustacchi 111*d14abf15SRobert Mustacchi lm_eq_chain_t eq_chain[MAX_EQ_CHAIN]; 112*d14abf15SRobert Mustacchi #define LM_SC_EQ(_pdev, _idx) (_pdev)->iscsi_info.run_time.eq_chain[_idx] 113*d14abf15SRobert Mustacchi 114*d14abf15SRobert Mustacchi /* L5 eq */ 115*d14abf15SRobert Mustacchi u8_t l5_eq_chain_cnt; /* number of L5 eq chains. currently equals num_of_cqs equals 1 */ 116*d14abf15SRobert Mustacchi u8_t l5_eq_base_chain_idx; /* L5 eq base chain Where do the L5 status block start */ 117*d14abf15SRobert Mustacchi u16_t _pad_l5_eq; 118*d14abf15SRobert Mustacchi u32_t l5_eq_max_chain_cnt; /* registry param --> 32 bit */ 119*d14abf15SRobert Mustacchi #define LM_SC_EQ_BASE_CHAIN_INDEX(pdev) ((pdev)->iscsi_info.run_time.l5_eq_base_chain_idx) /* that is first L5 SB */ 120*d14abf15SRobert Mustacchi #define LM_SC_EQ_CHAIN_CNT(pdev) ((pdev)->iscsi_info.run_time.l5_eq_chain_cnt) 121*d14abf15SRobert Mustacchi #define LM_SC_MAX_CHAIN_CNT(pdev) ((pdev)->iscsi_info.run_time.l5_eq_max_chain_cnt) 122*d14abf15SRobert Mustacchi 123*d14abf15SRobert Mustacchi 124*d14abf15SRobert Mustacchi /* 'for loop' macros on L5 eq chains */ 125*d14abf15SRobert Mustacchi #define LM_SC_FOREACH_EQ_IDX(pdev, eq_idx) \ 126*d14abf15SRobert Mustacchi for ((eq_idx) = (pdev)->iscsi_info.run_time.l5_eq_base_chain_idx; (eq_idx) < (u32_t)((pdev)->iscsi_info.run_time.l5_eq_base_chain_idx + (pdev)->iscsi_info.run_time.l5_eq_chain_cnt); (eq_idx)++) 127*d14abf15SRobert Mustacchi 128*d14abf15SRobert Mustacchi lm_iscsi_statistics_t stats; 129*d14abf15SRobert Mustacchi }lm_iscsi_info_run_time_t; 130*d14abf15SRobert Mustacchi /******************************************************************************* 131*d14abf15SRobert Mustacchi * iSCSI info. 132*d14abf15SRobert Mustacchi ******************************************************************************/ 133*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_info_t 134*d14abf15SRobert Mustacchi { 135*d14abf15SRobert Mustacchi struct _lm_device_t *pdev; 136*d14abf15SRobert Mustacchi // Paramters that stay valid in D3 and are allocated in bind time. 137*d14abf15SRobert Mustacchi lm_iscsi_info_bind_alloc_t bind; 138*d14abf15SRobert Mustacchi lm_eq_addr_save_t eq_addr_save; 139*d14abf15SRobert Mustacchi #define LM_EQ_ADDR_SAVE_SC(_pdev, _idx) (_pdev)->iscsi_info.eq_addr_save.eq_addr[_idx] 140*d14abf15SRobert Mustacchi // Paramters that are not valid in D3 and are allocated after bind time. 141*d14abf15SRobert Mustacchi lm_iscsi_info_run_time_t run_time; 142*d14abf15SRobert Mustacchi } lm_iscsi_info_t; 143*d14abf15SRobert Mustacchi 144*d14abf15SRobert Mustacchi 145*d14abf15SRobert Mustacchi struct iscsi_update_ramrod_cached_params 146*d14abf15SRobert Mustacchi { 147*d14abf15SRobert Mustacchi struct iscsi_kwqe_conn_update kwqe; 148*d14abf15SRobert Mustacchi }; 149*d14abf15SRobert Mustacchi 150*d14abf15SRobert Mustacchi 151*d14abf15SRobert Mustacchi typedef union _lm_iscsi_slow_path_phys_data_t 152*d14abf15SRobert Mustacchi { 153*d14abf15SRobert Mustacchi struct iscsi_context iscsi_ctx; /* used by query slow path request */ 154*d14abf15SRobert Mustacchi struct iscsi_update_ramrod_cached_params update_ctx; /* used by update slow path request */ 155*d14abf15SRobert Mustacchi 156*d14abf15SRobert Mustacchi } lm_iscsi_slow_path_phys_data_t; 157*d14abf15SRobert Mustacchi 158*d14abf15SRobert Mustacchi 159*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_slow_path_data_t { 160*d14abf15SRobert Mustacchi lm_iscsi_slow_path_phys_data_t * virt_addr; 161*d14abf15SRobert Mustacchi lm_address_t phys_addr; 162*d14abf15SRobert Mustacchi }lm_iscsi_slow_path_data_t ; 163*d14abf15SRobert Mustacchi 164*d14abf15SRobert Mustacchi 165*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_slow_path_request_t 166*d14abf15SRobert Mustacchi { 167*d14abf15SRobert Mustacchi lm_sp_req_common_t sp_req_common; 168*d14abf15SRobert Mustacchi lm_iscsi_slow_path_data_t sp_req_data; 169*d14abf15SRobert Mustacchi 170*d14abf15SRobert Mustacchi u32_t type; 171*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_INIT 0 172*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_ADD_NEW_CONNECTION 1 173*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_UPDATE 2 174*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_TERMINATE_OFFLOAD 3 175*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_TERMINATE1_OFFLOAD 4 176*d14abf15SRobert Mustacchi #define SP_REQUEST_SC_QUERY 5 177*d14abf15SRobert Mustacchi 178*d14abf15SRobert Mustacchi lm_status_t status; /* request completion status */ 179*d14abf15SRobert Mustacchi } lm_iscsi_slow_path_request_t; 180*d14abf15SRobert Mustacchi 181*d14abf15SRobert Mustacchi 182*d14abf15SRobert Mustacchi typedef struct _lm_iscsi_state_t 183*d14abf15SRobert Mustacchi { 184*d14abf15SRobert Mustacchi lm_state_header_t hdr; 185*d14abf15SRobert Mustacchi struct iscsi_context* ctx_virt; 186*d14abf15SRobert Mustacchi lm_address_t ctx_phys; 187*d14abf15SRobert Mustacchi u32_t cid; 188*d14abf15SRobert Mustacchi u16_t iscsi_conn_id; /* Drivers connection ID. */ 189*d14abf15SRobert Mustacchi u8_t b_keep_resources; 190*d14abf15SRobert Mustacchi u8_t b_resources_allocated; 191*d14abf15SRobert Mustacchi 192*d14abf15SRobert Mustacchi lm_iscsi_slow_path_data_t sp_req_data; 193*d14abf15SRobert Mustacchi 194*d14abf15SRobert Mustacchi void *db_data; 195*d14abf15SRobert Mustacchi lm_address_t phys_db_data; 196*d14abf15SRobert Mustacchi 197*d14abf15SRobert Mustacchi lm_iscsi_pbl_t task_array; 198*d14abf15SRobert Mustacchi lm_iscsi_pbl_t r2tq; 199*d14abf15SRobert Mustacchi lm_iscsi_pbl_t hq; 200*d14abf15SRobert Mustacchi 201*d14abf15SRobert Mustacchi //iscsi_kwqe_t **pending_kwqes; 202*d14abf15SRobert Mustacchi struct iscsi_kwqe_conn_offload1 pending_ofld1; 203*d14abf15SRobert Mustacchi struct iscsi_kwqe_conn_offload2 pending_ofld2; 204*d14abf15SRobert Mustacchi struct iscsi_kwqe_conn_offload3 pending_ofld3; 205*d14abf15SRobert Mustacchi 206*d14abf15SRobert Mustacchi 207*d14abf15SRobert Mustacchi } lm_iscsi_state_t; 208*d14abf15SRobert Mustacchi 209*d14abf15SRobert Mustacchi 210*d14abf15SRobert Mustacchi /* RAMRODs used for FCOE */ 211*d14abf15SRobert Mustacchi typedef union _lm_fcoe_slow_path_phys_data_t 212*d14abf15SRobert Mustacchi { 213*d14abf15SRobert Mustacchi struct fcoe_init_ramrod_params fcoe_init; 214*d14abf15SRobert Mustacchi struct fcoe_conn_offload_ramrod_params fcoe_ofld; 215*d14abf15SRobert Mustacchi struct fcoe_conn_enable_disable_ramrod_params fcoe_enable; 216*d14abf15SRobert Mustacchi struct fcoe_stat_ramrod_params fcoe_stat; 217*d14abf15SRobert Mustacchi } lm_fcoe_slow_path_phys_data_t; 218*d14abf15SRobert Mustacchi 219*d14abf15SRobert Mustacchi 220*d14abf15SRobert Mustacchi 221*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_state_t 222*d14abf15SRobert Mustacchi { 223*d14abf15SRobert Mustacchi lm_state_header_t hdr; 224*d14abf15SRobert Mustacchi struct fcoe_context* ctx_virt; 225*d14abf15SRobert Mustacchi lm_address_t ctx_phys; 226*d14abf15SRobert Mustacchi 227*d14abf15SRobert Mustacchi u32_t cid; 228*d14abf15SRobert Mustacchi u16_t fcoe_conn_id; /* Drivers connection ID. */ 229*d14abf15SRobert Mustacchi 230*d14abf15SRobert Mustacchi struct fcoe_kwqe_conn_offload1 ofld1; 231*d14abf15SRobert Mustacchi struct fcoe_kwqe_conn_offload2 ofld2; 232*d14abf15SRobert Mustacchi struct fcoe_kwqe_conn_offload3 ofld3; 233*d14abf15SRobert Mustacchi struct fcoe_kwqe_conn_offload4 ofld4; 234*d14abf15SRobert Mustacchi } lm_fcoe_state_t; 235*d14abf15SRobert Mustacchi 236*d14abf15SRobert Mustacchi 237*d14abf15SRobert Mustacchi 238*d14abf15SRobert Mustacchi 239*d14abf15SRobert Mustacchi 240*d14abf15SRobert Mustacchi 241*d14abf15SRobert Mustacchi /******************************************************************************* 242*d14abf15SRobert Mustacchi * FCoE info that will be allocated in the bind phase. 243*d14abf15SRobert Mustacchi * This is the only parameters that stays valid when FCoE goes to hibernate. 244*d14abf15SRobert Mustacchi ******************************************************************************/ 245*d14abf15SRobert Mustacchi 246*d14abf15SRobert Mustacchi /* pbl data */ 247*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_pbl_t 248*d14abf15SRobert Mustacchi { 249*d14abf15SRobert Mustacchi u8_t allocated; /*For D3 case and better debugging*/ 250*d14abf15SRobert Mustacchi lm_address_t *pbl_phys_table_virt; 251*d14abf15SRobert Mustacchi lm_address_t pbl_phys_table_phys; 252*d14abf15SRobert Mustacchi void *pbl_virt_table; 253*d14abf15SRobert Mustacchi u32_t pbl_size; /* size allocated in bytes */ 254*d14abf15SRobert Mustacchi u32_t pbl_entries;/* number of entries in PBL */ 255*d14abf15SRobert Mustacchi } lm_fcoe_pbl_t; 256*d14abf15SRobert Mustacchi 257*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_info_bind_alloc_t 258*d14abf15SRobert Mustacchi { 259*d14abf15SRobert Mustacchi lm_fcoe_pbl_t pbl[MAX_EQ_CHAIN]; 260*d14abf15SRobert Mustacchi #define LM_FC_PBL(_pdev, _idx) ((_pdev)->fcoe_info.bind.pbl[_idx]) 261*d14abf15SRobert Mustacchi 262*d14abf15SRobert Mustacchi /* FCOE Miniport guarantees that they don't post more than once KWQE at a time, 263*d14abf15SRobert Mustacchi * so there's no need to allocate per-connection ramrod buffer, A single fcoe per-client 264*d14abf15SRobert Mustacchi * ramrod buffer (pdev->fcoe_info.bind.ramrod_mem_phys) can be used for all KWQEs.*/ 265*d14abf15SRobert Mustacchi void *ramrod_mem_virt; 266*d14abf15SRobert Mustacchi lm_address_t ramrod_mem_phys; 267*d14abf15SRobert Mustacchi }lm_fcoe_info_bind_alloc_t; 268*d14abf15SRobert Mustacchi 269*d14abf15SRobert Mustacchi /******************************************************************************* 270*d14abf15SRobert Mustacchi * FCoE info that will be allocated in the bind phase. 271*d14abf15SRobert Mustacchi * These parameters become not valid when FCoE goes to hibernate. 272*d14abf15SRobert Mustacchi ******************************************************************************/ 273*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_info_run_time_t 274*d14abf15SRobert Mustacchi { 275*d14abf15SRobert Mustacchi lm_state_block_t state_blk; 276*d14abf15SRobert Mustacchi lm_eq_chain_t eq_chain[MAX_EQ_CHAIN]; 277*d14abf15SRobert Mustacchi #define LM_FC_EQ(_pdev, _idx) (_pdev)->fcoe_info.run_time.eq_chain[_idx] 278*d14abf15SRobert Mustacchi 279*d14abf15SRobert Mustacchi u8_t fc_eq_base_chain_idx; 280*d14abf15SRobert Mustacchi u8_t num_of_cqs; 281*d14abf15SRobert Mustacchi 282*d14abf15SRobert Mustacchi d_list_t fcoe_list; 283*d14abf15SRobert Mustacchi 284*d14abf15SRobert Mustacchi #define LM_FC_FOREACH_EQ_IDX(pdev, eq_idx) \ 285*d14abf15SRobert Mustacchi for ((eq_idx) = (pdev)->fcoe_info.run_time.fc_eq_base_chain_idx; (eq_idx) < (u32_t)((pdev)->fcoe_info.run_time.fc_eq_base_chain_idx + (pdev)->fcoe_info.run_time.num_of_cqs); (eq_idx)++) 286*d14abf15SRobert Mustacchi }lm_fcoe_info_run_time_t; 287*d14abf15SRobert Mustacchi /******************************************************************************* 288*d14abf15SRobert Mustacchi * FCOE info. 289*d14abf15SRobert Mustacchi ******************************************************************************/ 290*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_info_t 291*d14abf15SRobert Mustacchi { 292*d14abf15SRobert Mustacchi struct _lm_device_t *pdev; 293*d14abf15SRobert Mustacchi 294*d14abf15SRobert Mustacchi // Paramters that stay valid in D3 and are allocated in bind time. 295*d14abf15SRobert Mustacchi lm_fcoe_info_bind_alloc_t bind; 296*d14abf15SRobert Mustacchi lm_eq_addr_save_t eq_addr_save; 297*d14abf15SRobert Mustacchi #define LM_EQ_ADDR_SAVE_FC(_pdev, _idx) (_pdev)->fcoe_info.eq_addr_save.eq_addr[_idx] 298*d14abf15SRobert Mustacchi // Paramters that are not valid in D3 and are allocated after bind time. 299*d14abf15SRobert Mustacchi lm_fcoe_info_run_time_t run_time; 300*d14abf15SRobert Mustacchi } lm_fcoe_info_t; 301*d14abf15SRobert Mustacchi 302*d14abf15SRobert Mustacchi #endif 303