1*d14abf15SRobert Mustacchi /******************************************************************************* 2*d14abf15SRobert Mustacchi * CDDL HEADER START 3*d14abf15SRobert Mustacchi * 4*d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 5*d14abf15SRobert Mustacchi * Common Development and Distribution License (the "License"). 6*d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 7*d14abf15SRobert Mustacchi * 8*d14abf15SRobert Mustacchi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*d14abf15SRobert Mustacchi * or http://www.opensolaris.org/os/licensing. 10*d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 11*d14abf15SRobert Mustacchi * and limitations under the License. 12*d14abf15SRobert Mustacchi * 13*d14abf15SRobert Mustacchi * When distributing Covered Code, include this CDDL HEADER in each 14*d14abf15SRobert Mustacchi * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*d14abf15SRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the 16*d14abf15SRobert Mustacchi * fields enclosed by brackets "[]" replaced with your own identifying 17*d14abf15SRobert Mustacchi * information: Portions Copyright [yyyy] [name of copyright owner] 18*d14abf15SRobert Mustacchi * 19*d14abf15SRobert Mustacchi * CDDL HEADER END 20*d14abf15SRobert Mustacchi * 21*d14abf15SRobert Mustacchi * Copyright 2014 QLogic Corporation 22*d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 23*d14abf15SRobert Mustacchi * QLogic End User License (the "License"). 24*d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 25*d14abf15SRobert Mustacchi * 26*d14abf15SRobert Mustacchi * You can obtain a copy of the License at 27*d14abf15SRobert Mustacchi * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/ 28*d14abf15SRobert Mustacchi * QLogic_End_User_Software_License.txt 29*d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 30*d14abf15SRobert Mustacchi * and limitations under the License. 31*d14abf15SRobert Mustacchi * 32*d14abf15SRobert Mustacchi * 33*d14abf15SRobert Mustacchi * Module Description: 34*d14abf15SRobert Mustacchi * 35*d14abf15SRobert Mustacchi * 36*d14abf15SRobert Mustacchi * History: 37*d14abf15SRobert Mustacchi * 02/05/07 Alon Elhanani Inception. 38*d14abf15SRobert Mustacchi ******************************************************************************/ 39*d14abf15SRobert Mustacchi 40*d14abf15SRobert Mustacchi #ifndef _LM_STATS_H 41*d14abf15SRobert Mustacchi #define _LM_STATS_H 42*d14abf15SRobert Mustacchi 43*d14abf15SRobert Mustacchi #include "common_uif.h" 44*d14abf15SRobert Mustacchi #include "mac_stx.h" 45*d14abf15SRobert Mustacchi 46*d14abf15SRobert Mustacchi /******************************************************************************* 47*d14abf15SRobert Mustacchi * Forward definition. 48*d14abf15SRobert Mustacchi ******************************************************************************/ 49*d14abf15SRobert Mustacchi /* structure for DCBX statistic */ 50*d14abf15SRobert Mustacchi struct _lm_dcbx_stat; 51*d14abf15SRobert Mustacchi 52*d14abf15SRobert Mustacchi // defines 53*d14abf15SRobert Mustacchi #define DMAE_SGL_STATS_NUM_OF_EMAC_COMMANDS 4 // includes NIG (3+1(nig)=4) 54*d14abf15SRobert Mustacchi #define DMAE_SGL_STATS_NUM_OF_BIGMAC_COMMANDS 3 // includes NIG (2+1(nig)=3) 55*d14abf15SRobert Mustacchi #define DMAE_SGL_STATS_NUM_OF_MSTAT_COMMANDS 3 // MSTAT requires 2 DMAE transactions (Rx/Tx) + 1 for the NIG stats 56*d14abf15SRobert Mustacchi 57*d14abf15SRobert Mustacchi #define LM_STATS_FW_DONE_FLAG 0xffffffff 58*d14abf15SRobert Mustacchi #define MAX_STATS_TIMER_WAKEUP_NO_COMPLETION 50 // Might be a real problem with SW/FW HSI 59*d14abf15SRobert Mustacchi #define MAX_STATS_TIMER_WAKEUP_COMP_NOT_HANDLED 600 // probably due to DPC starvation by the OS, this timeout can be large (currently 5 minutes) 60*d14abf15SRobert Mustacchi 61*d14abf15SRobert Mustacchi #define HAS_MSTAT(_pdev) CHIP_IS_E3(_pdev) 62*d14abf15SRobert Mustacchi 63*d14abf15SRobert Mustacchi typedef enum 64*d14abf15SRobert Mustacchi { 65*d14abf15SRobert Mustacchi STATS_MACS_IDX_CURRENT = 0, 66*d14abf15SRobert Mustacchi STATS_MACS_IDX_TOTAL = 1, 67*d14abf15SRobert Mustacchi STATS_MACS_IDX_MAX = 2 68*d14abf15SRobert Mustacchi } stats_macs_idx_t; 69*d14abf15SRobert Mustacchi 70*d14abf15SRobert Mustacchi #define STATS_IP_4_IDX 0 71*d14abf15SRobert Mustacchi #define STATS_IP_6_IDX 1 72*d14abf15SRobert Mustacchi #define STATS_IP_IDX_MAX 2 73*d14abf15SRobert Mustacchi 74*d14abf15SRobert Mustacchi 75*d14abf15SRobert Mustacchi // converts reg_pair_t to u64_t 76*d14abf15SRobert Mustacchi #define REGPAIR_TO_U64( val_64, val_regpair ) val_64 = ((u64_t)(mm_le32_to_cpu(val_regpair.hi))<<32) + mm_le32_to_cpu(val_regpair.lo) ; 77*d14abf15SRobert Mustacchi 78*d14abf15SRobert Mustacchi 79*d14abf15SRobert Mustacchi #define LM_STATS_HW_GET_MACS_U64(_pdev, field_name) ( _pdev->vars.stats.stats_mirror.stats_hw.macs[STATS_MACS_IDX_TOTAL].field_name ) 80*d14abf15SRobert Mustacchi 81*d14abf15SRobert Mustacchi 82*d14abf15SRobert Mustacchi // LM_STATS_FLAGS_XXX defines 83*d14abf15SRobert Mustacchi #define LM_STATS_FLAG_XSTORM 0x0001 84*d14abf15SRobert Mustacchi #define LM_STATS_FLAG_TSTORM 0x0002 85*d14abf15SRobert Mustacchi #define LM_STATS_FLAG_USTORM 0x0020 86*d14abf15SRobert Mustacchi #define LM_STATS_FLAG_CSTORM 0x0100 87*d14abf15SRobert Mustacchi 88*d14abf15SRobert Mustacchi #define LM_STATS_FLAGS_ALL (LM_STATS_FLAG_XSTORM | LM_STATS_FLAG_TSTORM | LM_STATS_FLAG_USTORM | LM_STATS_FLAG_CSTORM ) 89*d14abf15SRobert Mustacchi 90*d14abf15SRobert Mustacchi // Check that done flags are set 91*d14abf15SRobert Mustacchi #define LM_STATS_REGPAIR_CHECK_DONE(done_regpair) (( LM_STATS_FW_DONE_FLAG == done_regpair.lo ) && \ 92*d14abf15SRobert Mustacchi ( LM_STATS_FW_DONE_FLAG == done_regpair.hi )) 93*d14abf15SRobert Mustacchi 94*d14abf15SRobert Mustacchi #define LM_STATS_VERIFY_COUNTER(_pdev, _counter ) ( _pdev->vars.stats.stats_collect.stats_fw.drv_counter == mm_le16_to_cpu(pdev->vars.stats.stats_collect.stats_fw._counter) ) 95*d14abf15SRobert Mustacchi 96*d14abf15SRobert Mustacchi 97*d14abf15SRobert Mustacchi 98*d14abf15SRobert Mustacchi // Check that done flags are set 99*d14abf15SRobert Mustacchi #define LM_STATS_REGPAIR_CLEAR_DONE(done_regpair) done_regpair.lo = done_regpair.hi = 0 ; 100*d14abf15SRobert Mustacchi 101*d14abf15SRobert Mustacchi 102*d14abf15SRobert Mustacchi // Do we need to assign (done is true assigned is false) 103*d14abf15SRobert Mustacchi #define LM_STATS_DO_ASSIGN(flag_done, flag_assigned, flag_type) ( 0 == GET_FLAGS(flag_assigned,flag_type) && \ 104*d14abf15SRobert Mustacchi 0 != GET_FLAGS(flag_done,flag_type) ) 105*d14abf15SRobert Mustacchi // do we need to assign any of the flags 106*d14abf15SRobert Mustacchi #define LM_STATS_DO_ASSIGN_ANY(flag_done, flag_assigned) ( LM_STATS_DO_ASSIGN(flag_done,flag_assigned,LM_STATS_FLAG_XSTORM) || \ 107*d14abf15SRobert Mustacchi LM_STATS_DO_ASSIGN(flag_done,flag_assigned,LM_STATS_FLAG_TSTORM) || \ 108*d14abf15SRobert Mustacchi LM_STATS_DO_ASSIGN(flag_done,flag_assigned,LM_STATS_FLAG_USTORM) || \ 109*d14abf15SRobert Mustacchi LM_STATS_DO_ASSIGN(flag_done,flag_assigned,LM_STATS_FLAG_CSTORM) ) 110*d14abf15SRobert Mustacchi // mapping of client id to statistics entry 111*d14abf15SRobert Mustacchi // the imporance of this macro is that it'll return a unique number per function. 112*d14abf15SRobert Mustacchi #define LM_STATS_CNT_ID(_pdev) (IS_VFDEV(_pdev) ? (_pdev)->params.base_fw_stats_id : FUNC_ID(_pdev)) 113*d14abf15SRobert Mustacchi 114*d14abf15SRobert Mustacchi // Functions prototypes 115*d14abf15SRobert Mustacchi void lm_stats_on_timer ( struct _lm_device_t* pdev) ; 116*d14abf15SRobert Mustacchi lm_status_t lm_stats_dmae ( struct _lm_device_t* pdev) ; 117*d14abf15SRobert Mustacchi lm_status_t lm_stats_hw_setup ( struct _lm_device_t* pdev) ; 118*d14abf15SRobert Mustacchi void lm_stats_fw_setup ( struct _lm_device_t* pdev) ; 119*d14abf15SRobert Mustacchi void lm_stats_fw_reset ( struct _lm_device_t* pdev) ; 120*d14abf15SRobert Mustacchi lm_status_t lm_stats_alloc_fw_resc (struct _lm_device_t *pdev); 121*d14abf15SRobert Mustacchi lm_status_t lm_stats_alloc_resc( struct _lm_device_t* pdev) ; 122*d14abf15SRobert Mustacchi lm_status_t lm_stats_on_link_update( struct _lm_device_t *pdev, const u8_t b_is_link_up ); 123*d14abf15SRobert Mustacchi 124*d14abf15SRobert Mustacchi void lm_stats_fw_assign ( struct _lm_device_t* pdev, IN u32_t stats_flags_done, OUT u32_t* ptr_stats_flags_assigned ) ; 125*d14abf15SRobert Mustacchi 126*d14abf15SRobert Mustacchi #ifdef VF_INVOLVED 127*d14abf15SRobert Mustacchi void lm_pf_stats_vf_fw_assign(struct _lm_device_t *pdev, u32_t stats_flags_done, u32_t* ptr_stats_flags_assigned); 128*d14abf15SRobert Mustacchi #endif 129*d14abf15SRobert Mustacchi 130*d14abf15SRobert Mustacchi void lm_stats_hw_assign ( struct _lm_device_t* pdev ) ; 131*d14abf15SRobert Mustacchi void lm_stats_fw_check_update_done( struct _lm_device_t *pdev, OUT u32_t* ptr_stats_flags_done ) ; 132*d14abf15SRobert Mustacchi lm_status_t lm_stats_fw_complete( struct _lm_device_t *pdev ) ; 133*d14abf15SRobert Mustacchi void lm_stats_mgmt_assign( IN struct _lm_device_t* pdev ) ; 134*d14abf15SRobert Mustacchi lm_status_t lm_stats_drv_info_to_mfw_assign( struct _lm_device_t *pdev, const enum drv_info_opcode drv_info_op ); 135*d14abf15SRobert Mustacchi 136*d14abf15SRobert Mustacchi 137*d14abf15SRobert Mustacchi void lm_stats_get_dcb_stats ( IN struct _lm_device_t* pdev, OUT struct _lm_dcbx_stat *stats ) ; 138*d14abf15SRobert Mustacchi void lm_stats_get_driver_stats ( IN struct _lm_device_t* pdev, OUT b10_driver_statistics_t *stats ) ; 139*d14abf15SRobert Mustacchi void lm_stats_get_l2_driver_stats( IN struct _lm_device_t* pdev, OUT b10_l2_driver_statistics_t *stats ) ; 140*d14abf15SRobert Mustacchi void lm_stats_get_l4_driver_stats( IN struct _lm_device_t* pdev, OUT b10_l4_driver_statistics_t *stats ) ; 141*d14abf15SRobert Mustacchi void lm_stats_get_l2_chip_stats ( IN struct _lm_device_t* pdev, OUT void *stats, u8_t version ) ; 142*d14abf15SRobert Mustacchi void lm_stats_get_l4_chip_stats ( IN struct _lm_device_t* pdev, OUT b10_l4_chip_statistics_t *stats ) ; 143*d14abf15SRobert Mustacchi void lm_stats_hw_config_stats ( struct _lm_device_t* pdev, u8_t b_enabled ) ; 144*d14abf15SRobert Mustacchi void lm_stats_fw_config_stats ( struct _lm_device_t* pdev, u8_t b_enabled ) ; 145*d14abf15SRobert Mustacchi void lm_stats_init_port_part ( IN struct _lm_device_t* pdev ); 146*d14abf15SRobert Mustacchi void lm_stats_init_func_part ( IN struct _lm_device_t* pdev ); 147*d14abf15SRobert Mustacchi 148*d14abf15SRobert Mustacchi lm_status_t lm_stats_on_pmf_update( struct _lm_device_t* pdev, IN u8_t b_on ) ; 149*d14abf15SRobert Mustacchi lm_status_t lm_stats_on_pmf_init( struct _lm_device_t* pdev ) ; 150*d14abf15SRobert Mustacchi 151*d14abf15SRobert Mustacchi lm_status_t lm_stats_drv_info_to_mfw_event( struct _lm_device_t* pdev ) ; 152*d14abf15SRobert Mustacchi 153*d14abf15SRobert Mustacchi #ifdef VF_INVOLVED 154*d14abf15SRobert Mustacchi void lm_stats_prep_vf_fw_stats_req( struct _lm_device_t* pdev ); 155*d14abf15SRobert Mustacchi #endif 156*d14abf15SRobert Mustacchi 157*d14abf15SRobert Mustacchi // hw statistics structures (as read from GRC) 158*d14abf15SRobert Mustacchi 159*d14abf15SRobert Mustacchi // bmac 160*d14abf15SRobert Mustacchi struct _stats_bmac1_query_t 161*d14abf15SRobert Mustacchi { 162*d14abf15SRobert Mustacchi struct 163*d14abf15SRobert Mustacchi { 164*d14abf15SRobert Mustacchi u64_t tx_gtpkt ; 165*d14abf15SRobert Mustacchi u64_t tx_gtxpf ; 166*d14abf15SRobert Mustacchi u64_t tx_gtfcs ; 167*d14abf15SRobert Mustacchi u64_t tx_gtmca ; 168*d14abf15SRobert Mustacchi u64_t tx_gtgca ; 169*d14abf15SRobert Mustacchi u64_t tx_gtfrg ; 170*d14abf15SRobert Mustacchi u64_t tx_gtovr ; 171*d14abf15SRobert Mustacchi u64_t tx_gt64 ; 172*d14abf15SRobert Mustacchi u64_t tx_gt127 ; 173*d14abf15SRobert Mustacchi u64_t tx_gt255 ; 174*d14abf15SRobert Mustacchi u64_t tx_gt511 ; 175*d14abf15SRobert Mustacchi u64_t tx_gt1023 ; 176*d14abf15SRobert Mustacchi u64_t tx_gt1518 ; 177*d14abf15SRobert Mustacchi u64_t tx_gt2047 ; 178*d14abf15SRobert Mustacchi u64_t tx_gt4095 ; 179*d14abf15SRobert Mustacchi u64_t tx_gt9216 ; 180*d14abf15SRobert Mustacchi u64_t tx_gt16383 ; 181*d14abf15SRobert Mustacchi u64_t tx_gtmax ; 182*d14abf15SRobert Mustacchi u64_t tx_gtufl ; 183*d14abf15SRobert Mustacchi u64_t tx_gterr ; 184*d14abf15SRobert Mustacchi u64_t tx_gtbyt ; // 42 bit 185*d14abf15SRobert Mustacchi } stats_tx ; 186*d14abf15SRobert Mustacchi struct 187*d14abf15SRobert Mustacchi { 188*d14abf15SRobert Mustacchi u64_t rx_gr64 ; 189*d14abf15SRobert Mustacchi u64_t rx_gr127 ; 190*d14abf15SRobert Mustacchi u64_t rx_gr255 ; 191*d14abf15SRobert Mustacchi u64_t rx_gr511 ; 192*d14abf15SRobert Mustacchi u64_t rx_gr1023 ; 193*d14abf15SRobert Mustacchi u64_t rx_gr1518 ; 194*d14abf15SRobert Mustacchi u64_t rx_gr2047 ; 195*d14abf15SRobert Mustacchi u64_t rx_gr4095 ; 196*d14abf15SRobert Mustacchi u64_t rx_gr9216 ; 197*d14abf15SRobert Mustacchi u64_t rx_gr16383 ; 198*d14abf15SRobert Mustacchi u64_t rx_grmax ; 199*d14abf15SRobert Mustacchi u64_t rx_grpkt ; 200*d14abf15SRobert Mustacchi u64_t rx_grfcs ; 201*d14abf15SRobert Mustacchi u64_t rx_grmca ; 202*d14abf15SRobert Mustacchi u64_t rx_grbca ; 203*d14abf15SRobert Mustacchi u64_t rx_grxcf ; 204*d14abf15SRobert Mustacchi u64_t rx_grxpf ; 205*d14abf15SRobert Mustacchi u64_t rx_grxuo ; 206*d14abf15SRobert Mustacchi u64_t rx_grjbr ; 207*d14abf15SRobert Mustacchi u64_t rx_grovr ; 208*d14abf15SRobert Mustacchi u64_t rx_grflr ; 209*d14abf15SRobert Mustacchi u64_t rx_grmeg ; 210*d14abf15SRobert Mustacchi u64_t rx_grmeb ; 211*d14abf15SRobert Mustacchi u64_t rx_grbyt ; // 42 bit 212*d14abf15SRobert Mustacchi u64_t rx_grund ; 213*d14abf15SRobert Mustacchi u64_t rx_grfrg ; 214*d14abf15SRobert Mustacchi u64_t rx_grerb ; 215*d14abf15SRobert Mustacchi u64_t rx_grfre ; // 42 bit 216*d14abf15SRobert Mustacchi u64_t rx_gripj ; // 42 bit 217*d14abf15SRobert Mustacchi } stats_rx ; 218*d14abf15SRobert Mustacchi }; //stats_bmac_query_t 219*d14abf15SRobert Mustacchi 220*d14abf15SRobert Mustacchi // bmac2 221*d14abf15SRobert Mustacchi struct _stats_bmac2_query_t 222*d14abf15SRobert Mustacchi { 223*d14abf15SRobert Mustacchi struct 224*d14abf15SRobert Mustacchi { 225*d14abf15SRobert Mustacchi u64_t tx_gtpkt ; // tx_itpok 226*d14abf15SRobert Mustacchi u64_t tx_gtxpf ; 227*d14abf15SRobert Mustacchi u64_t tx_gtxpp ; // NEW BMAC2 228*d14abf15SRobert Mustacchi u64_t tx_gtfcs ; 229*d14abf15SRobert Mustacchi u64_t tx_gtuca ; // NEW BMAC2 230*d14abf15SRobert Mustacchi u64_t tx_gtmca ; 231*d14abf15SRobert Mustacchi u64_t tx_gtgca ; 232*d14abf15SRobert Mustacchi u64_t tx_gtovr ; // SWAPPED with below in BMAC1 233*d14abf15SRobert Mustacchi u64_t tx_gtfrg ; 234*d14abf15SRobert Mustacchi u64_t tx_itpkt ; // NEW BMAC2 235*d14abf15SRobert Mustacchi u64_t tx_gt64 ; 236*d14abf15SRobert Mustacchi u64_t tx_gt127 ; 237*d14abf15SRobert Mustacchi u64_t tx_gt255 ; 238*d14abf15SRobert Mustacchi u64_t tx_gt511 ; 239*d14abf15SRobert Mustacchi u64_t tx_gt1023 ; 240*d14abf15SRobert Mustacchi u64_t tx_gt1518 ; 241*d14abf15SRobert Mustacchi u64_t tx_gt2047 ; 242*d14abf15SRobert Mustacchi u64_t tx_gt4095 ; 243*d14abf15SRobert Mustacchi u64_t tx_gt9216 ; 244*d14abf15SRobert Mustacchi u64_t tx_gt16383 ; 245*d14abf15SRobert Mustacchi u64_t tx_gtmax ; 246*d14abf15SRobert Mustacchi u64_t tx_gtufl ; 247*d14abf15SRobert Mustacchi u64_t tx_gterr ; 248*d14abf15SRobert Mustacchi u64_t tx_gtbyt ; // 42 bit 249*d14abf15SRobert Mustacchi } stats_tx ; 250*d14abf15SRobert Mustacchi struct 251*d14abf15SRobert Mustacchi { 252*d14abf15SRobert Mustacchi u64_t rx_gr64 ; 253*d14abf15SRobert Mustacchi u64_t rx_gr127 ; 254*d14abf15SRobert Mustacchi u64_t rx_gr255 ; 255*d14abf15SRobert Mustacchi u64_t rx_gr511 ; 256*d14abf15SRobert Mustacchi u64_t rx_gr1023 ; 257*d14abf15SRobert Mustacchi u64_t rx_gr1518 ; 258*d14abf15SRobert Mustacchi u64_t rx_gr2047 ; 259*d14abf15SRobert Mustacchi u64_t rx_gr4095 ; 260*d14abf15SRobert Mustacchi u64_t rx_gr9216 ; 261*d14abf15SRobert Mustacchi u64_t rx_gr16383 ; 262*d14abf15SRobert Mustacchi u64_t rx_grmax ; 263*d14abf15SRobert Mustacchi u64_t rx_grpkt ; 264*d14abf15SRobert Mustacchi u64_t rx_grfcs ; 265*d14abf15SRobert Mustacchi u64_t rx_gruca ; // NEW BMAC2 266*d14abf15SRobert Mustacchi u64_t rx_grmca ; 267*d14abf15SRobert Mustacchi u64_t rx_grbca ; 268*d14abf15SRobert Mustacchi //u64_t rx_grxcf ; // MOVED BMAC2 269*d14abf15SRobert Mustacchi u64_t rx_grxpf ; 270*d14abf15SRobert Mustacchi u64_t rx_grxpp ; // NEW BMAC2 271*d14abf15SRobert Mustacchi u64_t rx_grxuo ; 272*d14abf15SRobert Mustacchi u64_t rx_grjbr ; 273*d14abf15SRobert Mustacchi u64_t rx_grovr ; 274*d14abf15SRobert Mustacchi u64_t rx_grxcf ; // MOVED BMAC2 275*d14abf15SRobert Mustacchi u64_t rx_grflr ; 276*d14abf15SRobert Mustacchi u64_t rx_grpok ; // NEW BMAC2 277*d14abf15SRobert Mustacchi u64_t rx_grmeg ; 278*d14abf15SRobert Mustacchi u64_t rx_grmeb ; 279*d14abf15SRobert Mustacchi u64_t rx_grbyt ; // 42 bit 280*d14abf15SRobert Mustacchi u64_t rx_grund ; 281*d14abf15SRobert Mustacchi u64_t rx_grfrg ; 282*d14abf15SRobert Mustacchi u64_t rx_grerb ; 283*d14abf15SRobert Mustacchi u64_t rx_grfre ; // 42 bit - BMAC2: IRERPKT 284*d14abf15SRobert Mustacchi u64_t rx_gripj ; // 42 bit - BMAC2: IRJUNK 285*d14abf15SRobert Mustacchi } stats_rx ; 286*d14abf15SRobert Mustacchi }; //stats_bmac_query_t 287*d14abf15SRobert Mustacchi 288*d14abf15SRobert Mustacchi // emac 289*d14abf15SRobert Mustacchi struct _stats_emac_query_t 290*d14abf15SRobert Mustacchi { 291*d14abf15SRobert Mustacchi struct 292*d14abf15SRobert Mustacchi { 293*d14abf15SRobert Mustacchi u32_t rx_stat_ifhcinoctets ; 294*d14abf15SRobert Mustacchi u32_t rx_stat_ifhcinbadoctets ; 295*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatsfragments ; 296*d14abf15SRobert Mustacchi u32_t rx_stat_ifhcinucastpkts ; 297*d14abf15SRobert Mustacchi u32_t rx_stat_ifhcinmulticastpkts ; 298*d14abf15SRobert Mustacchi u32_t rx_stat_ifhcinbroadcastpkts ; 299*d14abf15SRobert Mustacchi u32_t rx_stat_dot3statsfcserrors ; 300*d14abf15SRobert Mustacchi u32_t rx_stat_dot3statsalignmenterrors ; 301*d14abf15SRobert Mustacchi u32_t rx_stat_dot3statscarriersenseerrors ; 302*d14abf15SRobert Mustacchi u32_t rx_stat_xonpauseframesreceived ; 303*d14abf15SRobert Mustacchi u32_t rx_stat_xoffpauseframesreceived ; 304*d14abf15SRobert Mustacchi u32_t rx_stat_maccontrolframesreceived ; 305*d14abf15SRobert Mustacchi u32_t rx_stat_xoffstateentered ; 306*d14abf15SRobert Mustacchi u32_t rx_stat_dot3statsframestoolong ; 307*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatsjabbers ; 308*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatsundersizepkts ; 309*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts64octets ; 310*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts65octetsto127octets ; 311*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts128octetsto255octets ; 312*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts256octetsto511octets ; 313*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts512octetsto1023octets ; 314*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspkts1024octetsto1522octets; 315*d14abf15SRobert Mustacchi u32_t rx_stat_etherstatspktsover1522octets ; 316*d14abf15SRobert Mustacchi } stats_rx ; 317*d14abf15SRobert Mustacchi struct 318*d14abf15SRobert Mustacchi { 319*d14abf15SRobert Mustacchi u32_t rx_stat_falsecarriererrors ; 320*d14abf15SRobert Mustacchi } stats_rx_err ; 321*d14abf15SRobert Mustacchi struct 322*d14abf15SRobert Mustacchi { 323*d14abf15SRobert Mustacchi u32_t tx_stat_ifhcoutoctets ; 324*d14abf15SRobert Mustacchi u32_t tx_stat_ifhcoutbadoctets ; 325*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatscollisions ; 326*d14abf15SRobert Mustacchi u32_t tx_stat_outxonsent ; 327*d14abf15SRobert Mustacchi u32_t tx_stat_outxoffsent ; 328*d14abf15SRobert Mustacchi u32_t tx_stat_flowcontroldone ; 329*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statssinglecollisionframes ; 330*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statsmultiplecollisionframes ; 331*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statsdeferredtransmissions ; 332*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statsexcessivecollisions ; 333*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statslatecollisions ; 334*d14abf15SRobert Mustacchi u32_t tx_stat_ifhcoutucastpkts ; 335*d14abf15SRobert Mustacchi u32_t tx_stat_ifhcoutmulticastpkts ; 336*d14abf15SRobert Mustacchi u32_t tx_stat_ifhcoutbroadcastpkts ; 337*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts64octets ; 338*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts65octetsto127octets ; 339*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts128octetsto255octets ; 340*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts256octetsto511octets ; 341*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts512octetsto1023octets ; 342*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspkts1024octetsto1522octet ; 343*d14abf15SRobert Mustacchi u32_t tx_stat_etherstatspktsover1522octets ; 344*d14abf15SRobert Mustacchi u32_t tx_stat_dot3statsinternalmactransmiterrors ; 345*d14abf15SRobert Mustacchi } stats_tx ; 346*d14abf15SRobert Mustacchi 347*d14abf15SRobert Mustacchi }; // stats_emac_query_t 348*d14abf15SRobert Mustacchi 349*d14abf15SRobert Mustacchi struct _stats_mstat_query_t 350*d14abf15SRobert Mustacchi { 351*d14abf15SRobert Mustacchi struct { 352*d14abf15SRobert Mustacchi u64_t tx_gtxpok ; ///NOTE MSTAT on E3 has a bug where this register's contents are actually tx_gtxpok + tx_gtxpf + (possibly)tx_gtxpp 353*d14abf15SRobert Mustacchi u64_t tx_gtxpf ; 354*d14abf15SRobert Mustacchi u64_t tx_gtxpp ; 355*d14abf15SRobert Mustacchi u64_t tx_gtfcs ; 356*d14abf15SRobert Mustacchi u64_t tx_gtuca ; 357*d14abf15SRobert Mustacchi u64_t tx_gtmca ; 358*d14abf15SRobert Mustacchi u64_t tx_gtgca ; 359*d14abf15SRobert Mustacchi u64_t tx_gtpkt ; 360*d14abf15SRobert Mustacchi u64_t tx_gt64 ; 361*d14abf15SRobert Mustacchi u64_t tx_gt127 ; 362*d14abf15SRobert Mustacchi u64_t tx_gt255 ; 363*d14abf15SRobert Mustacchi u64_t tx_gt511 ; 364*d14abf15SRobert Mustacchi u64_t tx_gt1023 ; 365*d14abf15SRobert Mustacchi u64_t tx_gt1518 ; 366*d14abf15SRobert Mustacchi u64_t tx_gt2047 ; 367*d14abf15SRobert Mustacchi u64_t tx_gt4095 ; 368*d14abf15SRobert Mustacchi u64_t tx_gt9216 ; 369*d14abf15SRobert Mustacchi u64_t tx_gt16383 ; 370*d14abf15SRobert Mustacchi u64_t tx_gtufl ; 371*d14abf15SRobert Mustacchi u64_t tx_gterr ; 372*d14abf15SRobert Mustacchi u64_t tx_gtbyt ; 373*d14abf15SRobert Mustacchi 374*d14abf15SRobert Mustacchi u64_t tx_collisions; 375*d14abf15SRobert Mustacchi u64_t tx_singlecollision; 376*d14abf15SRobert Mustacchi u64_t tx_multiplecollisions; 377*d14abf15SRobert Mustacchi u64_t tx_deferred; 378*d14abf15SRobert Mustacchi u64_t tx_excessivecollisions; 379*d14abf15SRobert Mustacchi u64_t tx_latecollisions; 380*d14abf15SRobert Mustacchi }stats_tx; 381*d14abf15SRobert Mustacchi 382*d14abf15SRobert Mustacchi struct{ 383*d14abf15SRobert Mustacchi u64_t rx_gr64 ; 384*d14abf15SRobert Mustacchi u64_t rx_gr127 ; 385*d14abf15SRobert Mustacchi u64_t rx_gr255 ; 386*d14abf15SRobert Mustacchi u64_t rx_gr511 ; 387*d14abf15SRobert Mustacchi u64_t rx_gr1023 ; 388*d14abf15SRobert Mustacchi u64_t rx_gr1518 ; 389*d14abf15SRobert Mustacchi u64_t rx_gr2047 ; 390*d14abf15SRobert Mustacchi u64_t rx_gr4095 ; 391*d14abf15SRobert Mustacchi u64_t rx_gr9216 ; 392*d14abf15SRobert Mustacchi u64_t rx_gr16383 ; 393*d14abf15SRobert Mustacchi u64_t rx_grpkt ; 394*d14abf15SRobert Mustacchi u64_t rx_grfcs ; 395*d14abf15SRobert Mustacchi u64_t rx_gruca ; 396*d14abf15SRobert Mustacchi u64_t rx_grmca ; 397*d14abf15SRobert Mustacchi u64_t rx_grbca ; 398*d14abf15SRobert Mustacchi u64_t rx_grxpf ; 399*d14abf15SRobert Mustacchi u64_t rx_grxpp ; 400*d14abf15SRobert Mustacchi u64_t rx_grxuo ; 401*d14abf15SRobert Mustacchi u64_t rx_grovr ; 402*d14abf15SRobert Mustacchi u64_t rx_grxcf ; 403*d14abf15SRobert Mustacchi u64_t rx_grflr ; 404*d14abf15SRobert Mustacchi u64_t rx_grpok ; 405*d14abf15SRobert Mustacchi u64_t rx_grbyt ; 406*d14abf15SRobert Mustacchi u64_t rx_grund ; 407*d14abf15SRobert Mustacchi u64_t rx_grfrg ; 408*d14abf15SRobert Mustacchi u64_t rx_grerb ; 409*d14abf15SRobert Mustacchi u64_t rx_grfre ; 410*d14abf15SRobert Mustacchi 411*d14abf15SRobert Mustacchi u64_t rx_alignmenterrors; 412*d14abf15SRobert Mustacchi u64_t rx_falsecarrier; 413*d14abf15SRobert Mustacchi u64_t rx_llfcmsgcnt; 414*d14abf15SRobert Mustacchi }stats_rx; 415*d14abf15SRobert Mustacchi }; 416*d14abf15SRobert Mustacchi 417*d14abf15SRobert Mustacchi // Nig 418*d14abf15SRobert Mustacchi struct _stats_nig_query_t 419*d14abf15SRobert Mustacchi { 420*d14abf15SRobert Mustacchi u32_t brb_discard ; 421*d14abf15SRobert Mustacchi u32_t brb_packet ; 422*d14abf15SRobert Mustacchi u32_t brb_truncate ; 423*d14abf15SRobert Mustacchi u32_t flow_ctrl_discard ; 424*d14abf15SRobert Mustacchi u32_t flow_ctrl_octets ; 425*d14abf15SRobert Mustacchi u32_t flow_ctrl_packet ; 426*d14abf15SRobert Mustacchi u32_t mng_discard ; 427*d14abf15SRobert Mustacchi u32_t mng_octet_inp ; 428*d14abf15SRobert Mustacchi u32_t mng_octet_out ; 429*d14abf15SRobert Mustacchi u32_t mng_packet_inp ; 430*d14abf15SRobert Mustacchi u32_t mng_packet_out ; 431*d14abf15SRobert Mustacchi u32_t pbf_octets ; 432*d14abf15SRobert Mustacchi u32_t pbf_packet ; 433*d14abf15SRobert Mustacchi u32_t safc_inp ; 434*d14abf15SRobert Mustacchi }; 435*d14abf15SRobert Mustacchi 436*d14abf15SRobert Mustacchi typedef struct _stats_nig_ex_t 437*d14abf15SRobert Mustacchi { 438*d14abf15SRobert Mustacchi u64_t egress_mac_pkt0 ; // Spec. 23 439*d14abf15SRobert Mustacchi u64_t egress_mac_pkt1 ; // Spec. 24 440*d14abf15SRobert Mustacchi } stats_nig_ex_t ; 441*d14abf15SRobert Mustacchi 442*d14abf15SRobert Mustacchi typedef struct _misc_stats_t 443*d14abf15SRobert Mustacchi { 444*d14abf15SRobert Mustacchi u64_t tx_lpi_count; 445*d14abf15SRobert Mustacchi } misc_stats_t; 446*d14abf15SRobert Mustacchi 447*d14abf15SRobert Mustacchi union _stats_bmac_query_t 448*d14abf15SRobert Mustacchi { 449*d14abf15SRobert Mustacchi struct _stats_bmac1_query_t bmac1_stats; 450*d14abf15SRobert Mustacchi struct _stats_bmac2_query_t bmac2_stats; 451*d14abf15SRobert Mustacchi }; 452*d14abf15SRobert Mustacchi typedef struct _lm_stats_hw_collect_t 453*d14abf15SRobert Mustacchi { 454*d14abf15SRobert Mustacchi union{ 455*d14abf15SRobert Mustacchi struct{ 456*d14abf15SRobert Mustacchi volatile struct _stats_emac_query_t* addr_emac_stats_query ; 457*d14abf15SRobert Mustacchi volatile struct _stats_bmac1_query_t* addr_bmac1_stats_query ; 458*d14abf15SRobert Mustacchi volatile struct _stats_bmac2_query_t* addr_bmac2_stats_query ; 459*d14abf15SRobert Mustacchi } s; 460*d14abf15SRobert Mustacchi volatile struct _stats_mstat_query_t* addr_mstat_stats_query ; 461*d14abf15SRobert Mustacchi } u; 462*d14abf15SRobert Mustacchi volatile struct _stats_nig_query_t* addr_nig_stats_query ; 463*d14abf15SRobert Mustacchi 464*d14abf15SRobert Mustacchi void* non_emac_dmae_operation; 465*d14abf15SRobert Mustacchi void* emac_dmae_operation; 466*d14abf15SRobert Mustacchi 467*d14abf15SRobert Mustacchi struct _stats_nig_ex_t nig_ex_stats_query ; 468*d14abf15SRobert Mustacchi u8_t b_is_link_up ; 469*d14abf15SRobert Mustacchi u8_t b_collect_enabled ; // enable collection? 470*d14abf15SRobert Mustacchi lm_address_t mac_stats_phys_addr; // physical address of the beginning of the MAC stats structure (either EMAC or MSTAT) 471*d14abf15SRobert Mustacchi lm_address_t bmac_stats_phys_addr; //physical address of the beginning of the MAC stats structure (BMAC1/BMAC2) 472*d14abf15SRobert Mustacchi lm_address_t nig_stats_phys_addr; // physical address of the beginning of the NIG stats structure 473*d14abf15SRobert Mustacchi 474*d14abf15SRobert Mustacchi struct _misc_stats_t misc_stats_query; 475*d14abf15SRobert Mustacchi 476*d14abf15SRobert Mustacchi }lm_stats_hw_collect_t; 477*d14abf15SRobert Mustacchi 478*d14abf15SRobert Mustacchi typedef struct _lm_stats_drv_info_to_mfw_t 479*d14abf15SRobert Mustacchi { 480*d14abf15SRobert Mustacchi union 481*d14abf15SRobert Mustacchi { 482*d14abf15SRobert Mustacchi volatile eth_stats_info_t* eth_stats; 483*d14abf15SRobert Mustacchi volatile fcoe_stats_info_t* fcoe_stats ; 484*d14abf15SRobert Mustacchi volatile iscsi_stats_info_t* iscsi_stats ; 485*d14abf15SRobert Mustacchi } addr; 486*d14abf15SRobert Mustacchi 487*d14abf15SRobert Mustacchi lm_address_t drv_info_to_mfw_phys_addr; // physical address of the beginning of the drv_info_to_mfw stats 488*d14abf15SRobert Mustacchi 489*d14abf15SRobert Mustacchi } lm_stats_drv_info_to_mfw_t; 490*d14abf15SRobert Mustacchi 491*d14abf15SRobert Mustacchi 492*d14abf15SRobert Mustacchi /************************FW Statistic Structures **************************/ 493*d14abf15SRobert Mustacchi typedef enum { 494*d14abf15SRobert Mustacchi LM_STATS_PORT_QUERY_IDX, 495*d14abf15SRobert Mustacchi LM_STATS_PF_QUERY_IDX, 496*d14abf15SRobert Mustacchi LM_STATS_FIRST_QUEUE_QUERY_IDX, 497*d14abf15SRobert Mustacchi LM_STATS_TOE_IDX, 498*d14abf15SRobert Mustacchi LM_STATS_FCOE_IDX, 499*d14abf15SRobert Mustacchi LM_STATS_FIRST_VF_QUEUE_QUERY_IDX 500*d14abf15SRobert Mustacchi } lm_stats_query_idx ; 501*d14abf15SRobert Mustacchi 502*d14abf15SRobert Mustacchi typedef struct _lm_stats_fw_stats_req_t { 503*d14abf15SRobert Mustacchi struct stats_query_header hdr; 504*d14abf15SRobert Mustacchi struct stats_query_entry query[STATS_QUERY_CMD_COUNT]; 505*d14abf15SRobert Mustacchi } lm_stats_fw_stats_req_t; 506*d14abf15SRobert Mustacchi 507*d14abf15SRobert Mustacchi typedef struct _lm_stats_fw_stats_data_t { 508*d14abf15SRobert Mustacchi struct stats_counter storm_counters; 509*d14abf15SRobert Mustacchi struct per_port_stats port; 510*d14abf15SRobert Mustacchi struct per_pf_stats pf; 511*d14abf15SRobert Mustacchi struct toe_stats_query toe; 512*d14abf15SRobert Mustacchi struct fcoe_statistics_params fcoe; 513*d14abf15SRobert Mustacchi struct per_queue_stats queue_stats; 514*d14abf15SRobert Mustacchi /* TODO: more queue stats? VF? */ 515*d14abf15SRobert Mustacchi } lm_stats_fw_stats_data_t; 516*d14abf15SRobert Mustacchi 517*d14abf15SRobert Mustacchi typedef struct _lm_stats_fw_collect_t 518*d14abf15SRobert Mustacchi { 519*d14abf15SRobert Mustacchi /* Total number of FW statistics requests */ 520*d14abf15SRobert Mustacchi u8_t fw_stats_num; 521*d14abf15SRobert Mustacchi /* Total number of FW statistics static (PF) requests */ 522*d14abf15SRobert Mustacchi u8_t fw_static_stats_num; 523*d14abf15SRobert Mustacchi u8_t pad[2]; 524*d14abf15SRobert Mustacchi 525*d14abf15SRobert Mustacchi 526*d14abf15SRobert Mustacchi /* This is a memory buffer that will contain both statistics 527*d14abf15SRobert Mustacchi * ramrod request and data. 528*d14abf15SRobert Mustacchi */ 529*d14abf15SRobert Mustacchi void * fw_stats; 530*d14abf15SRobert Mustacchi lm_address_t fw_stats_mapping; 531*d14abf15SRobert Mustacchi 532*d14abf15SRobert Mustacchi /* FW statistics request shortcut (points at the 533*d14abf15SRobert Mustacchi * beginning of fw_stats buffer). 534*d14abf15SRobert Mustacchi */ 535*d14abf15SRobert Mustacchi lm_stats_fw_stats_req_t * fw_stats_req; 536*d14abf15SRobert Mustacchi lm_address_t fw_stats_req_mapping; 537*d14abf15SRobert Mustacchi u32_t fw_stats_req_sz; 538*d14abf15SRobert Mustacchi 539*d14abf15SRobert Mustacchi /* FW statistics data shortcut (points at the begining of 540*d14abf15SRobert Mustacchi * fw_stats buffer + fw_stats_req_sz). 541*d14abf15SRobert Mustacchi */ 542*d14abf15SRobert Mustacchi lm_stats_fw_stats_data_t * fw_stats_data; 543*d14abf15SRobert Mustacchi lm_address_t fw_stats_data_mapping; 544*d14abf15SRobert Mustacchi u32_t fw_stats_data_sz; 545*d14abf15SRobert Mustacchi 546*d14abf15SRobert Mustacchi struct sq_pending_command stats_sp_list_command; // A pre allocated SPO pending command 547*d14abf15SRobert Mustacchi u16_t drv_counter; 548*d14abf15SRobert Mustacchi volatile u8_t b_completion_done ; // 0 if stats ramrod completion haven't been done yet 549*d14abf15SRobert Mustacchi volatile u8_t b_ramrod_completed ; // 0 if stats ramrod completion haven't been done yet 550*d14abf15SRobert Mustacchi volatile u8_t b_collect_enabled ; // enable collection? 551*d14abf15SRobert Mustacchi u32_t timer_wakeup_no_completion_current ; // times that current timer wakeup without stats ramrod completion 552*d14abf15SRobert Mustacchi u32_t timer_wakeup_no_completion_total ; // times that timers wakeup without stats ramrod completion (total count - for debugging) 553*d14abf15SRobert Mustacchi u32_t timer_wakeup_no_completion_max ; // max consecutive times timers wakeup without stats ramrod completion 554*d14abf15SRobert Mustacchi u32_t stats_ramrod_cnt ; // number of times ramrod was called 555*d14abf15SRobert Mustacchi }lm_stats_fw_collect_t ; 556*d14abf15SRobert Mustacchi 557*d14abf15SRobert Mustacchi typedef struct _lm_fcoe_stats_t 558*d14abf15SRobert Mustacchi { 559*d14abf15SRobert Mustacchi //XSTORM 560*d14abf15SRobert Mustacchi u64_t fcoe_tx_pkt_cnt /* Number of transmitted FCoE packets */; 561*d14abf15SRobert Mustacchi u64_t fcoe_tx_byte_cnt /* Number of transmitted FCoE bytes */; 562*d14abf15SRobert Mustacchi u64_t fcp_tx_pkt_cnt /* Number of transmitted FCP packets */; 563*d14abf15SRobert Mustacchi //TSTORM section 0 564*d14abf15SRobert Mustacchi u64_t fcoe_rx_pkt_cnt /* Number of FCoE packets that were legally received */; 565*d14abf15SRobert Mustacchi u64_t fcoe_rx_byte_cnt /* Number of FCoE bytes that were legally received */; 566*d14abf15SRobert Mustacchi //TSTORM section 1 567*d14abf15SRobert Mustacchi u64_t fcoe_ver_cnt /* Number of packets with wrong FCoE version */; 568*d14abf15SRobert Mustacchi u64_t fcoe_rx_drop_pkt_cnt_tstorm /* Number of FCoE packets that were dropped */; 569*d14abf15SRobert Mustacchi //USTORM 570*d14abf15SRobert Mustacchi u64_t fc_crc_cnt /* Number of packets with FC CRC error */; 571*d14abf15SRobert Mustacchi u64_t eofa_del_cnt /* Number of packets with EOFa delimiter */; 572*d14abf15SRobert Mustacchi u64_t miss_frame_cnt /* Number of missing packets */; 573*d14abf15SRobert Mustacchi u64_t seq_timeout_cnt /* Number of sequence timeout expirations (E_D_TOV) */; 574*d14abf15SRobert Mustacchi u64_t drop_seq_cnt /* Number of Sequences that were sropped */; 575*d14abf15SRobert Mustacchi u64_t fcoe_rx_drop_pkt_cnt_ustorm /* Number of FCoE packets that were dropped */; 576*d14abf15SRobert Mustacchi u64_t fcp_rx_pkt_cnt /* Number of FCP packets that were legally received */; 577*d14abf15SRobert Mustacchi }lm_fcoe_stats_t; 578*d14abf15SRobert Mustacchi 579*d14abf15SRobert Mustacchi // duplicate of fw HSI structures (using u64 instead u32) 580*d14abf15SRobert Mustacchi typedef struct _lm_stats_fw_t 581*d14abf15SRobert Mustacchi { 582*d14abf15SRobert Mustacchi struct //eth_xstorm_common 583*d14abf15SRobert Mustacchi { 584*d14abf15SRobert Mustacchi struct 585*d14abf15SRobert Mustacchi { 586*d14abf15SRobert Mustacchi u64_t total_sent_bytes ; 587*d14abf15SRobert Mustacchi u64_t total_sent_pkts ; 588*d14abf15SRobert Mustacchi u64_t unicast_pkts_sent ; 589*d14abf15SRobert Mustacchi u64_t unicast_bytes_sent ; 590*d14abf15SRobert Mustacchi u64_t multicast_bytes_sent ; 591*d14abf15SRobert Mustacchi u64_t multicast_pkts_sent ; 592*d14abf15SRobert Mustacchi u64_t broadcast_pkts_sent ; 593*d14abf15SRobert Mustacchi u64_t broadcast_bytes_sent ; 594*d14abf15SRobert Mustacchi u64_t error_drop_pkts ; 595*d14abf15SRobert Mustacchi } client_statistics[LM_CLI_IDX_MAX] ; 596*d14abf15SRobert Mustacchi } eth_xstorm_common ; 597*d14abf15SRobert Mustacchi 598*d14abf15SRobert Mustacchi struct //eth_tstorm_common 599*d14abf15SRobert Mustacchi { 600*d14abf15SRobert Mustacchi struct 601*d14abf15SRobert Mustacchi { 602*d14abf15SRobert Mustacchi u64_t rcv_unicast_bytes /* number of bytes in unicast packets received without errors and pass the filter */; 603*d14abf15SRobert Mustacchi u64_t rcv_broadcast_bytes /* number of bytes in broadcast packets received without errors and pass the filter */; 604*d14abf15SRobert Mustacchi u64_t rcv_multicast_bytes /* number of bytes in multicast packets received without errors and pass the filter */; 605*d14abf15SRobert Mustacchi u64_t rcv_error_bytes /* number of bytes in dropped packets */; 606*d14abf15SRobert Mustacchi u64_t checksum_discard /* number of bytes in dropped packets */; 607*d14abf15SRobert Mustacchi u64_t packets_too_big_discard /* number of bytes in dropped packets */; 608*d14abf15SRobert Mustacchi u64_t rcv_unicast_pkts /* number of packets in unicast packets received without errors and pass the filter */; 609*d14abf15SRobert Mustacchi u64_t rcv_broadcast_pkts /* number of packets in broadcast packets received without errors and pass the filter */; 610*d14abf15SRobert Mustacchi u64_t rcv_multicast_pkts /* number of packets in multicast packets received without errors and pass the filter */; 611*d14abf15SRobert Mustacchi u64_t no_buff_discard /* the number of frames received from network dropped because of no buffer at host */; 612*d14abf15SRobert Mustacchi u64_t ttl0_discard /* the number of good frames dropped because of TTL=0 */; 613*d14abf15SRobert Mustacchi } client_statistics[LM_CLI_IDX_MAX] ; 614*d14abf15SRobert Mustacchi 615*d14abf15SRobert Mustacchi struct 616*d14abf15SRobert Mustacchi { 617*d14abf15SRobert Mustacchi u64_t mac_filter_discard /* the number of good frames dropped because of no perfect match to MAC/VLAN address */; 618*d14abf15SRobert Mustacchi u64_t xxoverflow_discard /* the number of good frames dropped because of xxOverflow in Tstorm */; 619*d14abf15SRobert Mustacchi u64_t brb_truncate_discard /* the number of packtes that were dropped because they were truncated in BRB */; 620*d14abf15SRobert Mustacchi u64_t mac_discard /* the number of received frames dropped because of errors in packet */; 621*d14abf15SRobert Mustacchi } port_statistics; 622*d14abf15SRobert Mustacchi } eth_tstorm_common ; 623*d14abf15SRobert Mustacchi 624*d14abf15SRobert Mustacchi struct //eth_ustorm_common 625*d14abf15SRobert Mustacchi { 626*d14abf15SRobert Mustacchi struct 627*d14abf15SRobert Mustacchi { 628*d14abf15SRobert Mustacchi u64_t ucast_no_buff_bytes /* the number of unicast bytes received from network dropped because of no buffer at host */; 629*d14abf15SRobert Mustacchi u64_t mcast_no_buff_bytes /* the number of multicast bytes received from network dropped because of no buffer at host */; 630*d14abf15SRobert Mustacchi u64_t bcast_no_buff_bytes /* the number of broadcast bytes received from network dropped because of no buffer at host */; 631*d14abf15SRobert Mustacchi u64_t ucast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 632*d14abf15SRobert Mustacchi u64_t mcast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 633*d14abf15SRobert Mustacchi u64_t bcast_no_buff_pkts /* the number of unicast frames received from network dropped because of no buffer at host */; 634*d14abf15SRobert Mustacchi u64_t coalesced_pkts /* the number of packets coalesced in all aggregations */; 635*d14abf15SRobert Mustacchi u64_t coalesced_bytes /* the number of bytes coalesced in all aggregations */; 636*d14abf15SRobert Mustacchi u64_t coalesced_events /* the number of aggregations */; 637*d14abf15SRobert Mustacchi u64_t coalesced_aborts /* the number of exception which avoid aggregation */; 638*d14abf15SRobert Mustacchi } client_statistics[LM_CLI_IDX_MAX] ; 639*d14abf15SRobert Mustacchi } eth_ustorm_common ; 640*d14abf15SRobert Mustacchi 641*d14abf15SRobert Mustacchi struct // toe_xstorm_common 642*d14abf15SRobert Mustacchi { 643*d14abf15SRobert Mustacchi struct 644*d14abf15SRobert Mustacchi { u64_t tcp_out_segments; 645*d14abf15SRobert Mustacchi u64_t tcp_retransmitted_segments; 646*d14abf15SRobert Mustacchi u64_t ip_out_octets; 647*d14abf15SRobert Mustacchi u64_t ip_out_requests; 648*d14abf15SRobert Mustacchi } statistics[STATS_IP_IDX_MAX] ; 649*d14abf15SRobert Mustacchi } toe_xstorm_toe ; 650*d14abf15SRobert Mustacchi 651*d14abf15SRobert Mustacchi struct // toe_tstorm_common 652*d14abf15SRobert Mustacchi { 653*d14abf15SRobert Mustacchi struct 654*d14abf15SRobert Mustacchi { 655*d14abf15SRobert Mustacchi u64_t ip_in_receives; 656*d14abf15SRobert Mustacchi u64_t ip_in_delivers; 657*d14abf15SRobert Mustacchi u64_t ip_in_octets; 658*d14abf15SRobert Mustacchi u64_t tcp_in_errors /* all discards except discards already counted by Ipv4 stats */; 659*d14abf15SRobert Mustacchi u64_t ip_in_header_errors /* IP checksum */; 660*d14abf15SRobert Mustacchi u64_t ip_in_discards /* no resources */; 661*d14abf15SRobert Mustacchi u64_t ip_in_truncated_packets; 662*d14abf15SRobert Mustacchi } statistics[STATS_IP_IDX_MAX] ; 663*d14abf15SRobert Mustacchi } toe_tstorm_toe ; 664*d14abf15SRobert Mustacchi 665*d14abf15SRobert Mustacchi struct 666*d14abf15SRobert Mustacchi { 667*d14abf15SRobert Mustacchi u64_t no_tx_cqes /* count the number of time storm find that there are no more CQEs */; 668*d14abf15SRobert Mustacchi } toe_cstorm_toe ; 669*d14abf15SRobert Mustacchi 670*d14abf15SRobert Mustacchi lm_fcoe_stats_t fcoe; 671*d14abf15SRobert Mustacchi 672*d14abf15SRobert Mustacchi }lm_stats_fw_t; 673*d14abf15SRobert Mustacchi 674*d14abf15SRobert Mustacchi // duplicate of hw structures (using u64 instead u32 when needed) 675*d14abf15SRobert Mustacchi typedef struct _stats_macs_t 676*d14abf15SRobert Mustacchi { 677*d14abf15SRobert Mustacchi struct 678*d14abf15SRobert Mustacchi { 679*d14abf15SRobert Mustacchi u64_t rx_stat_ifhcinoctets ; 680*d14abf15SRobert Mustacchi u64_t rx_stat_ifhcinbadoctets ; // HW_MAND_28 E1H_Spec.32 681*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatsfragments ; // Spec. 38 // HW_MAND_21 E1H_Spec.25 682*d14abf15SRobert Mustacchi u64_t rx_stat_ifhcinucastpkts ; 683*d14abf15SRobert Mustacchi u64_t rx_stat_ifhcinmulticastpkts ; 684*d14abf15SRobert Mustacchi u64_t rx_stat_ifhcinbroadcastpkts ; 685*d14abf15SRobert Mustacchi u64_t rx_stat_dot3statsfcserrors ; // Spec. 9 // HW_MAND_00 E1H_Spec.4 686*d14abf15SRobert Mustacchi u64_t rx_stat_dot3statsalignmenterrors ; // Spec. 10 // HW_MAND_01 E1H_Spec.5 687*d14abf15SRobert Mustacchi u64_t rx_stat_dot3statscarriersenseerrors ; // HW_MAND_31 E1H_Spec.35 688*d14abf15SRobert Mustacchi u64_t rx_stat_xonpauseframesreceived ; // HW_MAND_05 E1H_Spec.9 689*d14abf15SRobert Mustacchi u64_t rx_stat_xoffpauseframesreceived ; // Spec. 15 // HW_MAND_06 E1H_Spec.10 690*d14abf15SRobert Mustacchi u64_t rx_stat_maccontrolframesreceived ; // Spec. 22 // HW_MAND_13 E1H_Spec.17 691*d14abf15SRobert Mustacchi u64_t rx_stat_maccontrolframesreceived_bmac_xpf ; // Spec. 22 xpf // HW_MAND_13 E1H_Spec.17 * 692*d14abf15SRobert Mustacchi u64_t rx_stat_maccontrolframesreceived_bmac_xcf ; // Spec. 22 xcf // HW_MAND_13 E1H_Spec.17 * 693*d14abf15SRobert Mustacchi u64_t rx_stat_xoffstateentered ; // Spec. 44 // HW_MAND_27 E1H_Spec.31 694*d14abf15SRobert Mustacchi u64_t rx_stat_dot3statsframestoolong ; // Spec. 13 // HW_MAND_04 E1H_Spec.8 695*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatsjabbers ; // Spec. 39 // HW_MAND_22 E1H_Spec.26 696*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatsundersizepkts ; // Spec. 12 // HW_MAND_03 E1H_Spec.7 697*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts64octets ; 698*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts65octetsto127octets ; 699*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts128octetsto255octets ; 700*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts256octetsto511octets ; 701*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts512octetsto1023octets ; 702*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspkts1024octetsto1522octets ; 703*d14abf15SRobert Mustacchi u64_t rx_stat_etherstatspktsover1522octets ; // Spec. (29) 704*d14abf15SRobert Mustacchi u64_t rx_stat_pfcPacketCounter ; // Rx PFC Packet Counter 705*d14abf15SRobert Mustacchi } stats_rx ; 706*d14abf15SRobert Mustacchi 707*d14abf15SRobert Mustacchi struct 708*d14abf15SRobert Mustacchi { 709*d14abf15SRobert Mustacchi u64_t rx_stat_falsecarriererrors ; // HW_MAND_02 E1H_Spec.6 710*d14abf15SRobert Mustacchi } stats_rx_err ; 711*d14abf15SRobert Mustacchi 712*d14abf15SRobert Mustacchi struct 713*d14abf15SRobert Mustacchi { 714*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutoctets ; 715*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutbadoctets ; // Spec. 46 // HW_MAND_29 E1H_Spec.33 716*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatscollisions ; // HW_MAND_25 E1H_Spec.29 717*d14abf15SRobert Mustacchi u64_t tx_stat_outxonsent ; // HW_MAND_07 E1H_Spec.11 718*d14abf15SRobert Mustacchi u64_t tx_stat_outxoffsent ; // Spec. 17 // HW_MAND_08 E1H_Spec.12 719*d14abf15SRobert Mustacchi u64_t tx_stat_flowcontroldone ; // Spec. 43 // HW_MAND_26 E1H_Spec.30 720*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statssinglecollisionframes ; // Spec. 18 // HW_MAND_09 E1H_Spec.13 721*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statsmultiplecollisionframes ; // HW_MAND_10 E1H_Spec.14 722*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statsdeferredtransmissions ; // Spec. 40 // HW_MAND_23 E1H_Spec.27 723*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statsexcessivecollisions ; // Spec. 21 // HW_MAND_12 E1H_Spec.16 724*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statslatecollisions ; // HW_MAND_11 E1H_Spec.15 725*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutucastpkts ; // Spec. 6 726*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutucastpkts_bmac_pkt ; // Spec. 6 pkt 727*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutucastpkts_bmac_mca ; // Spec. 6 mca 728*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutucastpkts_bmac_bca ; // Spec. 6 bca 729*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutmulticastpkts ; // Spec. 7 730*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutbroadcastpkts ; // Spec. 8 731*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts64octets ; // Spec. 30 // HW_MAND_14 E1H_Spec.18 732*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts65octetsto127octets ; // Spec. 31 // HW_MAND_15 E1H_Spec.19 733*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts128octetsto255octets ; // Spec. 32 // HW_MAND_16 E1H_Spec.20 734*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts256octetsto511octets ; // Spec. 33 // HW_MAND_17 E1H_Spec.21 735*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts512octetsto1023octets ; // Spec. 34 // HW_MAND_18 E1H_Spec.22 736*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspkts1024octetsto1522octet ; // Spec. 35 // HW_MAND_19 E1H_Spec.23 737*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspktsover1522octets ; // Spec. 36 // HW_MAND_20 E1H_Spec.24 738*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspktsover1522octets_bmac_2047 ; // Spec. 36 2047 // HW_MAND_20 E1H_Spec.24 739*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspktsover1522octets_bmac_4095 ; // Spec. 36 4095 // HW_MAND_20 E1H_Spec.24 740*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspktsover1522octets_bmac_9216 ; // Spec. 36 9216 // HW_MAND_20 E1H_Spec.24 741*d14abf15SRobert Mustacchi u64_t tx_stat_etherstatspktsover1522octets_bmac_16383 ; // Spec. 36 16383// HW_MAND_20 E1H_Spec.24 742*d14abf15SRobert Mustacchi u64_t tx_stat_dot3statsinternalmactransmiterrors ; // Spec. 41 // HW_MAND_24 E1H_Spec.28 743*d14abf15SRobert Mustacchi u64_t tx_stat_ifhcoutdiscards ; // Spec. 47 // HW_MAND_30 E1H_Spec.34 744*d14abf15SRobert Mustacchi u64_t tx_stat_pfcPacketCounter ; // Tx PFC Packet Counter 745*d14abf15SRobert Mustacchi } stats_tx ; 746*d14abf15SRobert Mustacchi 747*d14abf15SRobert Mustacchi } stats_macs_t ; 748*d14abf15SRobert Mustacchi 749*d14abf15SRobert Mustacchi typedef struct _stats_nig_t 750*d14abf15SRobert Mustacchi { 751*d14abf15SRobert Mustacchi u64_t brb_discard ; // Spec. 49 // HW_MAND_32 E1H_Spec.36 752*d14abf15SRobert Mustacchi u64_t brb_packet ; // All the rest we'll need for mcp 753*d14abf15SRobert Mustacchi u64_t brb_truncate ; 754*d14abf15SRobert Mustacchi u64_t flow_ctrl_discard ; 755*d14abf15SRobert Mustacchi u64_t flow_ctrl_octets ; 756*d14abf15SRobert Mustacchi u64_t flow_ctrl_packet ; 757*d14abf15SRobert Mustacchi u64_t mng_discard ; 758*d14abf15SRobert Mustacchi u64_t mng_octet_inp ; 759*d14abf15SRobert Mustacchi u64_t mng_octet_out ; 760*d14abf15SRobert Mustacchi u64_t mng_packet_inp ; 761*d14abf15SRobert Mustacchi u64_t mng_packet_out ; 762*d14abf15SRobert Mustacchi u64_t pbf_octets ; 763*d14abf15SRobert Mustacchi u64_t pbf_packet ; 764*d14abf15SRobert Mustacchi u64_t safc_inp ; 765*d14abf15SRobert Mustacchi } stats_nig_t ; 766*d14abf15SRobert Mustacchi 767*d14abf15SRobert Mustacchi typedef struct _lm_stats_hw_t 768*d14abf15SRobert Mustacchi { 769*d14abf15SRobert Mustacchi stats_macs_t macs[STATS_MACS_IDX_MAX] ; // 2 copies, one for pre-reset values, one for updating 770*d14abf15SRobert Mustacchi stats_nig_t nig ; // nig is always available - no need for 2 copies 771*d14abf15SRobert Mustacchi stats_nig_ex_t nig_ex ; 772*d14abf15SRobert Mustacchi misc_stats_t misc; 773*d14abf15SRobert Mustacchi } lm_stats_hw_t ; 774*d14abf15SRobert Mustacchi 775*d14abf15SRobert Mustacchi typedef struct _lm_stats_drv_t 776*d14abf15SRobert Mustacchi { 777*d14abf15SRobert Mustacchi // L2 statistics collected by driver 778*d14abf15SRobert Mustacchi struct 779*d14abf15SRobert Mustacchi { 780*d14abf15SRobert Mustacchi u32_t rx_ipv4_frag_count; // Spec 6.2.1: IPv4 Fragment received packets - (indication from RCQ WQE) 781*d14abf15SRobert Mustacchi u32_t rx_ip_cs_error_count; // Spec 6.2.2: IPv4 CS error received packets - (indication from RCQ WQE) 782*d14abf15SRobert Mustacchi u32_t rx_tcp_cs_error_count; // Spec 6.2.3: TCP CS error received packets - (indication from RCQ WQE) 783*d14abf15SRobert Mustacchi u32_t rx_llc_snap_count; // Spec 6.2.4: LLC/SNAP received packets - (indication from RCQ WQE) 784*d14abf15SRobert Mustacchi u32_t rx_phy_error_count; // Spec 6.2.5: PHY error received packets - (indication from RCQ WQE) 785*d14abf15SRobert Mustacchi u32_t rx_ipv6_ext_count ; // Spec 6.2.6: IPv6 Ext header received packets (indication from RCQ WQE) 786*d14abf15SRobert Mustacchi u32_t rx_aborted ; 787*d14abf15SRobert Mustacchi u32_t tx_no_l2_bd ; // Spec 6.2.7: Event counter: No free BD in the BD chain 788*d14abf15SRobert Mustacchi u32_t tx_no_sq_wqe ; // Spec 6.2.8: Event counter: No free WQE for sending slow path command 789*d14abf15SRobert Mustacchi u32_t tx_l2_assembly_buf_use ; // Spec 6.2.9: The number of packets on which the driver used the assembly buffer 790*d14abf15SRobert Mustacchi u32_t tx_lso_frames ; 791*d14abf15SRobert Mustacchi u32_t tx_aborted ; 792*d14abf15SRobert Mustacchi u32_t tx_no_coalesce_buf ; 793*d14abf15SRobert Mustacchi 794*d14abf15SRobert Mustacchi } drv_eth ; 795*d14abf15SRobert Mustacchi 796*d14abf15SRobert Mustacchi // L4 statistics collected by driver 797*d14abf15SRobert Mustacchi struct 798*d14abf15SRobert Mustacchi { 799*d14abf15SRobert Mustacchi struct 800*d14abf15SRobert Mustacchi { 801*d14abf15SRobert Mustacchi // for NDIS (per ipv) 802*d14abf15SRobert Mustacchi u32_t currently_established; // Spec 6.3: Number of TCP which the current state is either ESTABLISHED or CLOSE-WAIT 803*d14abf15SRobert Mustacchi u32_t out_resets; // Spec 6.3: Number of times that offloaded TCP connections have made a direct transition to the CLOSED state from either the ESTABLISHED state or the CLOSE-WAIT state 804*d14abf15SRobert Mustacchi u32_t out_discards; // Spec 6.3: The number of output IP datagrams that the offload target supplied to its IP layer for which no problem was encountered to prevent their transmission but that were discarded for run-time reasons, such as a lack of memory or other resources 805*d14abf15SRobert Mustacchi // Note: driver will always return '0' since it doesn't drop packets due to resourcse (stats email) 806*d14abf15SRobert Mustacchi u32_t out_no_routes; // Spec 6.3: The number of output IP datagrams that the offload target supplied to its IP layer that were discarded because no route (such as an offloaded path state object) could be found to transmit them to their destination 807*d14abf15SRobert Mustacchi // Note: driver will always return '0' (similar to above. see stats email) 808*d14abf15SRobert Mustacchi 809*d14abf15SRobert Mustacchi // additional (per ipv) 810*d14abf15SRobert Mustacchi u32_t out_fin ; // Spec 6.4.1-2: Number of Fin requests 811*d14abf15SRobert Mustacchi u32_t in_fin ; // Spec 6.4.3-4: Number of Fin received 812*d14abf15SRobert Mustacchi u32_t in_reset ; // Spec 6.4.5-6: Number of Reset received 813*d14abf15SRobert Mustacchi 814*d14abf15SRobert Mustacchi } ipv[STATS_IP_IDX_MAX] ; 815*d14abf15SRobert Mustacchi 816*d14abf15SRobert Mustacchi u32_t tx_no_l4_bd ; // Spec 6.4.: Event counter: No free BD in the BD chain 817*d14abf15SRobert Mustacchi u32_t tx_l4_assembly_buf_use ; // Spec 6.4: The number of times that assembly buffer was used 818*d14abf15SRobert Mustacchi u32_t rx_indicate_return_pending_cnt ; // Spec 6.4: The number of return pending indications 819*d14abf15SRobert Mustacchi u32_t rx_indicate_return_done_cnt ; // Spec 6.4: The number of return done indications 820*d14abf15SRobert Mustacchi u32_t rx_active_gen_buf_cnt; // Spec 6.4: The occupancy of generic buffer 821*d14abf15SRobert Mustacchi 822*d14abf15SRobert Mustacchi } drv_toe ; 823*d14abf15SRobert Mustacchi 824*d14abf15SRobert Mustacchi struct 825*d14abf15SRobert Mustacchi { 826*d14abf15SRobert Mustacchi eth_stats_info_t eth_stats; 827*d14abf15SRobert Mustacchi fcoe_stats_info_t fcoe_stats; 828*d14abf15SRobert Mustacchi iscsi_stats_info_t iscsi_stats; 829*d14abf15SRobert Mustacchi 830*d14abf15SRobert Mustacchi } drv_info_to_mfw; 831*d14abf15SRobert Mustacchi 832*d14abf15SRobert Mustacchi struct 833*d14abf15SRobert Mustacchi { 834*d14abf15SRobert Mustacchi fcoe_capabilities_t fcoe_capabilities; 835*d14abf15SRobert Mustacchi } drv_info_to_shmem; 836*d14abf15SRobert Mustacchi 837*d14abf15SRobert Mustacchi } lm_stats_drv_t ; 838*d14abf15SRobert Mustacchi 839*d14abf15SRobert Mustacchi // main statistics structure inside lm_device 840*d14abf15SRobert Mustacchi typedef struct _lm_stats_all_t 841*d14abf15SRobert Mustacchi { 842*d14abf15SRobert Mustacchi // device updated copy of statistics colected from fw/hw/driver? 843*d14abf15SRobert Mustacchi struct 844*d14abf15SRobert Mustacchi { 845*d14abf15SRobert Mustacchi lm_stats_fw_t stats_fw ; // stats collected from fw using ramrod 846*d14abf15SRobert Mustacchi lm_stats_hw_t stats_hw ; // stats collected from hw using DMAE 847*d14abf15SRobert Mustacchi lm_stats_drv_t stats_drv; // stats collected from VBD driver 848*d14abf15SRobert Mustacchi 849*d14abf15SRobert Mustacchi host_port_stats_t stats_mcp_port ; // stats need to be preserved on PMF migration 850*d14abf15SRobert Mustacchi host_func_stats_t stats_mcp_func ; // stats need to be saved to mgmt periodically 851*d14abf15SRobert Mustacchi host_func_stats_t stats_mcp_func_base ; // stats mgmt base for a funciton 852*d14abf15SRobert Mustacchi 853*d14abf15SRobert Mustacchi } stats_mirror ; 854*d14abf15SRobert Mustacchi 855*d14abf15SRobert Mustacchi // struct used to collect stats from fw & hw 856*d14abf15SRobert Mustacchi struct 857*d14abf15SRobert Mustacchi { 858*d14abf15SRobert Mustacchi // fw shared memory copy of stats data 859*d14abf15SRobert Mustacchi lm_stats_fw_collect_t stats_fw ; 860*d14abf15SRobert Mustacchi 861*d14abf15SRobert Mustacchi // hw shared memory copy of stats data 862*d14abf15SRobert Mustacchi lm_stats_hw_collect_t stats_hw ; 863*d14abf15SRobert Mustacchi 864*d14abf15SRobert Mustacchi lm_stats_drv_info_to_mfw_t drv_info_to_mfw; 865*d14abf15SRobert Mustacchi 866*d14abf15SRobert Mustacchi u32_t timer_wakeup ; // how many times timer was wake 867*d14abf15SRobert Mustacchi 868*d14abf15SRobert Mustacchi u32_t shmem_disabled; // how many times stats were not collected due to shmem disable command 869*d14abf15SRobert Mustacchi 870*d14abf15SRobert Mustacchi u32_t sp_record_disabled; // how many times stats were not collected due to FW SP trace 871*d14abf15SRobert Mustacchi 872*d14abf15SRobert Mustacchi u64_t next_timer_ms ; // represents next stats timer wakeup (system time in milliseconds) 873*d14abf15SRobert Mustacchi 874*d14abf15SRobert Mustacchi u8_t b_last_called ; // last call of timer ended 875*d14abf15SRobert Mustacchi 876*d14abf15SRobert Mustacchi } stats_collect ; 877*d14abf15SRobert Mustacchi 878*d14abf15SRobert Mustacchi } lm_stats_all_t; 879*d14abf15SRobert Mustacchi 880*d14abf15SRobert Mustacchi #endif // _LM_STATS_H 881