1*d14abf15SRobert Mustacchi #ifndef _COMMON_UIF_H 2*d14abf15SRobert Mustacchi #define _COMMON_UIF_H 3*d14abf15SRobert Mustacchi 4*d14abf15SRobert Mustacchi /* 5*d14abf15SRobert Mustacchi I M P O R T A N T 6*d14abf15SRobert Mustacchi BEFORE YOU MODIFY THESE STRUCTS: 7*d14abf15SRobert Mustacchi please make sure that DIAG was updated accordingly. 8*d14abf15SRobert Mustacchi windiag\ediag should be checked to compile and run correctly 9*d14abf15SRobert Mustacchi modification is in file: tcl_driver.c, function: driver_init_stats_object, macros: REGISTER_STAT_FIELD 10*d14abf15SRobert Mustacchi */ 11*d14abf15SRobert Mustacchi 12*d14abf15SRobert Mustacchi 13*d14abf15SRobert Mustacchi /******************************************************************************* 14*d14abf15SRobert Mustacchi * Hardware statistics structure for B10_IOC_GET_L2_CHIP_STATISTICS 15*d14abf15SRobert Mustacchi ******************************************************************************/ 16*d14abf15SRobert Mustacchi typedef struct _b10_l2_chip_statistics_t 17*d14abf15SRobert Mustacchi { 18*d14abf15SRobert Mustacchi u64_t ver_num; 19*d14abf15SRobert Mustacchi #define L2_CHIP_STATISTICS_VER_NUM_1 1 20*d14abf15SRobert Mustacchi #define L2_CHIP_STATISTICS_VER_NUM_2 2 21*d14abf15SRobert Mustacchi #define L2_CHIP_STATISTICS_VER_NUM_3 3 22*d14abf15SRobert Mustacchi u64_t IfHCInOctets; 23*d14abf15SRobert Mustacchi u64_t IfHCInBadOctets; 24*d14abf15SRobert Mustacchi u64_t IfHCOutOctets; 25*d14abf15SRobert Mustacchi u64_t IfHCOutBadOctets; 26*d14abf15SRobert Mustacchi u64_t IfHCOutPkts ; 27*d14abf15SRobert Mustacchi u64_t IfHCInPkts ; 28*d14abf15SRobert Mustacchi u64_t IfHCInUcastPkts; 29*d14abf15SRobert Mustacchi u64_t IfHCInMulticastPkts; 30*d14abf15SRobert Mustacchi u64_t IfHCInBroadcastPkts; 31*d14abf15SRobert Mustacchi u64_t IfHCOutUcastPkts; 32*d14abf15SRobert Mustacchi u64_t IfHCOutMulticastPkts; 33*d14abf15SRobert Mustacchi u64_t IfHCOutBroadcastPkts; 34*d14abf15SRobert Mustacchi u64_t IfHCInUcastOctets ; 35*d14abf15SRobert Mustacchi u64_t IfHCInMulticastOctets ; 36*d14abf15SRobert Mustacchi u64_t IfHCInBroadcastOctets ; 37*d14abf15SRobert Mustacchi u64_t IfHCOutUcastOctets ; 38*d14abf15SRobert Mustacchi u64_t IfHCOutMulticastOctets ; 39*d14abf15SRobert Mustacchi u64_t IfHCOutBroadcastOctets ; 40*d14abf15SRobert Mustacchi u64_t IfHCOutDiscards ; 41*d14abf15SRobert Mustacchi u64_t IfHCInFalseCarrierErrors ; 42*d14abf15SRobert Mustacchi u64_t Dot3StatsInternalMacTransmitErrors; 43*d14abf15SRobert Mustacchi u64_t Dot3StatsCarrierSenseErrors; 44*d14abf15SRobert Mustacchi u64_t Dot3StatsFCSErrors; 45*d14abf15SRobert Mustacchi u64_t Dot3StatsAlignmentErrors; 46*d14abf15SRobert Mustacchi u64_t Dot3StatsSingleCollisionFrames; 47*d14abf15SRobert Mustacchi u64_t Dot3StatsMultipleCollisionFrames; 48*d14abf15SRobert Mustacchi u64_t Dot3StatsDeferredTransmissions; 49*d14abf15SRobert Mustacchi u64_t Dot3StatsExcessiveCollisions; 50*d14abf15SRobert Mustacchi u64_t Dot3StatsLateCollisions; 51*d14abf15SRobert Mustacchi u64_t EtherStatsCollisions; 52*d14abf15SRobert Mustacchi u64_t EtherStatsFragments; 53*d14abf15SRobert Mustacchi u64_t EtherStatsJabbers; 54*d14abf15SRobert Mustacchi u64_t EtherStatsUndersizePkts; 55*d14abf15SRobert Mustacchi u64_t EtherStatsOverrsizePkts; 56*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx64Octets; 57*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx65Octetsto127Octets; 58*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx128Octetsto255Octets; 59*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx256Octetsto511Octets; 60*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx512Octetsto1023Octets; 61*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTx1024Octetsto1522Octets; 62*d14abf15SRobert Mustacchi u64_t EtherStatsPktsTxOver1522Octets; 63*d14abf15SRobert Mustacchi u64_t XonPauseFramesReceived; 64*d14abf15SRobert Mustacchi u64_t XoffPauseFramesReceived; 65*d14abf15SRobert Mustacchi u64_t OutXonSent; 66*d14abf15SRobert Mustacchi u64_t OutXoffSent; 67*d14abf15SRobert Mustacchi u64_t FlowControlDone; 68*d14abf15SRobert Mustacchi u64_t MacControlFramesReceived; 69*d14abf15SRobert Mustacchi u64_t XoffStateEntered; 70*d14abf15SRobert Mustacchi u64_t IfInFramesL2FilterDiscards; 71*d14abf15SRobert Mustacchi u64_t IfInTTL0Discards ; 72*d14abf15SRobert Mustacchi u64_t IfInxxOverflowDiscards ; 73*d14abf15SRobert Mustacchi u64_t IfInMBUFDiscards; 74*d14abf15SRobert Mustacchi u64_t IfInErrors; 75*d14abf15SRobert Mustacchi u64_t IfInErrorsOctets; 76*d14abf15SRobert Mustacchi u64_t IfInNoBrbBuffer; 77*d14abf15SRobert Mustacchi //u64_t Reserved0 ; 78*d14abf15SRobert Mustacchi //u64_t Reserved1 ; 79*d14abf15SRobert Mustacchi //u64_t Reserved2 ; 80*d14abf15SRobert Mustacchi //u64_t Reserved3 ; 81*d14abf15SRobert Mustacchi 82*d14abf15SRobert Mustacchi // Nig statistics 83*d14abf15SRobert Mustacchi u64_t Nig_brb_packet ; 84*d14abf15SRobert Mustacchi u64_t Nig_brb_truncate ; 85*d14abf15SRobert Mustacchi u64_t Nig_flow_ctrl_discard ; 86*d14abf15SRobert Mustacchi u64_t Nig_flow_ctrl_octets ; 87*d14abf15SRobert Mustacchi u64_t Nig_flow_ctrl_packet ; 88*d14abf15SRobert Mustacchi u64_t Nig_mng_discard ; 89*d14abf15SRobert Mustacchi u64_t Nig_mng_octet_inp ; 90*d14abf15SRobert Mustacchi u64_t Nig_mng_octet_out ; 91*d14abf15SRobert Mustacchi u64_t Nig_mng_packet_inp ; 92*d14abf15SRobert Mustacchi u64_t Nig_mng_packet_out ; 93*d14abf15SRobert Mustacchi u64_t Nig_pbf_octets ; 94*d14abf15SRobert Mustacchi u64_t Nig_pbf_packet ; 95*d14abf15SRobert Mustacchi u64_t Nig_safc_inp ; 96*d14abf15SRobert Mustacchi 97*d14abf15SRobert Mustacchi } b10_l2_chip_statistics_t; 98*d14abf15SRobert Mustacchi 99*d14abf15SRobert Mustacchi typedef struct _b10_l2_chip_statistics_v2_t 100*d14abf15SRobert Mustacchi { 101*d14abf15SRobert Mustacchi struct _b10_l2_chip_statistics_t v1; 102*d14abf15SRobert Mustacchi 103*d14abf15SRobert Mustacchi struct _v2 104*d14abf15SRobert Mustacchi { 105*d14abf15SRobert Mustacchi u64_t Tx_lpi_count; // This counter counts the number of timers the debounced version of EEE link idle is asserted� 106*d14abf15SRobert Mustacchi } v2; 107*d14abf15SRobert Mustacchi 108*d14abf15SRobert Mustacchi } b10_l2_chip_statistics_v2_t; 109*d14abf15SRobert Mustacchi 110*d14abf15SRobert Mustacchi typedef struct _b10_l2_chip_statistics_v3_t 111*d14abf15SRobert Mustacchi { 112*d14abf15SRobert Mustacchi struct _b10_l2_chip_statistics_v2_t v2; 113*d14abf15SRobert Mustacchi struct _v3 114*d14abf15SRobert Mustacchi { 115*d14abf15SRobert Mustacchi u64_t coalesced_pkts /* the number of packets coalesced in all aggregations */; 116*d14abf15SRobert Mustacchi u64_t coalesced_bytes /* the number of bytes coalesced in all aggregations */; 117*d14abf15SRobert Mustacchi u64_t coalesced_events /* the number of aggregations */; 118*d14abf15SRobert Mustacchi u64_t coalesced_aborts /* the number of exception which avoid aggregation */; 119*d14abf15SRobert Mustacchi } v3; 120*d14abf15SRobert Mustacchi 121*d14abf15SRobert Mustacchi } b10_l2_chip_statistics_v3_t; 122*d14abf15SRobert Mustacchi 123*d14abf15SRobert Mustacchi 124*d14abf15SRobert Mustacchi /******************************************************************************* 125*d14abf15SRobert Mustacchi * Hardware statistics structure for B10_IOC_GET_L4_CHIP_STATISTICS 126*d14abf15SRobert Mustacchi ******************************************************************************/ 127*d14abf15SRobert Mustacchi typedef struct _b10_l4_chip_statistics_t 128*d14abf15SRobert Mustacchi { 129*d14abf15SRobert Mustacchi u64_t ver_num; 130*d14abf15SRobert Mustacchi #define L4_CHIP_STATISTISTCS_VER_NUM 1 131*d14abf15SRobert Mustacchi u64_t NoTxCqes ; 132*d14abf15SRobert Mustacchi u64_t InTCP4Segments ; 133*d14abf15SRobert Mustacchi u64_t OutTCP4Segments ; 134*d14abf15SRobert Mustacchi u64_t RetransmittedTCP4Segments ; 135*d14abf15SRobert Mustacchi u64_t InTCP4Errors ; 136*d14abf15SRobert Mustacchi u64_t InIP4Receives ; 137*d14abf15SRobert Mustacchi u64_t InIP4HeaderErrors ; 138*d14abf15SRobert Mustacchi u64_t InIP4Discards ; 139*d14abf15SRobert Mustacchi u64_t InIP4Delivers ; 140*d14abf15SRobert Mustacchi u64_t InIP4Octets ; 141*d14abf15SRobert Mustacchi u64_t OutIP4Octets ; 142*d14abf15SRobert Mustacchi u64_t InIP4TruncatedPackets ; 143*d14abf15SRobert Mustacchi u64_t InTCP6Segments ; 144*d14abf15SRobert Mustacchi u64_t OutTCP6Segments ; 145*d14abf15SRobert Mustacchi u64_t RetransmittedTCP6Segments ; 146*d14abf15SRobert Mustacchi u64_t InTCP6Errors ; 147*d14abf15SRobert Mustacchi u64_t InIP6Receives ; 148*d14abf15SRobert Mustacchi u64_t InIP6HeaderErrors ; 149*d14abf15SRobert Mustacchi u64_t InIP6Discards ; 150*d14abf15SRobert Mustacchi u64_t InIP6Delivers ; 151*d14abf15SRobert Mustacchi u64_t InIP6Octets ; 152*d14abf15SRobert Mustacchi u64_t OutIP6Octets ; 153*d14abf15SRobert Mustacchi u64_t InIP6TruncatedPackets ; 154*d14abf15SRobert Mustacchi //u64_t Reserved0 ; 155*d14abf15SRobert Mustacchi //u64_t Reserved1 ; 156*d14abf15SRobert Mustacchi //u64_t Reserved2 ; 157*d14abf15SRobert Mustacchi //u64_t Reserved3 ; 158*d14abf15SRobert Mustacchi 159*d14abf15SRobert Mustacchi } b10_l4_chip_statistics_t; 160*d14abf15SRobert Mustacchi 161*d14abf15SRobert Mustacchi /******************************************************************************* 162*d14abf15SRobert Mustacchi * Driver statistics structure for B10_IOC_GET_L2_DRIVER_STATISTICS 163*d14abf15SRobert Mustacchi ******************************************************************************/ 164*d14abf15SRobert Mustacchi typedef struct _b10_l2_driver_statistics_t 165*d14abf15SRobert Mustacchi { 166*d14abf15SRobert Mustacchi u64_t ver_num; 167*d14abf15SRobert Mustacchi #define L2_DRIVER_STATISTISTCS_VER_NUM 1 168*d14abf15SRobert Mustacchi u64_t RxIPv4FragCount; 169*d14abf15SRobert Mustacchi u64_t RxIpCsErrorCount; 170*d14abf15SRobert Mustacchi u64_t RxTcpCsErrorCount; 171*d14abf15SRobert Mustacchi u64_t RxLlcSnapCount; 172*d14abf15SRobert Mustacchi u64_t RxPhyErrorCount; 173*d14abf15SRobert Mustacchi u64_t RxIpv6ExtCount; 174*d14abf15SRobert Mustacchi u64_t TxNoL2Bd; 175*d14abf15SRobert Mustacchi u64_t TxNoSqWqe; 176*d14abf15SRobert Mustacchi u64_t TxL2AssemblyBufUse; 177*d14abf15SRobert Mustacchi //u64_t Reserved0 ; 178*d14abf15SRobert Mustacchi //u64_t Reserved1 ; 179*d14abf15SRobert Mustacchi //u64_t Reserved2 ; 180*d14abf15SRobert Mustacchi //u64_t Reserved3 ; 181*d14abf15SRobert Mustacchi } b10_l2_driver_statistics_t; 182*d14abf15SRobert Mustacchi 183*d14abf15SRobert Mustacchi /******************************************************************************* 184*d14abf15SRobert Mustacchi * Driver statistics structure for B10_IOC_GET_L4_DRIVER_STATISTICS 185*d14abf15SRobert Mustacchi ******************************************************************************/ 186*d14abf15SRobert Mustacchi 187*d14abf15SRobert Mustacchi typedef struct _b10_l4_driver_statistics_t 188*d14abf15SRobert Mustacchi { 189*d14abf15SRobert Mustacchi u64_t ver_num; 190*d14abf15SRobert Mustacchi #define L4_DRIVER_STATISTISTCS_VER_NUM 1 191*d14abf15SRobert Mustacchi u64_t CurrentlyIpv4Established ; 192*d14abf15SRobert Mustacchi u64_t OutIpv4Resets ; 193*d14abf15SRobert Mustacchi u64_t OutIpv4Fin ; 194*d14abf15SRobert Mustacchi u64_t InIpv4Reset ; 195*d14abf15SRobert Mustacchi u64_t InIpv4Fin ; 196*d14abf15SRobert Mustacchi u64_t CurrentlyIpv6Established ; 197*d14abf15SRobert Mustacchi u64_t OutIpv6Resets ; 198*d14abf15SRobert Mustacchi u64_t OutIpv6Fin ; 199*d14abf15SRobert Mustacchi u64_t InIpv6Reset ; 200*d14abf15SRobert Mustacchi u64_t InIpv6Fin ; 201*d14abf15SRobert Mustacchi u64_t RxIndicateReturnPendingCnt; 202*d14abf15SRobert Mustacchi u64_t RxIndicateReturnDoneCnt; 203*d14abf15SRobert Mustacchi u64_t RxActiveGenBufCnt; 204*d14abf15SRobert Mustacchi u64_t TxNoL4Bd; 205*d14abf15SRobert Mustacchi u64_t TxL4AssemblyBufUse ; 206*d14abf15SRobert Mustacchi //u64_t Reserved0 ; 207*d14abf15SRobert Mustacchi //u64_t Reserved1 ; 208*d14abf15SRobert Mustacchi //u64_t Reserved2 ; 209*d14abf15SRobert Mustacchi //u64_t Reserved3 ; 210*d14abf15SRobert Mustacchi 211*d14abf15SRobert Mustacchi } b10_l4_driver_statistics_t; 212*d14abf15SRobert Mustacchi 213*d14abf15SRobert Mustacchi /******************************************************************************* 214*d14abf15SRobert Mustacchi * Driver statistics structure for B10_IOC_GET_DRIVER_STATISTICS. 215*d14abf15SRobert Mustacchi ******************************************************************************/ 216*d14abf15SRobert Mustacchi typedef struct _b10_driver_statistics_t 217*d14abf15SRobert Mustacchi { 218*d14abf15SRobert Mustacchi u64_t ver_num; 219*d14abf15SRobert Mustacchi #define DRIVER_STATISTISTCS_VER_NUM 1 220*d14abf15SRobert Mustacchi u64_t tx_lso_frames; // supported 221*d14abf15SRobert Mustacchi u64_t tx_aborted; // supported 222*d14abf15SRobert Mustacchi u64_t tx_no_bd; 223*d14abf15SRobert Mustacchi u64_t tx_no_desc; 224*d14abf15SRobert Mustacchi u64_t tx_no_coalesce_buf; // supported 225*d14abf15SRobert Mustacchi u64_t tx_no_map_reg; 226*d14abf15SRobert Mustacchi u64_t rx_aborted; // supported 227*d14abf15SRobert Mustacchi u64_t rx_err; 228*d14abf15SRobert Mustacchi u64_t rx_crc; 229*d14abf15SRobert Mustacchi u64_t rx_phy_err; 230*d14abf15SRobert Mustacchi u64_t rx_alignment; 231*d14abf15SRobert Mustacchi u64_t rx_short_packet; 232*d14abf15SRobert Mustacchi u64_t rx_giant_packet; 233*d14abf15SRobert Mustacchi //u64_t Reserved0 ; 234*d14abf15SRobert Mustacchi //u64_t Reserved1 ; 235*d14abf15SRobert Mustacchi //u64_t Reserved2 ; 236*d14abf15SRobert Mustacchi //u64_t Reserved3 ; 237*d14abf15SRobert Mustacchi } b10_driver_statistics_t; 238*d14abf15SRobert Mustacchi 239*d14abf15SRobert Mustacchi 240*d14abf15SRobert Mustacchi #define DCBX_CONFIG_INV_VALUE (0xFFFFFFFF) 241*d14abf15SRobert Mustacchi enum 242*d14abf15SRobert Mustacchi { 243*d14abf15SRobert Mustacchi OVERWRITE_SETTINGS_DISABLE = 0, 244*d14abf15SRobert Mustacchi OVERWRITE_SETTINGS_ENABLE = 1, 245*d14abf15SRobert Mustacchi OVERWRITE_SETTINGS_INVALID = DCBX_CONFIG_INV_VALUE 246*d14abf15SRobert Mustacchi }; 247*d14abf15SRobert Mustacchi /******************************************************************************* 248*d14abf15SRobert Mustacchi * LLDP protocol registry configuration parameters. 249*d14abf15SRobert Mustacchi ******************************************************************************/ 250*d14abf15SRobert Mustacchi typedef struct _config_lldp_params_t 251*d14abf15SRobert Mustacchi { 252*d14abf15SRobert Mustacchi u32_t overwrite_settings; 253*d14abf15SRobert Mustacchi u32_t msg_tx_hold; 254*d14abf15SRobert Mustacchi u32_t msg_fast_tx; 255*d14abf15SRobert Mustacchi u32_t tx_credit_max; 256*d14abf15SRobert Mustacchi u32_t msg_tx_interval; 257*d14abf15SRobert Mustacchi u32_t tx_fast; 258*d14abf15SRobert Mustacchi }config_lldp_params_t; 259*d14abf15SRobert Mustacchi 260*d14abf15SRobert Mustacchi /******************************************************************************* 261*d14abf15SRobert Mustacchi * LLDP structure for B10_IOC_GET_LLDP_PARAMS. 262*d14abf15SRobert Mustacchi ******************************************************************************/ 263*d14abf15SRobert Mustacchi typedef struct _b10_lldp_params_get_t 264*d14abf15SRobert Mustacchi { 265*d14abf15SRobert Mustacchi u32_t ver_num; 266*d14abf15SRobert Mustacchi #define LLDP_PARAMS_VER_NUM 2 267*d14abf15SRobert Mustacchi config_lldp_params_t config_lldp_params; 268*d14abf15SRobert Mustacchi // The reserved field should follow in case the struct above will increase 269*d14abf15SRobert Mustacchi u32_t _reserved[50]; 270*d14abf15SRobert Mustacchi u32_t admin_status; 271*d14abf15SRobert Mustacchi #define LLDP_TX_ONLY 0x01 272*d14abf15SRobert Mustacchi #define LLDP_RX_ONLY 0x02 273*d14abf15SRobert Mustacchi #define LLDP_TX_RX 0x03 274*d14abf15SRobert Mustacchi #define LLDP_DISABLED 0x04 275*d14abf15SRobert Mustacchi u32_t remote_chassis_id[65]; 276*d14abf15SRobert Mustacchi u32_t remote_port_id[65]; 277*d14abf15SRobert Mustacchi u32_t local_chassis_id[2]; 278*d14abf15SRobert Mustacchi u32_t local_port_id[2]; 279*d14abf15SRobert Mustacchi }b10_lldp_params_get_t; 280*d14abf15SRobert Mustacchi 281*d14abf15SRobert Mustacchi 282*d14abf15SRobert Mustacchi /******************************************************************************* 283*d14abf15SRobert Mustacchi * DCBX protocol registry configuration parameters. 284*d14abf15SRobert Mustacchi ******************************************************************************/ 285*d14abf15SRobert Mustacchi 286*d14abf15SRobert Mustacchi typedef struct _admin_priority_app_table_t 287*d14abf15SRobert Mustacchi { 288*d14abf15SRobert Mustacchi u32_t valid; 289*d14abf15SRobert Mustacchi u32_t priority; 290*d14abf15SRobert Mustacchi #define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF) 291*d14abf15SRobert Mustacchi u32_t traffic_type; 292*d14abf15SRobert Mustacchi #define TRAFFIC_TYPE_ETH 0 293*d14abf15SRobert Mustacchi #define TRAFFIC_TYPE_PORT 1 294*d14abf15SRobert Mustacchi u32_t app_id; 295*d14abf15SRobert Mustacchi }admin_priority_app_table_t; 296*d14abf15SRobert Mustacchi 297*d14abf15SRobert Mustacchi typedef struct _config_dcbx_params_t 298*d14abf15SRobert Mustacchi { 299*d14abf15SRobert Mustacchi u32_t dcb_enable; 300*d14abf15SRobert Mustacchi u32_t admin_dcbx_enable; 301*d14abf15SRobert Mustacchi // "admin_dcbx_enable" and "dcb_enable" are stand alone registry keys(if present 302*d14abf15SRobert Mustacchi // will always be valid and not ignored), for all other DCBX registry set only 303*d14abf15SRobert Mustacchi // if the entire DCBX registry set is present and differ from 0xFFFFFFFF (invalid 304*d14abf15SRobert Mustacchi // value) the DCBX registry parameters are taken, otherwise the registry key set 305*d14abf15SRobert Mustacchi // is ignored.)(Expect "admin_dcbx_enable" and "dcb_enable") 306*d14abf15SRobert Mustacchi u32_t overwrite_settings; 307*d14abf15SRobert Mustacchi u32_t admin_dcbx_version; 308*d14abf15SRobert Mustacchi #define ADMIN_DCBX_VERSION_CEE 0 309*d14abf15SRobert Mustacchi #define ADMIN_DCBX_VERSION_IEEE 1 310*d14abf15SRobert Mustacchi u32_t admin_ets_enable; 311*d14abf15SRobert Mustacchi u32_t admin_pfc_enable; 312*d14abf15SRobert Mustacchi u32_t admin_tc_supported_tx_enable; 313*d14abf15SRobert Mustacchi u32_t admin_ets_configuration_tx_enable; 314*d14abf15SRobert Mustacchi u32_t admin_ets_recommendation_tx_enable; 315*d14abf15SRobert Mustacchi u32_t admin_pfc_tx_enable; 316*d14abf15SRobert Mustacchi u32_t admin_application_priority_tx_enable; 317*d14abf15SRobert Mustacchi u32_t admin_ets_willing; 318*d14abf15SRobert Mustacchi u32_t admin_ets_reco_valid; 319*d14abf15SRobert Mustacchi u32_t admin_pfc_willing; 320*d14abf15SRobert Mustacchi u32_t admin_app_priority_willing; 321*d14abf15SRobert Mustacchi u32_t admin_configuration_bw_percentage[8]; 322*d14abf15SRobert Mustacchi u32_t admin_configuration_ets_pg[8]; 323*d14abf15SRobert Mustacchi u32_t admin_recommendation_bw_percentage[8]; 324*d14abf15SRobert Mustacchi u32_t admin_recommendation_ets_pg[8]; 325*d14abf15SRobert Mustacchi u32_t admin_pfc_bitmap; 326*d14abf15SRobert Mustacchi 327*d14abf15SRobert Mustacchi admin_priority_app_table_t admin_priority_app_table[4]; 328*d14abf15SRobert Mustacchi u32_t admin_default_priority; 329*d14abf15SRobert Mustacchi }config_dcbx_params_t; 330*d14abf15SRobert Mustacchi 331*d14abf15SRobert Mustacchi 332*d14abf15SRobert Mustacchi /******************************************************************************* 333*d14abf15SRobert Mustacchi * DCBX structure for B10_IOC_GET_DCBX_PARAMS. 334*d14abf15SRobert Mustacchi ******************************************************************************/ 335*d14abf15SRobert Mustacchi typedef struct _b10_dcbx_params_get_t 336*d14abf15SRobert Mustacchi { 337*d14abf15SRobert Mustacchi u32_t ver_num; 338*d14abf15SRobert Mustacchi #define DCBX_PARAMS_VER_NUM 4 339*d14abf15SRobert Mustacchi config_dcbx_params_t config_dcbx_params; 340*d14abf15SRobert Mustacchi // The reserved field should follow in case the struct above will increase 341*d14abf15SRobert Mustacchi u32_t _reserved[49]; 342*d14abf15SRobert Mustacchi 343*d14abf15SRobert Mustacchi u32_t dcb_current_oper_state_bitmap; 344*d14abf15SRobert Mustacchi #define DCBX_CURRENT_STATE_IS_SYNC (1 << 0) 345*d14abf15SRobert Mustacchi #define PFC_IS_CURRENTLY_OPERATIONAL (1 << 1) 346*d14abf15SRobert Mustacchi #define ETS_IS_CURRENTLY_OPERATIONAL (1 << 2) 347*d14abf15SRobert Mustacchi #define PRIORITY_TAGGING_IS_CURRENTLY_OPERATIONAL (1 << 3) 348*d14abf15SRobert Mustacchi #define DRIVER_CONFIGURED_BY_OS_QOS (1 << 4) 349*d14abf15SRobert Mustacchi #define DRIVER_CONFIGURED_BY_OS_QOS_TO_WILLING (1 << 5) 350*d14abf15SRobert Mustacchi 351*d14abf15SRobert Mustacchi 352*d14abf15SRobert Mustacchi u32_t local_tc_supported; 353*d14abf15SRobert Mustacchi u32_t local_pfc_caps; 354*d14abf15SRobert Mustacchi u32_t remote_tc_supported; 355*d14abf15SRobert Mustacchi u32_t remote_pfc_cap; 356*d14abf15SRobert Mustacchi u32_t remote_ets_willing; 357*d14abf15SRobert Mustacchi u32_t remote_ets_reco_valid; 358*d14abf15SRobert Mustacchi u32_t remote_pfc_willing; 359*d14abf15SRobert Mustacchi u32_t remote_app_priority_willing; 360*d14abf15SRobert Mustacchi u32_t remote_configuration_bw_percentage[8]; 361*d14abf15SRobert Mustacchi u32_t remote_configuration_ets_pg[8]; 362*d14abf15SRobert Mustacchi u32_t remote_recommendation_bw_percentage[8]; 363*d14abf15SRobert Mustacchi u32_t remote_recommendation_ets_pg[8]; 364*d14abf15SRobert Mustacchi u32_t remote_pfc_bitmap; 365*d14abf15SRobert Mustacchi admin_priority_app_table_t remote_priority_app_table[16]; 366*d14abf15SRobert Mustacchi u32_t local_ets_enable; 367*d14abf15SRobert Mustacchi u32_t local_pfc_enable; 368*d14abf15SRobert Mustacchi u32_t local_configuration_bw_percentage[8]; 369*d14abf15SRobert Mustacchi u32_t local_configuration_ets_pg[8]; 370*d14abf15SRobert Mustacchi u32_t local_pfc_bitmap; 371*d14abf15SRobert Mustacchi admin_priority_app_table_t local_priority_app_table[16]; 372*d14abf15SRobert Mustacchi u32_t pfc_mismatch; 373*d14abf15SRobert Mustacchi u32_t priority_app_mismatch; 374*d14abf15SRobert Mustacchi u32_t dcbx_frames_sent; 375*d14abf15SRobert Mustacchi u32_t dcbx_frames_received; 376*d14abf15SRobert Mustacchi u64_t pfc_frames_sent; 377*d14abf15SRobert Mustacchi u64_t pfc_frames_received; 378*d14abf15SRobert Mustacchi }b10_dcbx_params_get_t; 379*d14abf15SRobert Mustacchi 380*d14abf15SRobert Mustacchi /******************************************************************************* 381*d14abf15SRobert Mustacchi * Transceiver Data B10_IOC_GET_TRANSCEIVER_DATA 382*d14abf15SRobert Mustacchi ******************************************************************************/ 383*d14abf15SRobert Mustacchi 384*d14abf15SRobert Mustacchi typedef struct _b10_transceiver_data_t 385*d14abf15SRobert Mustacchi { 386*d14abf15SRobert Mustacchi u8_t ver_num; 387*d14abf15SRobert Mustacchi #define TRANSCEIVER_DATA_VER_NUM 1 388*d14abf15SRobert Mustacchi 389*d14abf15SRobert Mustacchi u8_t _pad[3]; 390*d14abf15SRobert Mustacchi 391*d14abf15SRobert Mustacchi // NOTE: All these strings are ASCII buffers without trailing NULL '\0' 392*d14abf15SRobert Mustacchi 393*d14abf15SRobert Mustacchi u8_t vendor_name[16]; // ELINK_SFP_EEPROM_VENDOR_NAME_ADDR 394*d14abf15SRobert Mustacchi u8_t model_num[16]; // ELINK_SFP_EEPROM_PART_NO_ADDR 395*d14abf15SRobert Mustacchi u8_t serial_num[16]; // ELINK_SFP_EEPROM_SERIAL_ADDR 396*d14abf15SRobert Mustacchi u8_t revision_num[4]; // ELINK_SFP_EEPROM_REVISION_ADDR 397*d14abf15SRobert Mustacchi u8_t mfg_date[6]; // ELINK_SFP_EEPROM_DATE_ADDR 398*d14abf15SRobert Mustacchi 399*d14abf15SRobert Mustacchi u8_t _pad_[2]; 400*d14abf15SRobert Mustacchi 401*d14abf15SRobert Mustacchi u32_t reserved[40]; 402*d14abf15SRobert Mustacchi 403*d14abf15SRobert Mustacchi } b10_transceiver_data_t; 404*d14abf15SRobert Mustacchi 405*d14abf15SRobert Mustacchi #endif // _COMMON_UIF_H 406