1*d14abf15SRobert Mustacchi 2*d14abf15SRobert Mustacchi #ifndef __MICROCODE_CONSTANTS_H_ 3*d14abf15SRobert Mustacchi #define __MICROCODE_CONSTANTS_H_ 4*d14abf15SRobert Mustacchi 5*d14abf15SRobert Mustacchi /* This file defines HSI constants common to all microcode flows */ 6*d14abf15SRobert Mustacchi 7*d14abf15SRobert Mustacchi /* offset in bits of protocol in the state context parameter */ 8*d14abf15SRobert Mustacchi #define PROTOCOL_STATE_BIT_OFFSET 6 9*d14abf15SRobert Mustacchi 10*d14abf15SRobert Mustacchi //state value to bitwise or for protocol 11*d14abf15SRobert Mustacchi #define ETH_STATE (ETH_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET) 12*d14abf15SRobert Mustacchi #define TOE_STATE (TOE_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET) 13*d14abf15SRobert Mustacchi #define RDMA_STATE (RDMA_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET) 14*d14abf15SRobert Mustacchi 15*d14abf15SRobert Mustacchi /* microcode fixed page page size 4K (chains and ring segments) */ 16*d14abf15SRobert Mustacchi #define MC_PAGE_SIZE 4096 17*d14abf15SRobert Mustacchi 18*d14abf15SRobert Mustacchi /* Number of indices per slow-path SB */ 19*d14abf15SRobert Mustacchi #define HC_SP_SB_MAX_INDICES 16 /* The Maximum of all */ 20*d14abf15SRobert Mustacchi 21*d14abf15SRobert Mustacchi /* Number of indices per SB */ 22*d14abf15SRobert Mustacchi #define HC_SB_MAX_INDICES_E1X 8 /* Multiple of 4 */ 23*d14abf15SRobert Mustacchi #define HC_SB_MAX_INDICES_E2 8 /* Multiple of 4 */ 24*d14abf15SRobert Mustacchi 25*d14abf15SRobert Mustacchi /* Number of SB */ 26*d14abf15SRobert Mustacchi #define HC_SB_MAX_SB_E1X 32 27*d14abf15SRobert Mustacchi #define HC_SB_MAX_SB_E2 136 /* include PF */ 28*d14abf15SRobert Mustacchi 29*d14abf15SRobert Mustacchi /* ID of slow path status block */ 30*d14abf15SRobert Mustacchi #define HC_SP_SB_ID 0xde 31*d14abf15SRobert Mustacchi 32*d14abf15SRobert Mustacchi /* Num of State machines */ 33*d14abf15SRobert Mustacchi #define HC_SB_MAX_SM 2 /* Fixed */ 34*d14abf15SRobert Mustacchi 35*d14abf15SRobert Mustacchi /* Num of dynamic indices */ 36*d14abf15SRobert Mustacchi #define HC_SB_MAX_DYNAMIC_INDICES 4 /* 0..3 fixed */ 37*d14abf15SRobert Mustacchi 38*d14abf15SRobert Mustacchi /* max number of slow path commands per port */ 39*d14abf15SRobert Mustacchi #define MAX_RAMRODS_PER_PORT 8 40*d14abf15SRobert Mustacchi 41*d14abf15SRobert Mustacchi 42*d14abf15SRobert Mustacchi /**** DEFINES FOR TIMERS/CLOCKS RESOLUTIONS ****/ 43*d14abf15SRobert Mustacchi 44*d14abf15SRobert Mustacchi /* chip timers frequency constants */ 45*d14abf15SRobert Mustacchi #define TIMERS_TICK_SIZE_CHIP (1e-3) 46*d14abf15SRobert Mustacchi 47*d14abf15SRobert Mustacchi /* used in toe: TsRecentAge, MaxRt, and temporarily RTT */ 48*d14abf15SRobert Mustacchi #define TSEMI_CLK1_RESUL_CHIP (1e-3) 49*d14abf15SRobert Mustacchi 50*d14abf15SRobert Mustacchi /* temporarily used for RTT */ 51*d14abf15SRobert Mustacchi #define XSEMI_CLK1_RESUL_CHIP (1e-3) 52*d14abf15SRobert Mustacchi 53*d14abf15SRobert Mustacchi /* used for Host Coallescing */ 54*d14abf15SRobert Mustacchi #define SDM_TIMER_TICK_RESUL_CHIP (4 * (1e-6)) 55*d14abf15SRobert Mustacchi #define TSDM_TIMER_TICK_RESUL_CHIP (1 * (1e-6)) 56*d14abf15SRobert Mustacchi 57*d14abf15SRobert Mustacchi /**** END DEFINES FOR TIMERS/CLOCKS RESOLUTIONS ****/ 58*d14abf15SRobert Mustacchi 59*d14abf15SRobert Mustacchi #define XSTORM_IP_ID_ROLL_HALF 0x8000 60*d14abf15SRobert Mustacchi #define XSTORM_IP_ID_ROLL_ALL 0 61*d14abf15SRobert Mustacchi 62*d14abf15SRobert Mustacchi /* assert list: number of entries */ 63*d14abf15SRobert Mustacchi #define FW_LOG_LIST_SIZE 50 64*d14abf15SRobert Mustacchi 65*d14abf15SRobert Mustacchi #define NUM_OF_SAFC_BITS 16 66*d14abf15SRobert Mustacchi #define MAX_COS_NUMBER 4 67*d14abf15SRobert Mustacchi #define MAX_TRAFFIC_TYPES 8 68*d14abf15SRobert Mustacchi #define MAX_PFC_PRIORITIES 8 69*d14abf15SRobert Mustacchi 70*d14abf15SRobert Mustacchi /* used by array traffic_type_to_priority[] to mark traffic type that is not mapped to priority*/ 71*d14abf15SRobert Mustacchi #define LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED 0xFF 72*d14abf15SRobert Mustacchi 73*d14abf15SRobert Mustacchi /* Event Ring definitions */ 74*d14abf15SRobert Mustacchi #define C_ERES_PER_PAGE ( PAGE_SIZE / BITS_TO_BYTES(STRUCT_SIZE(event_ring_elem)) ) 75*d14abf15SRobert Mustacchi #define C_ERE_PER_PAGE_MASK ( C_ERES_PER_PAGE - 1 ) 76*d14abf15SRobert Mustacchi 77*d14abf15SRobert Mustacchi /* number of statistic command */ 78*d14abf15SRobert Mustacchi #define STATS_QUERY_CMD_COUNT 16 79*d14abf15SRobert Mustacchi 80*d14abf15SRobert Mustacchi /* niv list table size */ 81*d14abf15SRobert Mustacchi #define AFEX_LIST_TABLE_SIZE 4096 82*d14abf15SRobert Mustacchi 83*d14abf15SRobert Mustacchi /* invalid VNIC Id. used in VNIC classification */ 84*d14abf15SRobert Mustacchi #define INVALID_VNIC_ID 0xFF 85*d14abf15SRobert Mustacchi 86*d14abf15SRobert Mustacchi /* used for indicating an undefined RAM offset in the IRO arrays */ 87*d14abf15SRobert Mustacchi #define UNDEF_IRO 0x80000000 88*d14abf15SRobert Mustacchi 89*d14abf15SRobert Mustacchi /* used for defining the amount of FCoE tasks supported for PF */ 90*d14abf15SRobert Mustacchi #define MAX_FCOE_FUNCS_PER_ENGINE 2 91*d14abf15SRobert Mustacchi #define MAX_NUM_FCOE_TASKS_PER_ENGINE 4096 /*Each port can have at max 1 function*/ 92*d14abf15SRobert Mustacchi 93*d14abf15SRobert Mustacchi #endif /*__MICROCODE_CONSTANTS_H_*/ 94