1d14abf15SRobert Mustacchi /******************************************************************************* 2d14abf15SRobert Mustacchi * CDDL HEADER START 3d14abf15SRobert Mustacchi * 4d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 5d14abf15SRobert Mustacchi * Common Development and Distribution License (the "License"). 6d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 7d14abf15SRobert Mustacchi * 8d14abf15SRobert Mustacchi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9d14abf15SRobert Mustacchi * or http://www.opensolaris.org/os/licensing. 10d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 11d14abf15SRobert Mustacchi * and limitations under the License. 12d14abf15SRobert Mustacchi * 13d14abf15SRobert Mustacchi * When distributing Covered Code, include this CDDL HEADER in each 14d14abf15SRobert Mustacchi * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15d14abf15SRobert Mustacchi * If applicable, add the following below this CDDL HEADER, with the 16d14abf15SRobert Mustacchi * fields enclosed by brackets "[]" replaced with your own identifying 17d14abf15SRobert Mustacchi * information: Portions Copyright [yyyy] [name of copyright owner] 18d14abf15SRobert Mustacchi * 19d14abf15SRobert Mustacchi * CDDL HEADER END 20d14abf15SRobert Mustacchi * 21d14abf15SRobert Mustacchi * Copyright 2014 QLogic Corporation 22d14abf15SRobert Mustacchi * The contents of this file are subject to the terms of the 23d14abf15SRobert Mustacchi * QLogic End User License (the "License"). 24d14abf15SRobert Mustacchi * You may not use this file except in compliance with the License. 25d14abf15SRobert Mustacchi * 26d14abf15SRobert Mustacchi * You can obtain a copy of the License at 27d14abf15SRobert Mustacchi * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/ 28d14abf15SRobert Mustacchi * QLogic_End_User_Software_License.txt 29d14abf15SRobert Mustacchi * See the License for the specific language governing permissions 30d14abf15SRobert Mustacchi * and limitations under the License. 31d14abf15SRobert Mustacchi * 32d14abf15SRobert Mustacchi * 33d14abf15SRobert Mustacchi * Module Description: 34d14abf15SRobert Mustacchi * This file defines the IDLE_CHK macros 35d14abf15SRobert Mustacchi * 36d14abf15SRobert Mustacchi * History: 37d14abf15SRobert Mustacchi * 11/02/08 Miri Shitrit Inception. 38d14abf15SRobert Mustacchi ******************************************************************************/ 39d14abf15SRobert Mustacchi 40d14abf15SRobert Mustacchi #ifndef _LM_DEBUG_H 41d14abf15SRobert Mustacchi #define _LM_DEBUG_H 42d14abf15SRobert Mustacchi 43d14abf15SRobert Mustacchi // bits must be corralted to the values in idle_chk.csv 44d14abf15SRobert Mustacchi #define IDLE_CHK_CHIP_MASK_57710 0x01 45d14abf15SRobert Mustacchi #define IDLE_CHK_CHIP_MASK_57711 0x02 46d14abf15SRobert Mustacchi #define IDLE_CHK_CHIP_MASK_57731 0x04 47d14abf15SRobert Mustacchi // Added for E3 48d14abf15SRobert Mustacchi #define IDLE_CHK_CHIP_MASK_57773 0x08 49d14abf15SRobert Mustacchi #define IDLE_CHK_CHIP_MASK_57773_B0 0x10 50d14abf15SRobert Mustacchi 51d14abf15SRobert Mustacchi enum { 52d14abf15SRobert Mustacchi IDLE_CHK_ERROR = 1, 53d14abf15SRobert Mustacchi IDLE_CHK_ERROR_NO_TRAFFIC, // indicates an error if test is not under traffic 54d14abf15SRobert Mustacchi IDLE_CHK_WARNING 55d14abf15SRobert Mustacchi } idle_chk_error_level; 56d14abf15SRobert Mustacchi 57d14abf15SRobert Mustacchi #if _MSC_VER 58d14abf15SRobert Mustacchi #if defined(_VBD_) 59d14abf15SRobert Mustacchi #include <ntddk.h> 60d14abf15SRobert Mustacchi #include <ntstrsafe.h> 61d14abf15SRobert Mustacchi #define snprintf RtlStringCchPrintfA 62d14abf15SRobert Mustacchi #define SNPRINTF_VAR(_str) sizeof(_str), 63d14abf15SRobert Mustacchi #else 64d14abf15SRobert Mustacchi #include "vc_os_emul.h" 65d14abf15SRobert Mustacchi #define SNPRINTF_VAR(_str) sizeof(_str), //needed due to change of sprintf_s to fix warnings 66d14abf15SRobert Mustacchi #endif // !NTDDI_VERSION 67d14abf15SRobert Mustacchi 68d14abf15SRobert Mustacchi 69d14abf15SRobert Mustacchi #else // !_MSC_VER 70d14abf15SRobert Mustacchi #define SNPRINTF_VAR(_str) sizeof(_str), 71d14abf15SRobert Mustacchi #endif // _MSC_VER 72d14abf15SRobert Mustacchi 73d14abf15SRobert Mustacchi #define CONDITION_CHK(condition, severity, fail_msg) \ 74d14abf15SRobert Mustacchi total++; \ 75d14abf15SRobert Mustacchi var_severity = severity; \ 76d14abf15SRobert Mustacchi if (condition) { \ 77d14abf15SRobert Mustacchi switch (var_severity) { \ 78d14abf15SRobert Mustacchi case IDLE_CHK_ERROR: \ 79d14abf15SRobert Mustacchi DbgMessage(pdev, FATAL, "idle_chk. Error (level %d): %s\n", severity, fail_msg); \ 80d14abf15SRobert Mustacchi errors++; \ 81d14abf15SRobert Mustacchi break; \ 82d14abf15SRobert Mustacchi case IDLE_CHK_ERROR_NO_TRAFFIC: \ 83d14abf15SRobert Mustacchi DbgMessage(pdev, FATAL, "idle_chk. Error if no traffic (level %d): %s\n", severity, fail_msg); \ 84d14abf15SRobert Mustacchi errors++; \ 85d14abf15SRobert Mustacchi break; \ 86d14abf15SRobert Mustacchi case IDLE_CHK_WARNING: \ 87d14abf15SRobert Mustacchi DbgMessage(pdev, WARN, "idle_chk. Warning (level %d): %s\n", severity, fail_msg); \ 88d14abf15SRobert Mustacchi warnings++; \ 89d14abf15SRobert Mustacchi break; \ 90d14abf15SRobert Mustacchi }\ 91d14abf15SRobert Mustacchi } 92d14abf15SRobert Mustacchi 93d14abf15SRobert Mustacchi 94*4e9ec610SToomas Soome #define IDLE_CHK_CHIP_MASK_CHK(chip_mask) { \ 95d14abf15SRobert Mustacchi b_test_chip=0; \ 96d14abf15SRobert Mustacchi var_chip_mask = 0; \ 97d14abf15SRobert Mustacchi val = REG_RD(pdev, MISC_REG_CHIP_NUM); \ 98d14abf15SRobert Mustacchi chip_rev = REG_RD(pdev, MISC_REG_CHIP_REV); \ 99d14abf15SRobert Mustacchi chip_metal = REG_RD(pdev, MISC_REG_CHIP_METAL); \ 100d14abf15SRobert Mustacchi if (val == 5710) { \ 101d14abf15SRobert Mustacchi var_chip_mask = IDLE_CHK_CHIP_MASK_57710; \ 102d14abf15SRobert Mustacchi } else if (val == 5711 || val == 5712) { \ 103d14abf15SRobert Mustacchi var_chip_mask = IDLE_CHK_CHIP_MASK_57711; \ 104d14abf15SRobert Mustacchi } else if ((val == 5713) || (val == 5714) || (val == 5730) || (val == 5731)) { \ 105d14abf15SRobert Mustacchi var_chip_mask = IDLE_CHK_CHIP_MASK_57731; \ 106d14abf15SRobert Mustacchi } else if (((chip_rev == 0xC) || (chip_rev == 0xD) || (chip_rev == 1)) && ((val == 5773) || (val == 5774) || (val == 5770))) { \ 107d14abf15SRobert Mustacchi var_chip_mask = IDLE_CHK_CHIP_MASK_57773_B0; \ 108d14abf15SRobert Mustacchi } else if ((val == 5773) || (val == 5774) || (val == 5770)) { \ 109d14abf15SRobert Mustacchi var_chip_mask = IDLE_CHK_CHIP_MASK_57773; \ 110d14abf15SRobert Mustacchi } \ 111d14abf15SRobert Mustacchi if (var_chip_mask & chip_mask) { \ 112d14abf15SRobert Mustacchi b_test_chip = 1;\ 113*4e9ec610SToomas Soome } \ 114*4e9ec610SToomas Soome } 115d14abf15SRobert Mustacchi 116d14abf15SRobert Mustacchi /* read one reg and check the condition */ 117d14abf15SRobert Mustacchi #define IDLE_CHK_1(chip_mask, offset, condition, severity, fail_msg) \ 118d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 119d14abf15SRobert Mustacchi if (b_test_chip) { \ 120d14abf15SRobert Mustacchi val = REG_RD(pdev, offset); \ 121d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n", fail_msg, val); \ 122d14abf15SRobert Mustacchi val1 = 0; \ 123d14abf15SRobert Mustacchi val2 = 0; \ 124d14abf15SRobert Mustacchi CONDITION_CHK(condition, severity, prnt_str); \ 125d14abf15SRobert Mustacchi } 126d14abf15SRobert Mustacchi 127d14abf15SRobert Mustacchi /* loop to read one reg and check the condition */ 128d14abf15SRobert Mustacchi #define IDLE_CHK_2(chip_mask, offset, loop, inc, condition, severity, fail_msg) \ 129d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 130d14abf15SRobert Mustacchi if (b_test_chip) { \ 131d14abf15SRobert Mustacchi for (i = 0; i < (loop); i++) { \ 132d14abf15SRobert Mustacchi val = REG_RD(pdev, offset + i*(inc)); \ 133d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n", fail_msg, val); \ 134d14abf15SRobert Mustacchi val1 = 0; \ 135d14abf15SRobert Mustacchi val2 = 0; \ 136d14abf15SRobert Mustacchi CONDITION_CHK(condition, severity, prnt_str); \ 137d14abf15SRobert Mustacchi } \ 138d14abf15SRobert Mustacchi } 139d14abf15SRobert Mustacchi 140d14abf15SRobert Mustacchi /* read two regs and check the condition */ 141d14abf15SRobert Mustacchi #define IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, fail_msg) \ 142d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 143d14abf15SRobert Mustacchi if (b_test_chip) { \ 144d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1); \ 145d14abf15SRobert Mustacchi val2 = REG_RD(pdev, offset2); \ 146d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Values are 0x%x 0x%x\n", fail_msg, val1, val2); \ 147d14abf15SRobert Mustacchi val = 0; \ 148d14abf15SRobert Mustacchi CONDITION_CHK(condition, severity, prnt_str); \ 149d14abf15SRobert Mustacchi } 150d14abf15SRobert Mustacchi 151d14abf15SRobert Mustacchi /* read one reg and check according to CID_CAM */ 152d14abf15SRobert Mustacchi #define IDLE_CHK_4(chip_mask, offset1, offset2, loop, inc, condition, severity, fail_msg) \ 153d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 154d14abf15SRobert Mustacchi if (b_test_chip) { \ 155d14abf15SRobert Mustacchi for (i = 0; i < (loop); i++) { \ 156d14abf15SRobert Mustacchi val1 = REG_RD(pdev, (offset1 + i*inc)); \ 157d14abf15SRobert Mustacchi val2 = REG_RD(pdev, (offset2 + i*(inc))); \ 158d14abf15SRobert Mustacchi val2 = val2 >> 1; \ 159d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1);\ 160d14abf15SRobert Mustacchi val = 0; \ 161d14abf15SRobert Mustacchi CONDITION_CHK(condition, severity, prnt_str); \ 162d14abf15SRobert Mustacchi } \ 163d14abf15SRobert Mustacchi } 164d14abf15SRobert Mustacchi 165d14abf15SRobert Mustacchi 166d14abf15SRobert Mustacchi /* read one reg and check according to another reg */ 167d14abf15SRobert Mustacchi #define IDLE_CHK_5(chip_mask, offset, offset1, offset2, condition, severity, fail_msg) \ 168d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 169d14abf15SRobert Mustacchi if (b_test_chip) { \ 170d14abf15SRobert Mustacchi val = REG_RD(pdev, offset);\ 171d14abf15SRobert Mustacchi if (!val) \ 172d14abf15SRobert Mustacchi IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, fail_msg); \ 173d14abf15SRobert Mustacchi } 174d14abf15SRobert Mustacchi 175d14abf15SRobert Mustacchi /* read wide-bus reg and check sub-fields */ 176d14abf15SRobert Mustacchi #define IDLE_CHK_6(chip_mask, offset, loop, inc, severity) \ 177d14abf15SRobert Mustacchi { \ 178d14abf15SRobert Mustacchi u32 rd_ptr, wr_ptr, rd_bank, wr_bank; \ 179d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 180d14abf15SRobert Mustacchi if (b_test_chip) { \ 181d14abf15SRobert Mustacchi for (i = 0; i < (loop); i++) { \ 182d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset + i*(inc)); \ 183d14abf15SRobert Mustacchi val2 = REG_RD(pdev, offset + i*(inc) + 4); \ 184d14abf15SRobert Mustacchi rd_ptr = ((val1 & 0x3FFFFFC0) >> 6); \ 185d14abf15SRobert Mustacchi wr_ptr = ((((val1 & 0xC0000000) >> 30) & 0x3) | ((val2 & 0x3FFFFF) << 2)); \ 186d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_ptr is not equal to wr_ptr. Values are 0x%x 0x%x\n", i, rd_ptr, wr_ptr);\ 187d14abf15SRobert Mustacchi val = 0; \ 188d14abf15SRobert Mustacchi CONDITION_CHK((rd_ptr != wr_ptr), severity, prnt_str);\ 189d14abf15SRobert Mustacchi rd_bank = ((val1 & 0x30) >> 4); \ 190d14abf15SRobert Mustacchi wr_bank = (val1 & 0x03); \ 191d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "QM: PTRTBL entry %d- rd_bank is not equal to wr_bank. Values are 0x%x 0x%x\n", i, rd_bank, wr_bank); \ 192d14abf15SRobert Mustacchi val = 0; \ 193d14abf15SRobert Mustacchi CONDITION_CHK((rd_bank != wr_bank), severity, prnt_str); \ 194d14abf15SRobert Mustacchi } \ 195d14abf15SRobert Mustacchi } \ 196d14abf15SRobert Mustacchi } 197d14abf15SRobert Mustacchi 198d14abf15SRobert Mustacchi 199d14abf15SRobert Mustacchi /* loop to read wide-bus reg and check according to another reg */ 200d14abf15SRobert Mustacchi #define IDLE_CHK_7(chip_mask, offset, offset1, offset2, loop, inc, condition, severity, fail_msg) \ 201d14abf15SRobert Mustacchi { \ 202d14abf15SRobert Mustacchi u32_t chip_num; \ 203d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 204d14abf15SRobert Mustacchi if (b_test_chip) { \ 205d14abf15SRobert Mustacchi for (i = 0; i < (loop); i++) { \ 206d14abf15SRobert Mustacchi val = REG_RD(pdev, offset2 + i*4); \ 207d14abf15SRobert Mustacchi if ((val & 0x1) == 1) { \ 208d14abf15SRobert Mustacchi chip_num = REG_RD(pdev , MISC_REG_CHIP_NUM); \ 209d14abf15SRobert Mustacchi if ((chip_num == 0x1662) || (chip_num == 0x1663) || (chip_num == 0x1651) || (chip_num == 0x1652)) { \ 210d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc)); \ 211d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \ 212d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \ 213d14abf15SRobert Mustacchi REG_RD(pdev, offset1 + i*(inc) + 12); \ 214d14abf15SRobert Mustacchi val1 = (val1 & 0x1E000000) >> 25; \ 215d14abf15SRobert Mustacchi } else { \ 216d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc)); \ 217d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \ 218d14abf15SRobert Mustacchi val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \ 219d14abf15SRobert Mustacchi REG_RD(pdev, offset1 + i*(inc) + 12); \ 220d14abf15SRobert Mustacchi val1 = (val1 & 0x00000078) >> 3; \ 221d14abf15SRobert Mustacchi } \ 222d14abf15SRobert Mustacchi val2 = REG_RD(pdev, offset + i*4); \ 223d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s - LCID %d CID_CAM 0x%x. Value is 0x%x\n", fail_msg, i, val2, val1); \ 224d14abf15SRobert Mustacchi CONDITION_CHK(condition, severity, prnt_str); \ 225d14abf15SRobert Mustacchi } \ 226d14abf15SRobert Mustacchi } \ 227d14abf15SRobert Mustacchi } \ 228d14abf15SRobert Mustacchi } 229d14abf15SRobert Mustacchi 230d14abf15SRobert Mustacchi /* check PXP VQ occupancy according to condition */ 231d14abf15SRobert Mustacchi #define IDLE_CHK_8(chip_mask, offset, condition, severity, fail_msg) \ 232d14abf15SRobert Mustacchi IDLE_CHK_CHIP_MASK_CHK(chip_mask); \ 233d14abf15SRobert Mustacchi if (b_test_chip) { \ 234d14abf15SRobert Mustacchi val = REG_RD(pdev, offset); \ 235d14abf15SRobert Mustacchi if (condition) { \ 236d14abf15SRobert Mustacchi snprintf (prnt_str, SNPRINTF_VAR(prnt_str) "%s. Value is 0x%x\n%s\n", fail_msg, val,_vq_hoq(pdev,#offset)); \ 237d14abf15SRobert Mustacchi val = 0; \ 238d14abf15SRobert Mustacchi val1 = 0; \ 239d14abf15SRobert Mustacchi val2 = 0; \ 240d14abf15SRobert Mustacchi CONDITION_CHK(1, severity, prnt_str); \ 241d14abf15SRobert Mustacchi } \ 242d14abf15SRobert Mustacchi } 243d14abf15SRobert Mustacchi 244d14abf15SRobert Mustacchi #endif// _LM_DEBUG_H 245d14abf15SRobert Mustacchi 246