1eef4f27bSRobert Mustacchi /* 2eef4f27bSRobert Mustacchi * Copyright 2014-2017 Cavium, Inc. 3eef4f27bSRobert Mustacchi * The contents of this file are subject to the terms of the Common Development 4eef4f27bSRobert Mustacchi * and Distribution License, v.1, (the "License"). 5eef4f27bSRobert Mustacchi * 6eef4f27bSRobert Mustacchi * You may not use this file except in compliance with the License. 7eef4f27bSRobert Mustacchi * 8eef4f27bSRobert Mustacchi * You can obtain a copy of the License at available 9eef4f27bSRobert Mustacchi * at http://opensource.org/licenses/CDDL-1.0 10eef4f27bSRobert Mustacchi * 11eef4f27bSRobert Mustacchi * See the License for the specific language governing permissions and 12eef4f27bSRobert Mustacchi * limitations under the License. 13eef4f27bSRobert Mustacchi */ 14eef4f27bSRobert Mustacchi 15eef4f27bSRobert Mustacchi 16eef4f27bSRobert Mustacchi #ifndef _l2_defs_h_ 17eef4f27bSRobert Mustacchi #define _l2_defs_h_ 18eef4f27bSRobert Mustacchi 19eef4f27bSRobert Mustacchi 20eef4f27bSRobert Mustacchi typedef struct tx_bidx_boff_b{ 21eef4f27bSRobert Mustacchi u16_t bidx; 22eef4f27bSRobert Mustacchi u16_t boff; 23eef4f27bSRobert Mustacchi }tx_bidx_boff_b_t; 24eef4f27bSRobert Mustacchi 25eef4f27bSRobert Mustacchi typedef struct tx_bidx_boff_l{ 26eef4f27bSRobert Mustacchi u16_t boff; 27eef4f27bSRobert Mustacchi u16_t bidx; 28eef4f27bSRobert Mustacchi }tx_bidx_boff_l_t; 29eef4f27bSRobert Mustacchi 30eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 31eef4f27bSRobert Mustacchi typedef tx_bidx_boff_l_t tx_bidx_boff_t; 32eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 33eef4f27bSRobert Mustacchi typedef tx_bidx_boff_b_t tx_bidx_boff_t; 34eef4f27bSRobert Mustacchi #endif 35eef4f27bSRobert Mustacchi 36eef4f27bSRobert Mustacchi 37eef4f27bSRobert Mustacchi typedef struct bd_scan_b{ 38eef4f27bSRobert Mustacchi u32_t cmd; 39eef4f27bSRobert Mustacchi 40eef4f27bSRobert Mustacchi u32_t len; 41eef4f27bSRobert Mustacchi 42eef4f27bSRobert Mustacchi u16_t flags; 43eef4f27bSRobert Mustacchi u16_t vlan_tag; 44eef4f27bSRobert Mustacchi u16_t reserved; 45eef4f27bSRobert Mustacchi u16_t unused_13; 46*55fea89dSDan Cross tx_bidx_boff_t bidx_boff_current; 47*55fea89dSDan Cross tx_bidx_boff_t bidx_boff_prev; 48eef4f27bSRobert Mustacchi u32_t bseq_current; 49eef4f27bSRobert Mustacchi u32_t bseq_prev; 50eef4f27bSRobert Mustacchi }bd_scan_b_t; 51eef4f27bSRobert Mustacchi 52eef4f27bSRobert Mustacchi typedef struct bd_scan_l{ 53eef4f27bSRobert Mustacchi u32_t cmd; 54eef4f27bSRobert Mustacchi 55eef4f27bSRobert Mustacchi u32_t len; 56eef4f27bSRobert Mustacchi 57eef4f27bSRobert Mustacchi u16_t vlan_tag; 58eef4f27bSRobert Mustacchi u16_t flags; 59eef4f27bSRobert Mustacchi 60eef4f27bSRobert Mustacchi u16_t unused_13; 61eef4f27bSRobert Mustacchi u16_t reserved; 62*55fea89dSDan Cross tx_bidx_boff_t bidx_boff_current; 63*55fea89dSDan Cross tx_bidx_boff_t bidx_boff_prev; 64eef4f27bSRobert Mustacchi u32_t bseq_current; 65eef4f27bSRobert Mustacchi u32_t bseq_prev; 66eef4f27bSRobert Mustacchi }bd_scan_l_t; 67eef4f27bSRobert Mustacchi 68eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 69eef4f27bSRobert Mustacchi typedef bd_scan_l_t bd_scan_t; 70eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 71eef4f27bSRobert Mustacchi typedef bd_scan_b_t bd_scan_t; 72eef4f27bSRobert Mustacchi #endif 73eef4f27bSRobert Mustacchi 74eef4f27bSRobert Mustacchi 75eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 76eef4f27bSRobert Mustacchi struct idx16_fields_t { 77eef4f27bSRobert Mustacchi u16_t idx : 15; 78eef4f27bSRobert Mustacchi u16_t msb : 1; 79eef4f27bSRobert Mustacchi }; 80eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 81eef4f27bSRobert Mustacchi struct idx16_fields_t { 82eef4f27bSRobert Mustacchi u16_t msb : 1; 83eef4f27bSRobert Mustacchi u16_t idx : 15; 84eef4f27bSRobert Mustacchi }; 85eef4f27bSRobert Mustacchi #endif 86eef4f27bSRobert Mustacchi 87eef4f27bSRobert Mustacchi union idx16_union_t { 88eef4f27bSRobert Mustacchi struct idx16_fields_t fields; 89eef4f27bSRobert Mustacchi u16_t idx16; 90eef4f27bSRobert Mustacchi }; 91eef4f27bSRobert Mustacchi 92eef4f27bSRobert Mustacchi // Refer to Timer Architecture document. 93*55fea89dSDan Cross // The timers have different sizes, however, the LSB of each timer indicates 94*55fea89dSDan Cross // whether the timer is armed or dis-armed (a value of '1' indicates that the 95eef4f27bSRobert Mustacchi // timer is dis-armed, a value of '0' indicates that the timer is armed). The 96eef4f27bSRobert Mustacchi // MSB of each timer indicates whether the timer value has rolled over during 97eef4f27bSRobert Mustacchi // the course of operation. Thus a 32-bit timer is essentially a 30-bit timer 98eef4f27bSRobert Mustacchi // with the MSB and LSB used for different purposes. 99eef4f27bSRobert Mustacchi #define MAX_TMR1_CNT_LIMIT 0x3FFFFFFF // 30-bit timer 100eef4f27bSRobert Mustacchi #define TMR1_TICKS_PER_SEC 1000 101eef4f27bSRobert Mustacchi #define TMR1_MSEC(x) \ 102eef4f27bSRobert Mustacchi ((u32_t)((x) * TMR1_TICKS_PER_SEC/1000) ? \ 103eef4f27bSRobert Mustacchi (u32_t)((x) * TMR1_TICKS_PER_SEC/1000) : 1) 104eef4f27bSRobert Mustacchi 105eef4f27bSRobert Mustacchi #define MAX_TMR2_CNT_LIMIT 0x3FFF // 14-bit timer 106eef4f27bSRobert Mustacchi #define TMR2_TICKS_PER_SEC 100 107eef4f27bSRobert Mustacchi #define TMR2_MSEC(x) \ 108eef4f27bSRobert Mustacchi ((u32_t)((x) * TMR2_TICKS_PER_SEC/1000) ? \ 109eef4f27bSRobert Mustacchi (u32_t)((x) * TMR2_TICKS_PER_SEC/1000) : 1) 110eef4f27bSRobert Mustacchi 111eef4f27bSRobert Mustacchi #define MAX_TMR3_CNT_LIMIT 0x3FFF // 14-bit timer 112eef4f27bSRobert Mustacchi #define TMR3_TICKS_PER_SEC 1000 113eef4f27bSRobert Mustacchi #define TMR3_MSEC(x) \ 114eef4f27bSRobert Mustacchi ((u32_t)((x) * TMR3_TICKS_PER_SEC/1000) ? \ 115eef4f27bSRobert Mustacchi (u32_t)((x) * TMR3_TICKS_PER_SEC/1000) : 1) 116eef4f27bSRobert Mustacchi 117eef4f27bSRobert Mustacchi #define MAX_TMR4_CNT_LIMIT 0x3FFF // 14-bit timer 118eef4f27bSRobert Mustacchi #define TMR4_TICKS_PER_SEC 10 119eef4f27bSRobert Mustacchi #define TMR4_MSEC(x) \ 120eef4f27bSRobert Mustacchi ((u32_t)((x) * TMR4_TICKS_PER_SEC/1000) ? \ 121eef4f27bSRobert Mustacchi (u32_t)((x) * TMR4_TICKS_PER_SEC/1000) : 1) 122eef4f27bSRobert Mustacchi 123eef4f27bSRobert Mustacchi #define MAX_TMR5_CNT_LIMIT 0x3FFF // 14-bit timer 124eef4f27bSRobert Mustacchi #define TMR5_TICKS_PER_SEC 10000 125eef4f27bSRobert Mustacchi #define TMR5_MSEC(x) \ 126eef4f27bSRobert Mustacchi ((u32_t)((x) * TMR5_TICKS_PER_SEC/1000) ? \ 127eef4f27bSRobert Mustacchi (u32_t)((x) * TMR5_TICKS_PER_SEC/1000) : 1) 128eef4f27bSRobert Mustacchi 129eef4f27bSRobert Mustacchi 130eef4f27bSRobert Mustacchi /* 131eef4f27bSRobert Mustacchi * l2_bd_chain_context_b definition 132eef4f27bSRobert Mustacchi */ 133eef4f27bSRobert Mustacchi typedef struct l2_bd_chain_context_b 134eef4f27bSRobert Mustacchi { 135eef4f27bSRobert Mustacchi u8_t l2ctx_ctx_type; 136eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE (0xf<<4) 137eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED (0<<4) 138eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<4) 139eef4f27bSRobert Mustacchi 140eef4f27bSRobert Mustacchi u8_t l2ctx_ctx_size; 141eef4f27bSRobert Mustacchi u8_t l2ctx_bd_pre_read; 142*55fea89dSDan Cross // L2 flow control watermarks b0-b3 and b4-b7 are the low and high 143eef4f27bSRobert Mustacchi // watermark respectively 144*55fea89dSDan Cross u8_t l2ctx_watermarks; 145eef4f27bSRobert Mustacchi u8_t l2ctx_sb_num; 146eef4f27bSRobert Mustacchi u8_t l2ctx_krnlq_id; 147eef4f27bSRobert Mustacchi u16_t l2ctx_host_bdidx; 148eef4f27bSRobert Mustacchi u32_t l2ctx_host_bseq; 149eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bseq; 150eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bdhaddr_hi; 151eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bdhaddr_lo; 152eef4f27bSRobert Mustacchi u16_t l2ctx_v2p_flags; 153eef4f27bSRobert Mustacchi // only valid in Linux for Flow control (maintained by RV2P) 154*55fea89dSDan Cross #define L2CTX_V2P_FLAGS_PAUSE (1<<0) 155eef4f27bSRobert Mustacchi u16_t l2ctx_nx_bdidx; 156*55fea89dSDan Cross u8_t unused_1; 157*55fea89dSDan Cross u8_t l2ctx_queue_type; 158eef4f27bSRobert Mustacchi u8_t l2ctx_filter_type; 159eef4f27bSRobert Mustacchi u8_t reserved; 160eef4f27bSRobert Mustacchi u16_t unused_2; 161eef4f27bSRobert Mustacchi u16_t l2ctx_max_pkt_len; // max L2 pkt length the RX BD can accomodate 162*55fea89dSDan Cross u32_t unused[7]; 163*55fea89dSDan Cross u16_t l2ctx_vmq_lookahead_sz; /* VMQ look ahead size */ 164eef4f27bSRobert Mustacchi // Following fields are for LINUX only (jumbo pkt mode) 165eef4f27bSRobert Mustacchi u8_t l2ctx_pg_bd_pre_read; 166eef4f27bSRobert Mustacchi u8_t unused_4; 167eef4f27bSRobert Mustacchi u16_t unused_5; 168eef4f27bSRobert Mustacchi u16_t l2ctx_host_pg_bidx; 169eef4f27bSRobert Mustacchi u16_t l2ctx_skb_buf_size; 170eef4f27bSRobert Mustacchi u16_t l2ctx_pg_buf_size; 171eef4f27bSRobert Mustacchi u16_t unused_6; 172eef4f27bSRobert Mustacchi u16_t l2ctx_rbdc_key; 173eef4f27bSRobert Mustacchi u32_t l2ctx_nx_pg_bdhaddr_hi; 174eef4f27bSRobert Mustacchi u32_t l2ctx_nx_pg_bdhaddr_lo; 175eef4f27bSRobert Mustacchi u16_t unused_7; 176eef4f27bSRobert Mustacchi u16_t l2ctx_nx_pg_bdidx; 177eef4f27bSRobert Mustacchi u32_t unused_8[9]; 178eef4f27bSRobert Mustacchi } l2_bd_chain_context_b_t; 179eef4f27bSRobert Mustacchi 180eef4f27bSRobert Mustacchi 181eef4f27bSRobert Mustacchi /* 182eef4f27bSRobert Mustacchi * l2_bd_chain_context_l definition 183eef4f27bSRobert Mustacchi */ 184eef4f27bSRobert Mustacchi typedef struct l2_bd_chain_context_l 185eef4f27bSRobert Mustacchi { 186*55fea89dSDan Cross // L2 flow control watermarks b0-b3 and b4-b7 are the low and high 187eef4f27bSRobert Mustacchi // watermark respectively (Linux L2 flow control only) 188*55fea89dSDan Cross u8_t l2ctx_watermarks; 189eef4f27bSRobert Mustacchi u8_t l2ctx_bd_pre_read; 190eef4f27bSRobert Mustacchi u8_t l2ctx_ctx_size; 191eef4f27bSRobert Mustacchi u8_t l2ctx_ctx_type; 192eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE (0xf<<4) 193eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED (0<<4) 194eef4f27bSRobert Mustacchi #define L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<4) 195eef4f27bSRobert Mustacchi 196eef4f27bSRobert Mustacchi u16_t l2ctx_host_bdidx; 197eef4f27bSRobert Mustacchi u8_t l2ctx_krnlq_id; 198eef4f27bSRobert Mustacchi u8_t l2ctx_sb_num; // Linux only 199eef4f27bSRobert Mustacchi u32_t l2ctx_host_bseq; 200eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bseq; 201eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bdhaddr_hi; 202eef4f27bSRobert Mustacchi u32_t l2ctx_nx_bdhaddr_lo; 203eef4f27bSRobert Mustacchi u16_t l2ctx_nx_bdidx; 204eef4f27bSRobert Mustacchi u16_t l2ctx_v2p_flags; 205eef4f27bSRobert Mustacchi // only valid in Linux for Flow control (maintained by RV2P) 206*55fea89dSDan Cross #define L2CTX_V2P_FLAGS_PAUSE (1<<0) 207eef4f27bSRobert Mustacchi u8_t reserved; 208eef4f27bSRobert Mustacchi u8_t l2ctx_filter_type; 209*55fea89dSDan Cross u8_t l2ctx_queue_type; 210*55fea89dSDan Cross u8_t unused_1; 211eef4f27bSRobert Mustacchi u16_t l2ctx_max_pkt_len; // max L2 pkt length the RX BD can accomodate 212eef4f27bSRobert Mustacchi u16_t unused_2; 213*55fea89dSDan Cross u32_t unused[7]; 214eef4f27bSRobert Mustacchi u8_t unused_4; 215eef4f27bSRobert Mustacchi u8_t l2ctx_pg_bd_pre_read; // Linux jumbo pkt mode only 216eef4f27bSRobert Mustacchi u16_t l2ctx_vmq_lookahead_sz; 217eef4f27bSRobert Mustacchi // Following fields are for LINUX only (jumbo pkt mode) 218eef4f27bSRobert Mustacchi u16_t l2ctx_host_pg_bidx; 219eef4f27bSRobert Mustacchi u16_t unused_5; 220eef4f27bSRobert Mustacchi u16_t l2ctx_pg_buf_size; 221eef4f27bSRobert Mustacchi u16_t l2ctx_skb_buf_size; 222eef4f27bSRobert Mustacchi u16_t l2ctx_rbdc_key; 223eef4f27bSRobert Mustacchi u16_t unused_6; 224eef4f27bSRobert Mustacchi u32_t l2ctx_nx_pg_bdhaddr_hi; 225eef4f27bSRobert Mustacchi u32_t l2ctx_nx_pg_bdhaddr_lo; 226eef4f27bSRobert Mustacchi u16_t l2ctx_nx_pg_bdidx; 227eef4f27bSRobert Mustacchi u16_t unused_7; 228eef4f27bSRobert Mustacchi u32_t unused_8[9]; 229eef4f27bSRobert Mustacchi } l2_bd_chain_context_l_t; 230eef4f27bSRobert Mustacchi 231eef4f27bSRobert Mustacchi 232eef4f27bSRobert Mustacchi /* 233eef4f27bSRobert Mustacchi * l2_bd_chain_context select 234eef4f27bSRobert Mustacchi */ 235eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 236eef4f27bSRobert Mustacchi typedef l2_bd_chain_context_l_t l2_bd_chain_context_t; 237eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 238eef4f27bSRobert Mustacchi #if defined(CONFIG_PPC64) || defined(__sparc) 239eef4f27bSRobert Mustacchi typedef l2_bd_chain_context_l_t l2_bd_chain_context_t; 240eef4f27bSRobert Mustacchi #else 241eef4f27bSRobert Mustacchi typedef l2_bd_chain_context_b_t l2_bd_chain_context_t; 242eef4f27bSRobert Mustacchi #endif 243eef4f27bSRobert Mustacchi #endif 244eef4f27bSRobert Mustacchi 245eef4f27bSRobert Mustacchi /* 246eef4f27bSRobert Mustacchi * tcp_context_cmd_cell_b_te definition 247eef4f27bSRobert Mustacchi */ 248eef4f27bSRobert Mustacchi typedef struct tcp_context_cmd_cell_b_te 249eef4f27bSRobert Mustacchi { 250eef4f27bSRobert Mustacchi u8_t ccell_cmd_type; 251eef4f27bSRobert Mustacchi 252eef4f27bSRobert Mustacchi u8_t ccell_est_nbd; 253eef4f27bSRobert Mustacchi u16_t ccell_tx_host_bidx; 254eef4f27bSRobert Mustacchi u32_t ccell_tx_mss; 255eef4f27bSRobert Mustacchi 256eef4f27bSRobert Mustacchi u32_t ccell_tx_host_bseq; 257eef4f27bSRobert Mustacchi u32_t ccell_tsch_bseq; 258eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bseq; 259eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_tbdr_bidx_boff; 260eef4f27bSRobert Mustacchi #if defined(_ANSI_C_) 261*55fea89dSDan Cross // compiler switch is to avoid complaints from some ANSI compilers 262eef4f27bSRobert Mustacchi // (e.g. Solaris) that don't support unnamed union 263*55fea89dSDan Cross struct { 264eef4f27bSRobert Mustacchi u32_t hi; 265*55fea89dSDan Cross u32_t lo; 266eef4f27bSRobert Mustacchi } ccell_tbdr_bhaddr; 267eef4f27bSRobert Mustacchi #else 268eef4f27bSRobert Mustacchi union { 269*55fea89dSDan Cross struct { 270eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bhaddr_hi; 271*55fea89dSDan Cross u32_t ccell_tbdr_bhaddr_lo; 272eef4f27bSRobert Mustacchi }; 273eef4f27bSRobert Mustacchi u64_t ccell_tbdr_bhaddr; 274eef4f27bSRobert Mustacchi }; 275eef4f27bSRobert Mustacchi #endif 276eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_txp_bidx_boff; 277eef4f27bSRobert Mustacchi u32_t ccell_txp_bseq; 278eef4f27bSRobert Mustacchi } tcp_context_cmd_cell_b_te_t; 279eef4f27bSRobert Mustacchi 280eef4f27bSRobert Mustacchi 281eef4f27bSRobert Mustacchi 282eef4f27bSRobert Mustacchi /* 283eef4f27bSRobert Mustacchi * tcp_context_cmd_cell_l_te definition 284eef4f27bSRobert Mustacchi */ 285eef4f27bSRobert Mustacchi typedef struct tcp_context_cmd_cell_l_te 286eef4f27bSRobert Mustacchi { 287eef4f27bSRobert Mustacchi u16_t ccell_tx_host_bidx; 288eef4f27bSRobert Mustacchi u8_t ccell_est_nbd; 289eef4f27bSRobert Mustacchi u8_t ccell_cmd_type; 290eef4f27bSRobert Mustacchi u32_t ccell_tx_mss; 291eef4f27bSRobert Mustacchi 292eef4f27bSRobert Mustacchi u32_t ccell_tx_host_bseq; 293eef4f27bSRobert Mustacchi u32_t ccell_tsch_bseq; 294eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bseq; 295eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_tbdr_bidx_boff; 296*55fea89dSDan Cross struct { 297eef4f27bSRobert Mustacchi u32_t hi; 298*55fea89dSDan Cross u32_t lo; 299eef4f27bSRobert Mustacchi } ccell_tbdr_bhaddr; 300eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_txp_bidx_boff; 301eef4f27bSRobert Mustacchi u32_t ccell_txp_bseq; 302eef4f27bSRobert Mustacchi } tcp_context_cmd_cell_l_te_t; 303eef4f27bSRobert Mustacchi 304eef4f27bSRobert Mustacchi 305eef4f27bSRobert Mustacchi typedef struct tcp_context_cmd_cell_b_xi 306eef4f27bSRobert Mustacchi { 307eef4f27bSRobert Mustacchi u8_t ccell_cmd_type; 308eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE (0xf<<0) 309eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L2 (0<<0) 310eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_TCP (1<<0) 311eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L5_CHAIN (2<<0) 312eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_SEND_L5_PGTBL (3<<0) 313eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_WRITE_L5_PGTBL (4<<0) 314eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_RDREQ_L5_PGTBL (5<<0) 315eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L5_DONOTHING (6<<0) 316eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_7_L5_PGTBL (7<<0) 317eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_8_CHAIN (8<<0) 318eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_9_CHAIN (9<<0) 319eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_10_CHAIN (10<<0) 320eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_11_PGTBL (11<<0) 321eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_12_PGTBL (12<<0) 322eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_13_PGTBL (13<<0) 323eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_14_PGTBL (14<<0) 324eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_15_PGTBL (15<<0) 325eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ (0xf<<4) 326eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_256 (0<<4) 327eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_512 (1<<4) 328eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_1K (2<<4) 329eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_2K (3<<4) 330eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_4K (4<<4) 331eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_8K (5<<4) 332eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_16K (6<<4) 333eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_32K (7<<4) 334eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_64K (8<<4) 335eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_128K (9<<4) 336eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_256K (10<<4) 337eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_512K (11<<4) 338eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_1M (12<<4) 339eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_2M (13<<4) 340eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_4M (14<<4) 341eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_8M (15<<4) 342eef4f27bSRobert Mustacchi u8_t ccell_est_nbd; 343eef4f27bSRobert Mustacchi u16_t ccell_tx_host_bidx; 344eef4f27bSRobert Mustacchi u32_t ccell_tx_mss; 345eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_MSS (0x3fffL<<0) 346eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_MULT (0x7ffL<<14) 347eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_PESS_ON (1UL<<25) 348eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_OH (0x3fL<<26) 349eef4f27bSRobert Mustacchi u32_t ccell_tx_host_bseq; 350eef4f27bSRobert Mustacchi u32_t ccell_tsch_bseq; 351eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bseq; 352eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_tbdr_bidx_boff; 353eef4f27bSRobert Mustacchi #if defined(_ANSI_C_) 354*55fea89dSDan Cross // compiler switch is to avoid complaints from some ANSI compilers 355eef4f27bSRobert Mustacchi // (e.g. Solaris) that don't support unnamed union 356*55fea89dSDan Cross struct { 357eef4f27bSRobert Mustacchi u32_t hi; 358*55fea89dSDan Cross u32_t lo; 359eef4f27bSRobert Mustacchi } ccell_tbdr_bhaddr; 360eef4f27bSRobert Mustacchi #else 361eef4f27bSRobert Mustacchi union { 362*55fea89dSDan Cross struct { 363eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bhaddr_hi; 364*55fea89dSDan Cross u32_t ccell_tbdr_bhaddr_lo; 365eef4f27bSRobert Mustacchi }; 366eef4f27bSRobert Mustacchi u64_t ccell_tbdr_bhaddr; 367eef4f27bSRobert Mustacchi }; 368eef4f27bSRobert Mustacchi #endif 369eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_txp_bidx_boff; 370eef4f27bSRobert Mustacchi u32_t ccell_txp_bseq; 371eef4f27bSRobert Mustacchi u8_t ccell_reserved0[3]; 372eef4f27bSRobert Mustacchi const u8_t ccell_tcmd_fnum; // NOTE: FW must NEVER change or initialize this field! 373eef4f27bSRobert Mustacchi u32_t reserved1; // 8 byte alignment 374eef4f27bSRobert Mustacchi } tcp_context_cmd_cell_b_xi_t; 375eef4f27bSRobert Mustacchi 376eef4f27bSRobert Mustacchi 377eef4f27bSRobert Mustacchi 378eef4f27bSRobert Mustacchi 379eef4f27bSRobert Mustacchi /* 380eef4f27bSRobert Mustacchi * tcp_context_cmd_cell_l_xi definition 381eef4f27bSRobert Mustacchi */ 382eef4f27bSRobert Mustacchi typedef struct tcp_context_cmd_cell_l_xi 383eef4f27bSRobert Mustacchi { 384eef4f27bSRobert Mustacchi u16_t ccell_tx_host_bidx; 385eef4f27bSRobert Mustacchi u8_t ccell_est_nbd; 386eef4f27bSRobert Mustacchi u8_t ccell_cmd_type; 387eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE (0xf<<0) 388eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L2 (0<<0) 389eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_TCP (1<<0) 390eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L5_CHAIN (2<<0) 391eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_SEND_L5_PGTBL (3<<0) 392eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_WRITE_L5_PGTBL (4<<0) 393eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_RDREQ_L5_PGTBL (5<<0) 394eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_L5_DONOTHING (6<<0) 395eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_7_L5_PGTBL (7<<0) 396eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_8_CHAIN (8<<0) 397eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_9_CHAIN (9<<0) 398eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_10_CHAIN (10<<0) 399eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_11_PGTBL (11<<0) 400eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_12_PGTBL (12<<0) 401eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_13_PGTBL (13<<0) 402eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_14_PGTBL (14<<0) 403eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_TYPE_15_PGTBL (15<<0) 404eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ (0xf<<4) 405eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_256 (0<<4) 406eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_512 (1<<4) 407eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_1K (2<<4) 408eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_2K (3<<4) 409eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_4K (4<<4) 410eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_8K (5<<4) 411eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_16K (6<<4) 412eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_32K (7<<4) 413eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_64K (8<<4) 414eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_128K (9<<4) 415eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_256K (10<<4) 416eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_512K (11<<4) 417eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_1M (12<<4) 418eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_2M (13<<4) 419eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_4M (14<<4) 420eef4f27bSRobert Mustacchi #define CCELL_CMD_TYPE_PG_SZ_8M (15<<4) 421eef4f27bSRobert Mustacchi 422eef4f27bSRobert Mustacchi u32_t ccell_tx_mss; 423eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_MSS (0x3fffL<<0) 424eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_MULT (0x7ffL<<14) 425eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_PESS_ON (1UL<<25) 426eef4f27bSRobert Mustacchi #define CCELL_TX_MSS_OH (0x3fL<<26) 427eef4f27bSRobert Mustacchi 428eef4f27bSRobert Mustacchi u32_t ccell_tx_host_bseq; 429eef4f27bSRobert Mustacchi u32_t ccell_tsch_bseq; 430eef4f27bSRobert Mustacchi u32_t ccell_tbdr_bseq; 431eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_tbdr_bidx_boff; 432*55fea89dSDan Cross struct { 433eef4f27bSRobert Mustacchi u32_t hi; 434*55fea89dSDan Cross u32_t lo; 435eef4f27bSRobert Mustacchi } ccell_tbdr_bhaddr; 436eef4f27bSRobert Mustacchi tx_bidx_boff_t ccell_txp_bidx_boff; 437eef4f27bSRobert Mustacchi u32_t ccell_txp_bseq; 438eef4f27bSRobert Mustacchi const u8_t ccell_tcmd_fnum; // NOTE: FW must NEVER change or initialize this field! 439eef4f27bSRobert Mustacchi u8_t ccell_reserved0[3]; 440eef4f27bSRobert Mustacchi u32_t reserved1; // 8 byte alignment 441eef4f27bSRobert Mustacchi } tcp_context_cmd_cell_l_xi_t; 442eef4f27bSRobert Mustacchi 443eef4f27bSRobert Mustacchi 444eef4f27bSRobert Mustacchi /* 445eef4f27bSRobert Mustacchi * tcp_context_cmd_cell select 446eef4f27bSRobert Mustacchi */ 447eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 448eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_l_te_t tcp_context_cmd_cell_te_t; 449eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_l_xi_t tcp_context_cmd_cell_xi_t; 450eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 451eef4f27bSRobert Mustacchi #if defined(CONFIG_PPC64) || defined(__sparc) 452eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_l_te_t tcp_context_cmd_cell_te_t; 453eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_l_xi_t tcp_context_cmd_cell_xi_t; 454eef4f27bSRobert Mustacchi #else 455eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_b_te_t tcp_context_cmd_cell_te_t; 456eef4f27bSRobert Mustacchi typedef tcp_context_cmd_cell_b_xi_t tcp_context_cmd_cell_xi_t; 457eef4f27bSRobert Mustacchi #endif 458eef4f27bSRobert Mustacchi #endif 459eef4f27bSRobert Mustacchi 460eef4f27bSRobert Mustacchi /* 461eef4f27bSRobert Mustacchi * pg_context_b definition 462eef4f27bSRobert Mustacchi */ 463eef4f27bSRobert Mustacchi typedef struct pg_context_b 464eef4f27bSRobert Mustacchi { 465eef4f27bSRobert Mustacchi u8_t pg_type; 466eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE (0xf<<4) 467eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_EMPTY (0<<4) 468eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L2 (1<<4) 469eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_TCP (2<<4) 470eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L5 (3<<4) 471eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L2_BD_CHN (4<<4) 472eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_PG (5<<4) 473eef4f27bSRobert Mustacchi 474eef4f27bSRobert Mustacchi u8_t pg_size; 475eef4f27bSRobert Mustacchi u8_t pg_krnlq_id; // Xinan and X1V only 476eef4f27bSRobert Mustacchi u8_t unused_0; 477eef4f27bSRobert Mustacchi u32_t unused_1[2]; 478eef4f27bSRobert Mustacchi u32_t pg_timer1; 479eef4f27bSRobert Mustacchi u16_t pg_timer2; 480eef4f27bSRobert Mustacchi u16_t pg_timer3; 481eef4f27bSRobert Mustacchi u16_t pg_timer4; 482eef4f27bSRobert Mustacchi u16_t pg_timer5; 483eef4f27bSRobert Mustacchi u8_t pg_l2hdr_nbytes; 484eef4f27bSRobert Mustacchi u8_t pg_flags; 485eef4f27bSRobert Mustacchi #define PG_FLAGS_SNAP_ENCAP (1<<0) 486eef4f27bSRobert Mustacchi #define PG_FLAGS_VLAN_TAGGING (1<<1) 487eef4f27bSRobert Mustacchi 488eef4f27bSRobert Mustacchi u8_t pg_da[6]; 489eef4f27bSRobert Mustacchi u8_t pg_sa[6]; 490eef4f27bSRobert Mustacchi u16_t pg_etype; 491eef4f27bSRobert Mustacchi u16_t pg_vlan_tag; 492eef4f27bSRobert Mustacchi u16_t pg_ipid_start; 493eef4f27bSRobert Mustacchi u16_t pg_ipid_count; 494eef4f27bSRobert Mustacchi u16_t unused_2; 495eef4f27bSRobert Mustacchi } pg_context_b_t; 496eef4f27bSRobert Mustacchi 497eef4f27bSRobert Mustacchi 498eef4f27bSRobert Mustacchi /* 499eef4f27bSRobert Mustacchi * pg_context_l definition 500eef4f27bSRobert Mustacchi */ 501eef4f27bSRobert Mustacchi typedef struct pg_context_l 502eef4f27bSRobert Mustacchi { 503eef4f27bSRobert Mustacchi u8_t unused_0; 504eef4f27bSRobert Mustacchi u8_t pg_krnlq_id; // Xinan and X1V only 505eef4f27bSRobert Mustacchi u8_t pg_size; 506eef4f27bSRobert Mustacchi u8_t pg_type; 507eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE (0xf<<4) 508eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_EMPTY (0<<4) 509eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L2 (1<<4) 510eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_TCP (2<<4) 511eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L5 (3<<4) 512eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_L2_BD_CHN (4<<4) 513eef4f27bSRobert Mustacchi #define PG_TYPE_TYPE_PG (5<<4) 514eef4f27bSRobert Mustacchi u32_t unused_1[2]; 515eef4f27bSRobert Mustacchi 516eef4f27bSRobert Mustacchi u32_t pg_timer1; 517eef4f27bSRobert Mustacchi u16_t pg_timer3; 518eef4f27bSRobert Mustacchi u16_t pg_timer2; 519eef4f27bSRobert Mustacchi u16_t pg_timer5; 520eef4f27bSRobert Mustacchi u16_t pg_timer4; 521eef4f27bSRobert Mustacchi u8_t pg_da[6]; 522eef4f27bSRobert Mustacchi u8_t pg_flags; 523eef4f27bSRobert Mustacchi #define PG_FLAGS_SNAP_ENCAP (1<<0) 524eef4f27bSRobert Mustacchi #define PG_FLAGS_VLAN_TAGGING (1<<1) 525eef4f27bSRobert Mustacchi 526eef4f27bSRobert Mustacchi u8_t pg_l2hdr_nbytes; 527eef4f27bSRobert Mustacchi u8_t pg_sa[6]; 528eef4f27bSRobert Mustacchi u16_t pg_etype; 529eef4f27bSRobert Mustacchi u16_t pg_ipid_start; 530eef4f27bSRobert Mustacchi u16_t pg_vlan_tag; 531eef4f27bSRobert Mustacchi u16_t unused_2; 532eef4f27bSRobert Mustacchi u16_t pg_ipid_count; 533eef4f27bSRobert Mustacchi } pg_context_l_t; 534eef4f27bSRobert Mustacchi 535eef4f27bSRobert Mustacchi 536eef4f27bSRobert Mustacchi /* 537eef4f27bSRobert Mustacchi * pg_context select 538eef4f27bSRobert Mustacchi */ 539eef4f27bSRobert Mustacchi #if defined(LITTLE_ENDIAN) 540eef4f27bSRobert Mustacchi typedef pg_context_l_t pg_context_t; 541eef4f27bSRobert Mustacchi #elif defined(BIG_ENDIAN) 542eef4f27bSRobert Mustacchi typedef pg_context_b_t pg_context_t; 543eef4f27bSRobert Mustacchi #endif 544eef4f27bSRobert Mustacchi 545eef4f27bSRobert Mustacchi 546eef4f27bSRobert Mustacchi 547eef4f27bSRobert Mustacchi 548eef4f27bSRobert Mustacchi #endif /* _l2_defs_h_ */ 549eef4f27bSRobert Mustacchi 550eef4f27bSRobert Mustacchi 551