1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 /*
27  * audioixp Audio Driver
28  *
29  * This driver supports audio hardware integrated in ATI IXP400 chipset.
30  *
31  * The IXP400 audio core is an AC'97 controller, which has independent
32  * channels for PCM in, PCM out. The AC'97 controller is a PCI bus master
33  * with scatter/gather support. Each channel has a DMA engine. Currently,
34  * we use only the PCM in and PCM out channels. Each DMA engine uses one
35  * buffer descriptor list.  Each entry contains a pointer to a data buffer,
36  * status, length of the buffer being pointed to and the pointer to the next
37  * entry. Length of the buffer is in number of bytes. Interrupt will be
38  * triggered each time a entry is processed by hardware.
39  *
40  * System power management is not yet supported by the driver.
41  *
42  * 	NOTE:
43  * 	This driver depends on the misc/ac97 and drv/audio modules being
44  *	loaded first.
45  */
46 #include <sys/types.h>
47 #include <sys/modctl.h>
48 #include <sys/kmem.h>
49 #include <sys/conf.h>
50 #include <sys/ddi.h>
51 #include <sys/sunddi.h>
52 #include <sys/pci.h>
53 #include <sys/note.h>
54 #include <sys/audio/audio_driver.h>
55 #include <sys/audio/ac97.h>
56 #include "audioixp.h"
57 
58 /*
59  * Module linkage routines for the kernel
60  */
61 static int audioixp_ddi_attach(dev_info_t *, ddi_attach_cmd_t);
62 static int audioixp_ddi_detach(dev_info_t *, ddi_detach_cmd_t);
63 static int audioixp_quiesce(dev_info_t *);
64 static int audioixp_resume(dev_info_t *);
65 static int audioixp_suspend(dev_info_t *);
66 
67 /*
68  * Entry point routine prototypes
69  */
70 static int audioixp_open(void *, int, unsigned *, caddr_t *);
71 static void audioixp_close(void *);
72 static int audioixp_start(void *);
73 static void audioixp_stop(void *);
74 static int audioixp_format(void *);
75 static int audioixp_channels(void *);
76 static int audioixp_rate(void *);
77 static uint64_t audioixp_count(void *);
78 static void audioixp_sync(void *, unsigned);
79 
80 static audio_engine_ops_t audioixp_engine_ops = {
81 	AUDIO_ENGINE_VERSION,
82 	audioixp_open,
83 	audioixp_close,
84 	audioixp_start,
85 	audioixp_stop,
86 	audioixp_count,
87 	audioixp_format,
88 	audioixp_channels,
89 	audioixp_rate,
90 	audioixp_sync,
91 	NULL,
92 	NULL,
93 	NULL
94 };
95 
96 /*
97  * We drive audioixp in stereo only, so we don't want to display controls
98  * that are used for multichannel codecs.  Note that this multichannel
99  * configuration limitation is a problem for audioixp devices.
100  */
101 const char *audioixp_remove_ac97[] = {
102 	AUDIO_CTRL_ID_CENTER,
103 	AUDIO_CTRL_ID_LFE,
104 	AUDIO_CTRL_ID_SURROUND,
105 	AUDIO_CTRL_ID_JACK1,
106 	AUDIO_CTRL_ID_JACK2,
107 };
108 
109 /*
110  * Local Routine Prototypes
111  */
112 static int audioixp_attach(dev_info_t *);
113 static int audioixp_detach(dev_info_t *);
114 static int audioixp_alloc_port(audioixp_state_t *, int);
115 static void audioixp_update_port(audioixp_port_t *);
116 
117 static int audioixp_codec_sync(audioixp_state_t *);
118 static void audioixp_wr97(void *, uint8_t, uint16_t);
119 static uint16_t audioixp_rd97(void *, uint8_t);
120 static int audioixp_reset_ac97(audioixp_state_t *);
121 static int audioixp_map_regs(audioixp_state_t *);
122 static void audioixp_unmap_regs(audioixp_state_t *);
123 static int audioixp_chip_init(audioixp_state_t *);
124 static void audioixp_destroy(audioixp_state_t *);
125 
126 /*
127  * Global variables, but used only by this file.
128  */
129 
130 /*
131  * DDI Structures
132  */
133 
134 /* Device operations structure */
135 static struct dev_ops audioixp_dev_ops = {
136 	DEVO_REV,		/* devo_rev */
137 	0,			/* devo_refcnt */
138 	NULL,			/* devo_getinfo */
139 	nulldev,		/* devo_identify - obsolete */
140 	nulldev,		/* devo_probe */
141 	audioixp_ddi_attach,	/* devo_attach */
142 	audioixp_ddi_detach,	/* devo_detach */
143 	nodev,			/* devo_reset */
144 	NULL,			/* devi_cb_ops */
145 	NULL,			/* devo_bus_ops */
146 	NULL,			/* devo_power */
147 	audioixp_quiesce,	/* devo_quiesce */
148 };
149 
150 /* Linkage structure for loadable drivers */
151 static struct modldrv audioixp_modldrv = {
152 	&mod_driverops,		/* drv_modops */
153 	IXP_MOD_NAME,		/* drv_linkinfo */
154 	&audioixp_dev_ops,	/* drv_dev_ops */
155 };
156 
157 /* Module linkage structure */
158 static struct modlinkage audioixp_modlinkage = {
159 	MODREV_1,			/* ml_rev */
160 	(void *)&audioixp_modldrv,	/* ml_linkage */
161 	NULL				/* NULL terminates the list */
162 };
163 
164 /*
165  * device access attributes for register mapping
166  */
167 static struct ddi_device_acc_attr dev_attr = {
168 	DDI_DEVICE_ATTR_V0,
169 	DDI_STRUCTURE_LE_ACC,
170 	DDI_STRICTORDER_ACC
171 };
172 static struct ddi_device_acc_attr buf_attr = {
173 	DDI_DEVICE_ATTR_V0,
174 	DDI_NEVERSWAP_ACC,
175 	DDI_STRICTORDER_ACC
176 };
177 
178 /*
179  * DMA attributes of buffer descriptor list
180  */
181 static ddi_dma_attr_t	bdlist_dma_attr = {
182 	DMA_ATTR_V0,	/* version */
183 	0,		/* addr_lo */
184 	0xffffffff,	/* addr_hi */
185 	0x0000ffff,	/* count_max */
186 	8,		/* align, BDL must be aligned on a 8-byte boundary */
187 	0x3c,		/* burstsize */
188 	8,		/* minxfer, set to the size of a BDlist entry */
189 	0x0000ffff,	/* maxxfer */
190 	0x00000fff,	/* seg, set to the RAM pagesize of intel platform */
191 	1,		/* sgllen, there's no scatter-gather list */
192 	8,		/* granular, set to the value of minxfer */
193 	0		/* flags, use virtual address */
194 };
195 
196 /*
197  * DMA attributes of buffers to be used to receive/send audio data
198  */
199 static ddi_dma_attr_t	sample_buf_dma_attr = {
200 	DMA_ATTR_V0,
201 	0,		/* addr_lo */
202 	0xffffffff,	/* addr_hi */
203 	0x0001fffe,	/* count_max */
204 	4,		/* align, data buffer is aligned on a 2-byte boundary */
205 	0x3c,		/* burstsize */
206 	4,		/* minxfer, set to the size of a sample data */
207 	0x0001ffff,	/* maxxfer */
208 	0x0001ffff,	/* seg */
209 	1,		/* sgllen, no scatter-gather */
210 	4,		/* granular, set to the value of minxfer */
211 	0,		/* flags, use virtual address */
212 };
213 
214 /*
215  * _init()
216  *
217  * Description:
218  *	Driver initialization, called when driver is first loaded.
219  *	This is how access is initially given to all the static structures.
220  *
221  * Arguments:
222  *	None
223  *
224  * Returns:
225  *	ddi_soft_state_init() status, see ddi_soft_state_init(9f), or
226  *	mod_install() status, see mod_install(9f)
227  */
228 int
_init(void)229 _init(void)
230 {
231 	int	error;
232 
233 	audio_init_ops(&audioixp_dev_ops, IXP_NAME);
234 
235 	if ((error = mod_install(&audioixp_modlinkage)) != 0) {
236 		audio_fini_ops(&audioixp_dev_ops);
237 	}
238 
239 	return (error);
240 }
241 
242 /*
243  * _fini()
244  *
245  * Description:
246  *	Module de-initialization, called when the driver is to be unloaded.
247  *
248  * Arguments:
249  *	None
250  *
251  * Returns:
252  *	mod_remove() status, see mod_remove(9f)
253  */
254 int
_fini(void)255 _fini(void)
256 {
257 	int		error;
258 
259 	if ((error = mod_remove(&audioixp_modlinkage)) != 0) {
260 		return (error);
261 	}
262 
263 	audio_fini_ops(&audioixp_dev_ops);
264 
265 	return (0);
266 }
267 
268 /*
269  * _info()
270  *
271  * Description:
272  *	Module information, returns information about the driver.
273  *
274  * Arguments:
275  *	modinfo		*modinfop	Pointer to the opaque modinfo structure
276  *
277  * Returns:
278  *	mod_info() status, see mod_info(9f)
279  */
280 int
_info(struct modinfo * modinfop)281 _info(struct modinfo *modinfop)
282 {
283 	return (mod_info(&audioixp_modlinkage, modinfop));
284 }
285 
286 
287 /* ******************* Driver Entry Points ********************************* */
288 
289 /*
290  * audioixp_ddi_attach()
291  *
292  * Description:
293  *	Attach an instance of the audioixp driver.
294  *
295  * Arguments:
296  *	dev_info_t	*dip	Pointer to the device's dev_info struct
297  *	ddi_attach_cmd_t cmd	Attach command
298  *
299  * Returns:
300  *	DDI_SUCCESS		The driver was initialized properly
301  *	DDI_FAILURE		The driver couldn't be initialized properly
302  */
303 static int
audioixp_ddi_attach(dev_info_t * dip,ddi_attach_cmd_t cmd)304 audioixp_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
305 {
306 	switch (cmd) {
307 	case DDI_ATTACH:
308 		return (audioixp_attach(dip));
309 
310 	/*
311 	 * now, no suspend/resume supported. we'll do it in the future.
312 	 */
313 	case DDI_RESUME:
314 		return (audioixp_resume(dip));
315 	default:
316 		return (DDI_FAILURE);
317 	}
318 }
319 
320 /*
321  * audioixp_ddi_detach()
322  *
323  * Description:
324  *	Detach an instance of the audioixp driver.
325  *
326  * Arguments:
327  *	dev_info_t		*dip	Pointer to the device's dev_info struct
328  *	ddi_detach_cmd_t	cmd	Detach command
329  *
330  * Returns:
331  *	DDI_SUCCESS	The driver was detached
332  *	DDI_FAILURE	The driver couldn't be detached
333  */
334 static int
audioixp_ddi_detach(dev_info_t * dip,ddi_detach_cmd_t cmd)335 audioixp_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
336 {
337 	switch (cmd) {
338 	case DDI_DETACH:
339 		return (audioixp_detach(dip));
340 
341 	/*
342 	 * now, no suspend/resume supported. we'll do it in the future.
343 	 */
344 	case DDI_SUSPEND:
345 		return (audioixp_suspend(dip));
346 
347 	default:
348 		return (DDI_FAILURE);
349 	}
350 }
351 
352 /*
353  * quiesce(9E) entry point.
354  *
355  * This function is called when the system is single-threaded at high
356  * PIL with preemption disabled. Therefore, this function must not be blocked.
357  *
358  * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
359  * DDI_FAILURE indicates an error condition and should almost never happen.
360  */
361 static int
audioixp_quiesce(dev_info_t * dip)362 audioixp_quiesce(dev_info_t *dip)
363 {
364 	audioixp_state_t		*statep;
365 
366 	statep = ddi_get_driver_private(dip);
367 	ASSERT(statep != NULL);
368 
369 	/* stop DMA engines */
370 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT);
371 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
372 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN);
373 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
374 
375 	return (DDI_SUCCESS);
376 }
377 
378 static int
audioixp_suspend(dev_info_t * dip)379 audioixp_suspend(dev_info_t *dip)
380 {
381 	audioixp_state_t		*statep;
382 
383 	statep = ddi_get_driver_private(dip);
384 	ASSERT(statep != NULL);
385 
386 	audio_dev_suspend(statep->adev);
387 
388 	return (DDI_SUCCESS);
389 }
390 
391 static int
audioixp_resume(dev_info_t * dip)392 audioixp_resume(dev_info_t *dip)
393 {
394 	audioixp_state_t		*statep;
395 
396 	statep = ddi_get_driver_private(dip);
397 	ASSERT(statep != NULL);
398 
399 	if (audioixp_chip_init(statep) != DDI_SUCCESS) {
400 		audio_dev_warn(statep->adev, "DDI_RESUME failed to init chip");
401 		return (DDI_SUCCESS);
402 	}
403 
404 	ac97_reset(statep->ac97);
405 	audio_dev_resume(statep->adev);
406 
407 	return (DDI_SUCCESS);
408 }
409 
410 /*
411  * audioixp_open()
412  *
413  * Description:
414  *	Opens a DMA engine for use.
415  *
416  * Arguments:
417  *	void		*arg		The DMA engine to set up
418  *	int		flag		Open flags
419  *	unsigned	*nframesp	Receives number of frames
420  *	caddr_t		*bufp		Receives kernel data buffer
421  *
422  * Returns:
423  *	0	on success
424  *	errno	on failure
425  */
426 static int
audioixp_open(void * arg,int flag,unsigned * nframesp,caddr_t * bufp)427 audioixp_open(void *arg, int flag, unsigned *nframesp, caddr_t *bufp)
428 {
429 	audioixp_port_t	*port = arg;
430 
431 	_NOTE(ARGUNUSED(flag));
432 
433 	port->started = B_FALSE;
434 	port->count = 0;
435 	port->offset = 0;
436 	*nframesp = port->nframes;
437 	*bufp = port->samp_kaddr;
438 
439 	return (0);
440 }
441 
442 /*
443  * audioixp_close()
444  *
445  * Description:
446  *	Closes an audio DMA engine that was previously opened.  Since
447  *	nobody is using it, we take this opportunity to possibly power
448  *	down the entire device.
449  *
450  * Arguments:
451  *	void	*arg		The DMA engine to shut down
452  */
453 static void
audioixp_close(void * arg)454 audioixp_close(void *arg)
455 {
456 	_NOTE(ARGUNUSED(arg));
457 }
458 
459 /*
460  * audioixp_stop()
461  *
462  * Description:
463  *	This is called by the framework to stop a port that is
464  *	transferring data.
465  *
466  * Arguments:
467  *	void	*arg		The DMA engine to stop
468  */
469 static void
audioixp_stop(void * arg)470 audioixp_stop(void *arg)
471 {
472 	audioixp_port_t		*port = arg;
473 	audioixp_state_t	*statep = port->statep;
474 
475 	mutex_enter(&statep->inst_lock);
476 	if (port->num == IXP_REC) {
477 		CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN);
478 		CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
479 	} else {
480 		CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT);
481 		CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
482 	}
483 	mutex_exit(&statep->inst_lock);
484 }
485 
486 /*
487  * audioixp_start()
488  *
489  * Description:
490  *	This is called by the framework to start a port transferring data.
491  *
492  * Arguments:
493  *	void	*arg		The DMA engine to start
494  *
495  * Returns:
496  *	0 	on success (never fails, errno if it did)
497  */
498 static int
audioixp_start(void * arg)499 audioixp_start(void *arg)
500 {
501 	audioixp_port_t		*port = arg;
502 	audioixp_state_t	*statep = port->statep;
503 
504 	mutex_enter(&statep->inst_lock);
505 
506 	port->offset = 0;
507 
508 	if (port->num == IXP_REC) {
509 		PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_IN);
510 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_INTER_IN);
511 
512 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
513 		PUT32(IXP_AUDIO_IN_DMA_LINK_P,
514 		    port->bdl_paddr | IXP_AUDIO_IN_DMA_LINK_P_EN);
515 
516 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN);
517 	} else {
518 		uint32_t slot = GET32(IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD);
519 		PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_OUT);
520 		/* clear all slots */
521 		slot &= ~ (IXP_AUDIO_OUT_DMA_SLOT_3 |
522 		    IXP_AUDIO_OUT_DMA_SLOT_4 |
523 		    IXP_AUDIO_OUT_DMA_SLOT_5 |
524 		    IXP_AUDIO_OUT_DMA_SLOT_6 |
525 		    IXP_AUDIO_OUT_DMA_SLOT_7 |
526 		    IXP_AUDIO_OUT_DMA_SLOT_8 |
527 		    IXP_AUDIO_OUT_DMA_SLOT_9 |
528 		    IXP_AUDIO_OUT_DMA_SLOT_10 |
529 		    IXP_AUDIO_OUT_DMA_SLOT_11 |
530 		    IXP_AUDIO_OUT_DMA_SLOT_12);
531 		/* enable AC'97 output slots (depending on output channels) */
532 		slot |= IXP_AUDIO_OUT_DMA_SLOT_3 |
533 		    IXP_AUDIO_OUT_DMA_SLOT_4;
534 		if (port->nchan >= 4) {
535 			slot |= IXP_AUDIO_OUT_DMA_SLOT_6 |
536 			    IXP_AUDIO_OUT_DMA_SLOT_9;
537 		}
538 		if (port->nchan >= 6) {
539 			slot |= IXP_AUDIO_OUT_DMA_SLOT_7 |
540 			    IXP_AUDIO_OUT_DMA_SLOT_8;
541 		}
542 
543 		PUT32(IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD, slot);
544 
545 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_INTER_OUT);
546 
547 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
548 		PUT32(IXP_AUDIO_OUT_DMA_LINK_P,
549 		    port->bdl_paddr | IXP_AUDIO_OUT_DMA_LINK_P_EN);
550 
551 		SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT);
552 	}
553 	mutex_exit(&statep->inst_lock);
554 	return (0);
555 }
556 
557 /*
558  * audioixp_format()
559  *
560  * Description:
561  *	This is called by the framework to query the format for the device.
562  *
563  * Arguments:
564  *	void	*arg		The DMA engine to query
565  *
566  * Returns:
567  *	AUDIO_FORMAT_S16_LE
568  */
569 static int
audioixp_format(void * arg)570 audioixp_format(void *arg)
571 {
572 	_NOTE(ARGUNUSED(arg));
573 
574 	return (AUDIO_FORMAT_S16_LE);
575 }
576 
577 /*
578  * audioixp_channels()
579  *
580  * Description:
581  *	This is called by the framework to query the channels for the device.
582  *
583  * Arguments:
584  *	void	*arg		The DMA engine to query
585  *
586  * Returns:
587  *	Number of channels for the device.
588  */
589 static int
audioixp_channels(void * arg)590 audioixp_channels(void *arg)
591 {
592 	audioixp_port_t *port = arg;
593 
594 	return (port->nchan);
595 }
596 
597 /*
598  * audioixp_rate()
599  *
600  * Description:
601  *	This is called by the framework to query the rate of the device.
602  *
603  * Arguments:
604  *	void	*arg		The DMA engine to query
605  *
606  * Returns:
607  *	48000
608  */
609 static int
audioixp_rate(void * arg)610 audioixp_rate(void *arg)
611 {
612 	_NOTE(ARGUNUSED(arg));
613 
614 	return (48000);
615 }
616 
617 /*
618  * audioixp_count()
619  *
620  * Description:
621  *	This is called by the framework to get the engine's frame counter
622  *
623  * Arguments:
624  *	void	*arg		The DMA engine to query
625  *
626  * Returns:
627  *	frame count for current engine
628  */
629 static uint64_t
audioixp_count(void * arg)630 audioixp_count(void *arg)
631 {
632 	audioixp_port_t		*port = arg;
633 	audioixp_state_t	*statep = port->statep;
634 	uint64_t		val;
635 
636 	mutex_enter(&statep->inst_lock);
637 	audioixp_update_port(port);
638 	val = port->count;
639 	mutex_exit(&statep->inst_lock);
640 
641 	return (val);
642 }
643 
644 /*
645  * audioixp_sync()
646  *
647  * Description:
648  *	This is called by the framework to synchronize DMA caches.
649  *
650  * Arguments:
651  *	void	*arg		The DMA engine to sync
652  */
653 static void
audioixp_sync(void * arg,unsigned nframes)654 audioixp_sync(void *arg, unsigned nframes)
655 {
656 	audioixp_port_t *port = arg;
657 	_NOTE(ARGUNUSED(nframes));
658 
659 	(void) ddi_dma_sync(port->samp_dmah, 0, 0, port->sync_dir);
660 }
661 
662 /* *********************** Local Routines *************************** */
663 
664 /*
665  * audioixp_alloc_port()
666  *
667  * Description:
668  *	This routine allocates the DMA handles and the memory for the
669  *	DMA engines to use.  It also configures the BDL lists properly
670  *	for use.
671  *
672  * Arguments:
673  *	dev_info_t	*dip	Pointer to the device's devinfo
674  *
675  * Returns:
676  *	DDI_SUCCESS		Registers successfully mapped
677  *	DDI_FAILURE		Registers not successfully mapped
678  */
679 static int
audioixp_alloc_port(audioixp_state_t * statep,int num)680 audioixp_alloc_port(audioixp_state_t *statep, int num)
681 {
682 	ddi_dma_cookie_t	cookie;
683 	uint_t			count;
684 	int			dir;
685 	unsigned		caps;
686 	audio_dev_t		*adev;
687 	audioixp_port_t		*port;
688 	uint32_t		paddr;
689 	int			rc;
690 	dev_info_t		*dip;
691 	audioixp_bd_entry_t	*bdentry;
692 
693 	adev = statep->adev;
694 	dip = statep->dip;
695 
696 	port = kmem_zalloc(sizeof (*port), KM_SLEEP);
697 	port->statep = statep;
698 	port->started = B_FALSE;
699 	port->num = num;
700 
701 	switch (num) {
702 	case IXP_REC:
703 		statep->rec_port = port;
704 		dir = DDI_DMA_READ;
705 		caps = ENGINE_INPUT_CAP;
706 		port->sync_dir = DDI_DMA_SYNC_FORKERNEL;
707 		port->nchan = 2;
708 		break;
709 	case IXP_PLAY:
710 		statep->play_port = port;
711 		dir = DDI_DMA_WRITE;
712 		caps = ENGINE_OUTPUT_CAP;
713 		port->sync_dir = DDI_DMA_SYNC_FORDEV;
714 		/*
715 		 * We allow for end users to configure more channels
716 		 * than just two, but we default to just two.  The
717 		 * default stereo configuration works well.  On the
718 		 * configurations we have tested, we've found that
719 		 * more than two channels (or rather 6 channels) can
720 		 * cause inexplicable noise.  The noise is more
721 		 * noticeable when the system is running under load.
722 		 * (Holding the space bar in "top" while playing an
723 		 * MP3 is an easy way to recreate it.)  End users who
724 		 * want to experiment, or have configurations that
725 		 * don't suffer from this, may increase the channels
726 		 * by setting this max-channels property.  We leave it
727 		 * undocumented for now.
728 		 */
729 		port->nchan = ddi_prop_get_int(DDI_DEV_T_ANY, dip, 0,
730 		    "max-channels", 2);
731 		port->nchan = min(ac97_num_channels(statep->ac97),
732 		    port->nchan);
733 		port->nchan &= ~1;	/* make sure its an even number */
734 		port->nchan = max(port->nchan, 2);
735 		break;
736 	default:
737 		audio_dev_warn(adev, "bad port number (%d)!", num);
738 		return (DDI_FAILURE);
739 	}
740 
741 	port->nframes = 4096;
742 	port->fragfr = port->nframes / IXP_BD_NUMS;
743 	port->fragsz = port->fragfr * port->nchan * 2;
744 	port->samp_size = port->nframes * port->nchan * 2;
745 
746 	/* allocate dma handle */
747 	rc = ddi_dma_alloc_handle(dip, &sample_buf_dma_attr, DDI_DMA_SLEEP,
748 	    NULL, &port->samp_dmah);
749 	if (rc != DDI_SUCCESS) {
750 		audio_dev_warn(adev, "ddi_dma_alloc_handle failed: %d", rc);
751 		return (DDI_FAILURE);
752 	}
753 	/* allocate DMA buffer */
754 	rc = ddi_dma_mem_alloc(port->samp_dmah, port->samp_size, &buf_attr,
755 	    DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &port->samp_kaddr,
756 	    &port->samp_size, &port->samp_acch);
757 	if (rc == DDI_FAILURE) {
758 		audio_dev_warn(adev, "dma_mem_alloc failed");
759 		return (DDI_FAILURE);
760 	}
761 
762 	/* bind DMA buffer */
763 	rc = ddi_dma_addr_bind_handle(port->samp_dmah, NULL,
764 	    port->samp_kaddr, port->samp_size, dir|DDI_DMA_CONSISTENT,
765 	    DDI_DMA_SLEEP, NULL, &cookie, &count);
766 	if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
767 		audio_dev_warn(adev,
768 		    "ddi_dma_addr_bind_handle failed: %d", rc);
769 		return (DDI_FAILURE);
770 	}
771 	port->samp_paddr = cookie.dmac_address;
772 
773 	/*
774 	 * now, from here we allocate DMA memory for buffer descriptor list.
775 	 * we allocate adjacent DMA memory for all DMA engines.
776 	 */
777 	rc = ddi_dma_alloc_handle(dip, &bdlist_dma_attr, DDI_DMA_SLEEP,
778 	    NULL, &port->bdl_dmah);
779 	if (rc != DDI_SUCCESS) {
780 		audio_dev_warn(adev, "ddi_dma_alloc_handle(bdlist) failed");
781 		return (DDI_FAILURE);
782 	}
783 
784 	/*
785 	 * we allocate all buffer descriptors lists in continuous dma memory.
786 	 */
787 	port->bdl_size = sizeof (audioixp_bd_entry_t) * IXP_BD_NUMS;
788 	rc = ddi_dma_mem_alloc(port->bdl_dmah, port->bdl_size,
789 	    &dev_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL,
790 	    &port->bdl_kaddr, &port->bdl_size, &port->bdl_acch);
791 	if (rc != DDI_SUCCESS) {
792 		audio_dev_warn(adev, "ddi_dma_mem_alloc(bdlist) failed");
793 		return (DDI_FAILURE);
794 	}
795 
796 	rc = ddi_dma_addr_bind_handle(port->bdl_dmah, NULL, port->bdl_kaddr,
797 	    port->bdl_size, DDI_DMA_WRITE|DDI_DMA_CONSISTENT, DDI_DMA_SLEEP,
798 	    NULL, &cookie, &count);
799 	if ((rc != DDI_DMA_MAPPED) || (count != 1)) {
800 		audio_dev_warn(adev, "addr_bind_handle failed");
801 		return (DDI_FAILURE);
802 	}
803 	port->bdl_paddr = cookie.dmac_address;
804 
805 	/*
806 	 * Wire up the BD list.
807 	 */
808 	paddr = port->samp_paddr;
809 	bdentry = (void *)port->bdl_kaddr;
810 
811 	for (int i = 0; i < IXP_BD_NUMS; i++) {
812 
813 		/* set base address of buffer */
814 		ddi_put32(port->bdl_acch, &bdentry->buf_base, paddr);
815 		ddi_put16(port->bdl_acch, &bdentry->status, 0);
816 		ddi_put16(port->bdl_acch, &bdentry->buf_len, port->fragsz / 4);
817 		ddi_put32(port->bdl_acch, &bdentry->next, port->bdl_paddr +
818 		    (((i + 1) % IXP_BD_NUMS) * sizeof (audioixp_bd_entry_t)));
819 		paddr += port->fragsz;
820 		bdentry++;
821 	}
822 	(void) ddi_dma_sync(port->bdl_dmah, 0, 0, DDI_DMA_SYNC_FORDEV);
823 
824 	port->engine = audio_engine_alloc(&audioixp_engine_ops, caps);
825 	if (port->engine == NULL) {
826 		audio_dev_warn(adev, "audio_engine_alloc failed");
827 		return (DDI_FAILURE);
828 	}
829 
830 	audio_engine_set_private(port->engine, port);
831 	audio_dev_add_engine(adev, port->engine);
832 
833 	return (DDI_SUCCESS);
834 }
835 
836 /*
837  * audioixp_free_port()
838  *
839  * Description:
840  *	This routine unbinds the DMA cookies, frees the DMA buffers,
841  *	deallocates the DMA handles.
842  *
843  * Arguments:
844  *	audioixp_port_t	*port	The port structure for a DMA engine.
845  */
846 static void
audioixp_free_port(audioixp_port_t * port)847 audioixp_free_port(audioixp_port_t *port)
848 {
849 	if (port == NULL)
850 		return;
851 
852 	if (port->engine) {
853 		audio_dev_remove_engine(port->statep->adev, port->engine);
854 		audio_engine_free(port->engine);
855 	}
856 	if (port->bdl_paddr) {
857 		(void) ddi_dma_unbind_handle(port->bdl_dmah);
858 	}
859 	if (port->bdl_acch) {
860 		ddi_dma_mem_free(&port->bdl_acch);
861 	}
862 	if (port->bdl_dmah) {
863 		ddi_dma_free_handle(&port->bdl_dmah);
864 	}
865 	if (port->samp_paddr) {
866 		(void) ddi_dma_unbind_handle(port->samp_dmah);
867 	}
868 	if (port->samp_acch) {
869 		ddi_dma_mem_free(&port->samp_acch);
870 	}
871 	if (port->samp_dmah) {
872 		ddi_dma_free_handle(&port->samp_dmah);
873 	}
874 	kmem_free(port, sizeof (*port));
875 }
876 
877 /*
878  * audioixp_update_port()
879  *
880  * Description:
881  *	This routine updates the ports frame counter from hardware, and
882  *	gracefully handles wraps.
883  *
884  * Arguments:
885  *	audioixp_port_t	*port		The port to update.
886  */
887 static void
audioixp_update_port(audioixp_port_t * port)888 audioixp_update_port(audioixp_port_t *port)
889 {
890 	audioixp_state_t	*statep = port->statep;
891 	unsigned		regoff;
892 	unsigned		n;
893 	int			loop;
894 	uint32_t		offset;
895 	uint32_t		paddr;
896 
897 	if (port->num == IXP_REC) {
898 		regoff = IXP_AUDIO_IN_DMA_DT_CUR;
899 	} else {
900 		regoff = IXP_AUDIO_OUT_DMA_DT_CUR;
901 	}
902 
903 	/*
904 	 * Apparently it may take several tries to get an update on the
905 	 * position.  Is this a hardware bug?
906 	 */
907 	for (loop = 100; loop; loop--) {
908 		paddr = GET32(regoff);
909 
910 		/* make sure address is reasonable */
911 		if ((paddr < port->samp_paddr) ||
912 		    (paddr >= (port->samp_paddr + port->samp_size))) {
913 			continue;
914 		}
915 
916 		offset = paddr - port->samp_paddr;
917 
918 		if (offset >= port->offset) {
919 			n = offset - port->offset;
920 		} else {
921 			n = offset + (port->samp_size - port->offset);
922 		}
923 		port->offset = offset;
924 		port->count += (n / (port->nchan * sizeof (uint16_t)));
925 		return;
926 	}
927 
928 	audio_dev_warn(statep->adev, "Unable to update count (h/w bug?)");
929 }
930 
931 
932 /*
933  * audioixp_map_regs()
934  *
935  * Description:
936  *	The registers are mapped in.
937  *
938  * Arguments:
939  *	audioixp_state_t	*state		  The device's state structure
940  *
941  * Returns:
942  *	DDI_SUCCESS		Registers successfully mapped
943  *	DDI_FAILURE		Registers not successfully mapped
944  */
945 static int
audioixp_map_regs(audioixp_state_t * statep)946 audioixp_map_regs(audioixp_state_t *statep)
947 {
948 	dev_info_t		*dip = statep->dip;
949 
950 	/* map PCI config space */
951 	if (pci_config_setup(statep->dip, &statep->pcih) == DDI_FAILURE) {
952 		audio_dev_warn(statep->adev, "unable to map PCI config space");
953 		return (DDI_FAILURE);
954 	}
955 
956 	/* map audio mixer register */
957 	if ((ddi_regs_map_setup(dip, IXP_IO_AM_REGS, &statep->regsp, 0, 0,
958 	    &dev_attr, &statep->regsh)) != DDI_SUCCESS) {
959 		audio_dev_warn(statep->adev, "unable to map audio registers");
960 		return (DDI_FAILURE);
961 	}
962 	return (DDI_SUCCESS);
963 }
964 
965 /*
966  * audioixp_unmap_regs()
967  *
968  * Description:
969  *	This routine unmaps control registers.
970  *
971  * Arguments:
972  *	audioixp_state_t	*state		The device's state structure
973  */
974 static void
audioixp_unmap_regs(audioixp_state_t * statep)975 audioixp_unmap_regs(audioixp_state_t *statep)
976 {
977 	if (statep->regsh) {
978 		ddi_regs_map_free(&statep->regsh);
979 	}
980 
981 	if (statep->pcih) {
982 		pci_config_teardown(&statep->pcih);
983 	}
984 }
985 
986 /*
987  * audioixp_codec_ready()
988  *
989  * Description:
990  *	This routine checks the state of codecs.  It checks the flag to confirm
991  *	that primary codec is ready.
992  *
993  * Arguments:
994  *	audioixp_state_t	*state		The device's state structure
995  *
996  * Returns:
997  *	DDI_SUCCESS	 codec is ready
998  *	DDI_FAILURE	 codec is not ready
999  */
1000 static int
audioixp_codec_ready(audioixp_state_t * statep)1001 audioixp_codec_ready(audioixp_state_t *statep)
1002 {
1003 	uint32_t	sr;
1004 
1005 	PUT32(IXP_AUDIO_INT, 0xffffffff);
1006 	drv_usecwait(1000);
1007 
1008 	sr = GET32(IXP_AUDIO_INT);
1009 	if (sr & IXP_AUDIO_INT_CODEC0_NOT_READY) {
1010 		PUT32(IXP_AUDIO_INT, IXP_AUDIO_INT_CODEC0_NOT_READY);
1011 		audio_dev_warn(statep->adev, "primary codec not ready");
1012 
1013 		return (DDI_FAILURE);
1014 	}
1015 	return (DDI_SUCCESS);
1016 }
1017 
1018 /*
1019  * audioixp_codec_sync()
1020  *
1021  * Description:
1022  *	Serialize access to the AC97 audio mixer registers.
1023  *
1024  * Arguments:
1025  *	audioixp_state_t	*state		The device's state structure
1026  *
1027  * Returns:
1028  *	DDI_SUCCESS		Ready for an I/O access to the codec
1029  *	DDI_FAILURE		An I/O access is currently in progress, can't
1030  *				perform another I/O access.
1031  */
1032 static int
audioixp_codec_sync(audioixp_state_t * statep)1033 audioixp_codec_sync(audioixp_state_t *statep)
1034 {
1035 	int 		i;
1036 	uint32_t	cmd;
1037 
1038 	for (i = 0; i < 300; i++) {
1039 		cmd = GET32(IXP_AUDIO_OUT_PHY_ADDR_DATA);
1040 		if (!(cmd & IXP_AUDIO_OUT_PHY_EN)) {
1041 			return (DDI_SUCCESS);
1042 		}
1043 		drv_usecwait(10);
1044 	}
1045 
1046 	audio_dev_warn(statep->adev, "unable to synchronize codec");
1047 	return (DDI_FAILURE);
1048 }
1049 
1050 /*
1051  * audioixp_rd97()
1052  *
1053  * Description:
1054  *	Get the specific AC97 Codec register.
1055  *
1056  * Arguments:
1057  *	void		*arg		The device's state structure
1058  *	uint8_t		reg		AC97 register number
1059  *
1060  * Returns:
1061  *	Register value.
1062  */
1063 static uint16_t
audioixp_rd97(void * arg,uint8_t reg)1064 audioixp_rd97(void *arg, uint8_t reg)
1065 {
1066 	audioixp_state_t	*statep = arg;
1067 	uint32_t		value;
1068 	uint32_t		result;
1069 
1070 	if (audioixp_codec_sync(statep) != DDI_SUCCESS)
1071 		return (0xffff);
1072 
1073 	value = IXP_AUDIO_OUT_PHY_PRIMARY_CODEC |
1074 	    IXP_AUDIO_OUT_PHY_READ |
1075 	    IXP_AUDIO_OUT_PHY_EN |
1076 	    ((unsigned)reg << IXP_AUDIO_OUT_PHY_ADDR_SHIFT);
1077 	PUT32(IXP_AUDIO_OUT_PHY_ADDR_DATA, value);
1078 
1079 	if (audioixp_codec_sync(statep) != DDI_SUCCESS)
1080 		return (0xffff);
1081 
1082 	for (int i = 0; i < 300; i++) {
1083 		result = GET32(IXP_AUDIO_IN_PHY_ADDR_DATA);
1084 		if (result & IXP_AUDIO_IN_PHY_READY)	{
1085 			return (result >> IXP_AUDIO_IN_PHY_DATA_SHIFT);
1086 		}
1087 		drv_usecwait(10);
1088 	}
1089 
1090 done:
1091 	audio_dev_warn(statep->adev, "time out reading codec reg %d", reg);
1092 	return (0xffff);
1093 }
1094 
1095 /*
1096  * audioixp_wr97()
1097  *
1098  * Description:
1099  *	Set the specific AC97 Codec register.
1100  *
1101  * Arguments:
1102  *	void		*arg		The device's state structure
1103  *	uint8_t		reg		AC97 register number
1104  *	uint16_t	data		The data want to be set
1105  */
1106 static void
audioixp_wr97(void * arg,uint8_t reg,uint16_t data)1107 audioixp_wr97(void *arg, uint8_t reg, uint16_t data)
1108 {
1109 	audioixp_state_t	*statep = arg;
1110 	uint32_t		value;
1111 
1112 	if (audioixp_codec_sync(statep) != DDI_SUCCESS) {
1113 		return;
1114 	}
1115 
1116 	value = IXP_AUDIO_OUT_PHY_PRIMARY_CODEC |
1117 	    IXP_AUDIO_OUT_PHY_WRITE |
1118 	    IXP_AUDIO_OUT_PHY_EN |
1119 	    ((unsigned)reg << IXP_AUDIO_OUT_PHY_ADDR_SHIFT) |
1120 	    ((unsigned)data << IXP_AUDIO_OUT_PHY_DATA_SHIFT);
1121 	PUT32(IXP_AUDIO_OUT_PHY_ADDR_DATA, value);
1122 
1123 	(void) audioixp_rd97(statep, reg);
1124 }
1125 
1126 /*
1127  * audioixp_reset_ac97()
1128  *
1129  * Description:
1130  *	Reset AC97 Codec register.
1131  *
1132  * Arguments:
1133  *	audioixp_state_t	*state		The device's state structure
1134  *
1135  * Returns:
1136  *	DDI_SUCCESS		Reset the codec successfully
1137  *	DDI_FAILURE		Failed to reset the codec
1138  */
1139 static int
audioixp_reset_ac97(audioixp_state_t * statep)1140 audioixp_reset_ac97(audioixp_state_t *statep)
1141 {
1142 	uint32_t	cmd;
1143 	int i;
1144 
1145 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_POWER_DOWN);
1146 	drv_usecwait(10);
1147 
1148 	/* register reset */
1149 	SET32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_AC_SOFT_RESET);
1150 	/* force a read to flush caches */
1151 	(void) GET32(IXP_AUDIO_CMD);
1152 
1153 	drv_usecwait(10);
1154 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_AC_SOFT_RESET);
1155 
1156 	/* cold reset */
1157 	for (i = 0; i < 300; i++) {
1158 		cmd = GET32(IXP_AUDIO_CMD);
1159 		if (cmd & IXP_AUDIO_CMD_AC_ACTIVE) {
1160 			cmd |= IXP_AUDIO_CMD_AC_RESET | IXP_AUDIO_CMD_AC_SYNC;
1161 			PUT32(IXP_AUDIO_CMD, cmd);
1162 			return (DDI_SUCCESS);
1163 		}
1164 		cmd &= ~IXP_AUDIO_CMD_AC_RESET;
1165 		cmd |= IXP_AUDIO_CMD_AC_SYNC;
1166 		PUT32(IXP_AUDIO_CMD, cmd);
1167 		(void) GET32(IXP_AUDIO_CMD);
1168 		drv_usecwait(10);
1169 		cmd |= IXP_AUDIO_CMD_AC_RESET;
1170 		PUT32(IXP_AUDIO_CMD, cmd);
1171 		drv_usecwait(10);
1172 	}
1173 
1174 	audio_dev_warn(statep->adev, "AC'97 reset timed out");
1175 	return (DDI_FAILURE);
1176 }
1177 
1178 /*
1179  * audioixp_chip_init()
1180  *
1181  * Description:
1182  *	This routine initializes ATI IXP audio controller and the AC97
1183  *	codec.
1184  *
1185  * Arguments:
1186  *	audioixp_state_t	*state		The device's state structure
1187  *
1188  * Returns:
1189  *	DDI_SUCCESS	The hardware was initialized properly
1190  *	DDI_FAILURE	The hardware couldn't be initialized properly
1191  */
1192 static int
audioixp_chip_init(audioixp_state_t * statep)1193 audioixp_chip_init(audioixp_state_t *statep)
1194 {
1195 	/*
1196 	 * put the audio controller into quiet state, everything off
1197 	 */
1198 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
1199 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
1200 
1201 	/* AC97 reset */
1202 	if (audioixp_reset_ac97(statep) != DDI_SUCCESS) {
1203 		audio_dev_warn(statep->adev, "AC97 codec reset failed");
1204 		return (DDI_FAILURE);
1205 	}
1206 
1207 	if (audioixp_codec_ready(statep) != DDI_SUCCESS) {
1208 		audio_dev_warn(statep->adev, "AC97 codec not ready");
1209 		return (DDI_FAILURE);
1210 	}
1211 
1212 	return (DDI_SUCCESS);
1213 
1214 }	/* audioixp_chip_init() */
1215 
1216 /*
1217  * audioixp_attach()
1218  *
1219  * Description:
1220  *	Attach an instance of the audioixp driver. This routine does
1221  * 	the device dependent attach tasks.
1222  *
1223  * Arguments:
1224  *	dev_info_t	*dip	Pointer to the device's dev_info struct
1225  *	ddi_attach_cmd_t cmd	Attach command
1226  *
1227  * Returns:
1228  *	DDI_SUCCESS		The driver was initialized properly
1229  *	DDI_FAILURE		The driver couldn't be initialized properly
1230  */
1231 static int
audioixp_attach(dev_info_t * dip)1232 audioixp_attach(dev_info_t *dip)
1233 {
1234 	uint16_t		cmdeg;
1235 	audioixp_state_t	*statep;
1236 	audio_dev_t		*adev;
1237 	uint32_t		devid;
1238 	const char		*name;
1239 	const char		*rev;
1240 
1241 	/* allocate the soft state structure */
1242 	statep = kmem_zalloc(sizeof (*statep), KM_SLEEP);
1243 	statep->dip = dip;
1244 	ddi_set_driver_private(dip, statep);
1245 	mutex_init(&statep->inst_lock, NULL, MUTEX_DRIVER, NULL);
1246 
1247 	/* allocate framework audio device */
1248 	if ((adev = audio_dev_alloc(dip, 0)) == NULL) {
1249 		cmn_err(CE_WARN, "!%s%d: unable to allocate audio dev",
1250 		    ddi_driver_name(dip), ddi_get_instance(dip));
1251 		goto error;
1252 	}
1253 	statep->adev = adev;
1254 
1255 	/* map in the registers */
1256 	if (audioixp_map_regs(statep) != DDI_SUCCESS) {
1257 		audio_dev_warn(adev, "couldn't map registers");
1258 		goto error;
1259 	}
1260 
1261 	/* set device information -- this could be smarter */
1262 	devid = ((pci_config_get16(statep->pcih, PCI_CONF_VENID)) << 16) |
1263 	    pci_config_get16(statep->pcih, PCI_CONF_DEVID);
1264 
1265 	name = "ATI AC'97";
1266 	switch (devid) {
1267 	case IXP_PCI_ID_200:
1268 		rev = "IXP150";
1269 		break;
1270 	case IXP_PCI_ID_300:
1271 		rev = "SB300";
1272 		break;
1273 	case IXP_PCI_ID_400:
1274 		if (pci_config_get8(statep->pcih, PCI_CONF_REVID) & 0x80) {
1275 			rev = "SB450";
1276 		} else {
1277 			rev = "SB400";
1278 		}
1279 		break;
1280 	case IXP_PCI_ID_SB600:
1281 		rev = "SB600";
1282 		break;
1283 	default:
1284 		rev = "Unknown";
1285 		break;
1286 	}
1287 	audio_dev_set_description(adev, name);
1288 	audio_dev_set_version(adev, rev);
1289 
1290 	/* set PCI command register */
1291 	cmdeg = pci_config_get16(statep->pcih, PCI_CONF_COMM);
1292 	pci_config_put16(statep->pcih, PCI_CONF_COMM,
1293 	    cmdeg | PCI_COMM_IO | PCI_COMM_MAE);
1294 
1295 	statep->ac97 = ac97_alloc(dip, audioixp_rd97, audioixp_wr97, statep);
1296 	if (statep->ac97 == NULL) {
1297 		audio_dev_warn(adev, "failed to allocate ac97 handle");
1298 		goto error;
1299 	}
1300 
1301 	/* allocate port structures */
1302 	if ((audioixp_alloc_port(statep, IXP_PLAY) != DDI_SUCCESS) ||
1303 	    (audioixp_alloc_port(statep, IXP_REC) != DDI_SUCCESS)) {
1304 		goto error;
1305 	}
1306 
1307 	/*
1308 	 * If we have locked in a stereo configuration, then don't expose
1309 	 * multichannel-specific AC'97 codec controls.
1310 	 */
1311 	if (statep->play_port->nchan == 2) {
1312 		int i;
1313 		ac97_ctrl_t *ctrl;
1314 		const char *name;
1315 
1316 		for (i = 0; (name = audioixp_remove_ac97[i]) != NULL; i++) {
1317 			ctrl = ac97_control_find(statep->ac97, name);
1318 			if (ctrl != NULL) {
1319 				ac97_control_unregister(ctrl);
1320 			}
1321 		}
1322 	}
1323 
1324 	if (audioixp_chip_init(statep) != DDI_SUCCESS) {
1325 		audio_dev_warn(statep->adev, "failed to init chip");
1326 		goto error;
1327 	}
1328 
1329 	/* initialize the AC'97 part */
1330 	if (ac97_init(statep->ac97, adev) != DDI_SUCCESS) {
1331 		audio_dev_warn(adev, "ac'97 initialization failed");
1332 		goto error;
1333 	}
1334 
1335 	if (audio_dev_register(adev) != DDI_SUCCESS) {
1336 		audio_dev_warn(adev, "unable to register with framework");
1337 		goto error;
1338 	}
1339 
1340 	ddi_report_dev(dip);
1341 
1342 	return (DDI_SUCCESS);
1343 
1344 error:
1345 	audioixp_destroy(statep);
1346 	return (DDI_FAILURE);
1347 }
1348 
1349 /*
1350  * audioixp_detach()
1351  *
1352  * Description:
1353  *	Detach an instance of the audioixp driver.
1354  *
1355  * Arguments:
1356  *	dev_info_t	*dip	Pointer to the device's dev_info struct
1357  *
1358  * Returns:
1359  *	DDI_SUCCESS	The driver was detached
1360  *	DDI_FAILURE	The driver couldn't be detached
1361  */
1362 static int
audioixp_detach(dev_info_t * dip)1363 audioixp_detach(dev_info_t *dip)
1364 {
1365 	audioixp_state_t	*statep;
1366 
1367 	statep = ddi_get_driver_private(dip);
1368 
1369 	if (audio_dev_unregister(statep->adev) != DDI_SUCCESS) {
1370 		return (DDI_FAILURE);
1371 	}
1372 
1373 	audioixp_destroy(statep);
1374 	return (DDI_SUCCESS);
1375 }
1376 
1377 /*
1378  * audioixp_destroy()
1379  *
1380  * Description:
1381  *	This routine releases all resources held by the device instance,
1382  *	as part of either detach or a failure in attach.
1383  *
1384  * Arguments:
1385  *	audioixp_state_t	*state	The device soft state.
1386  */
1387 static void
audioixp_destroy(audioixp_state_t * statep)1388 audioixp_destroy(audioixp_state_t *statep)
1389 {
1390 	/*
1391 	 * put the audio controller into quiet state, everything off
1392 	 */
1393 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_OUT_DMA);
1394 	CLR32(IXP_AUDIO_CMD, IXP_AUDIO_CMD_EN_IN_DMA);
1395 
1396 	audioixp_free_port(statep->play_port);
1397 	audioixp_free_port(statep->rec_port);
1398 
1399 	audioixp_unmap_regs(statep);
1400 
1401 	if (statep->ac97) {
1402 		ac97_free(statep->ac97);
1403 	}
1404 
1405 	if (statep->adev) {
1406 		audio_dev_free(statep->adev);
1407 	}
1408 
1409 	mutex_destroy(&statep->inst_lock);
1410 	kmem_free(statep, sizeof (*statep));
1411 }
1412