1*eb00b1c8SRobert Mustacchi /* 2*eb00b1c8SRobert Mustacchi * This file and its contents are supplied under the terms of the 3*eb00b1c8SRobert Mustacchi * Common Development and Distribution License ("CDDL"), version 1.0. 4*eb00b1c8SRobert Mustacchi * You may only use this file in accordance with the terms of version 5*eb00b1c8SRobert Mustacchi * 1.0 of the CDDL. 6*eb00b1c8SRobert Mustacchi * 7*eb00b1c8SRobert Mustacchi * A full copy of the text of the CDDL should have accompanied this 8*eb00b1c8SRobert Mustacchi * source. A copy of the CDDL is also available via the Internet at 9*eb00b1c8SRobert Mustacchi * http://www.illumos.org/license/CDDL. 10*eb00b1c8SRobert Mustacchi */ 11*eb00b1c8SRobert Mustacchi 12*eb00b1c8SRobert Mustacchi /* 13*eb00b1c8SRobert Mustacchi * Copyright 2019 Joyent, Inc. 14*eb00b1c8SRobert Mustacchi */ 15*eb00b1c8SRobert Mustacchi 16*eb00b1c8SRobert Mustacchi #include "imc_test.h" 17*eb00b1c8SRobert Mustacchi 18*eb00b1c8SRobert Mustacchi /* 19*eb00b1c8SRobert Mustacchi * This tests various aspects of the source address decoder. We need to test 20*eb00b1c8SRobert Mustacchi * several of the following: 21*eb00b1c8SRobert Mustacchi * 22*eb00b1c8SRobert Mustacchi * o SAD rules with different interleave options 23*eb00b1c8SRobert Mustacchi * - XOR (SNB->BRD) 24*eb00b1c8SRobert Mustacchi * - 10t8, 14t12, 32t30 (SKX) 25*eb00b1c8SRobert Mustacchi * o SAD rules with a7mode (IVB->BRD) 26*eb00b1c8SRobert Mustacchi * - And XOR 27*eb00b1c8SRobert Mustacchi * o Different SAD rules for different regions 28*eb00b1c8SRobert Mustacchi */ 29*eb00b1c8SRobert Mustacchi 30*eb00b1c8SRobert Mustacchi /* 31*eb00b1c8SRobert Mustacchi * This tests basics SAD interleaving with a 2 socket system that has a single 32*eb00b1c8SRobert Mustacchi * channel and DIMM. The other aspects are simplified to try and make life 33*eb00b1c8SRobert Mustacchi * easier. 34*eb00b1c8SRobert Mustacchi */ 35*eb00b1c8SRobert Mustacchi 36*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_basic = { 37*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SANDY, 38*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 39*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 40*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 41*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 42*eb00b1c8SRobert Mustacchi .isock_sad = { 43*eb00b1c8SRobert Mustacchi .isad_flags = 0, 44*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 45*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 46*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 47*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 48*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 49*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 50*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 51*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 52*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 53*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 54*eb00b1c8SRobert Mustacchi } 55*eb00b1c8SRobert Mustacchi }, 56*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 57*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 58*eb00b1c8SRobert Mustacchi .itad_flags = 0, 59*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 60*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 61*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 62*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 63*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 64*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 65*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 66*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 67*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 68*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 69*eb00b1c8SRobert Mustacchi } 70*eb00b1c8SRobert Mustacchi }, 71*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 72*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 73*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 74*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 75*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 76*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 77*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 78*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 79*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 80*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 81*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 82*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 83*eb00b1c8SRobert Mustacchi .idimm_width = 8, 84*eb00b1c8SRobert Mustacchi .idimm_density = 2, 85*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 86*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 87*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 88*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 89*eb00b1c8SRobert Mustacchi }, 90*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 91*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 92*eb00b1c8SRobert Mustacchi 0, 0 }, 93*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 94*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 95*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 96*eb00b1c8SRobert Mustacchi .irle_nways = 1, 97*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 98*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 99*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 100*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 101*eb00b1c8SRobert Mustacchi } 102*eb00b1c8SRobert Mustacchi } 103*eb00b1c8SRobert Mustacchi } 104*eb00b1c8SRobert Mustacchi }, 105*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 106*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 107*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 108*eb00b1c8SRobert Mustacchi .isock_sad = { 109*eb00b1c8SRobert Mustacchi .isad_flags = 0, 110*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 111*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 112*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 113*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 114*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 115*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 116*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 117*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 118*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 119*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 120*eb00b1c8SRobert Mustacchi } 121*eb00b1c8SRobert Mustacchi }, 122*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 123*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 124*eb00b1c8SRobert Mustacchi .itad_flags = 0, 125*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 126*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 127*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 128*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 129*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 130*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 131*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 132*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 133*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 134*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 135*eb00b1c8SRobert Mustacchi } 136*eb00b1c8SRobert Mustacchi }, 137*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 138*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 139*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 140*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 141*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 142*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 143*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 144*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 145*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 146*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 147*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 148*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 149*eb00b1c8SRobert Mustacchi .idimm_width = 8, 150*eb00b1c8SRobert Mustacchi .idimm_density = 2, 151*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 152*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 153*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 154*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 155*eb00b1c8SRobert Mustacchi }, 156*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 157*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 158*eb00b1c8SRobert Mustacchi 0, 0 }, 159*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 160*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 161*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 162*eb00b1c8SRobert Mustacchi .irle_nways = 1, 163*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 164*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 165*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 166*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 167*eb00b1c8SRobert Mustacchi } 168*eb00b1c8SRobert Mustacchi } 169*eb00b1c8SRobert Mustacchi } 170*eb00b1c8SRobert Mustacchi } 171*eb00b1c8SRobert Mustacchi }; 172*eb00b1c8SRobert Mustacchi 173*eb00b1c8SRobert Mustacchi /* 174*eb00b1c8SRobert Mustacchi * This is a 4 socket variants of the previous one. Each DIMM now has a much 175*eb00b1c8SRobert Mustacchi * smaller amount of memory in it. 176*eb00b1c8SRobert Mustacchi */ 177*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_4s_basic = { 178*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SANDY, 179*eb00b1c8SRobert Mustacchi .imc_nsockets = 4, 180*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 181*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 182*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 183*eb00b1c8SRobert Mustacchi .isock_sad = { 184*eb00b1c8SRobert Mustacchi .isad_flags = 0, 185*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 186*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 187*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 188*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 189*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 190*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 191*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 192*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 193*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 194*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 195*eb00b1c8SRobert Mustacchi } 196*eb00b1c8SRobert Mustacchi }, 197*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 198*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 199*eb00b1c8SRobert Mustacchi .itad_flags = 0, 200*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 201*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 202*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 203*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 204*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 205*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 206*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 207*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 208*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 209*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 210*eb00b1c8SRobert Mustacchi } 211*eb00b1c8SRobert Mustacchi }, 212*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 213*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 214*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 215*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 216*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 217*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 218*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 219*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 220*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 221*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 222*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 223*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 224*eb00b1c8SRobert Mustacchi .idimm_width = 8, 225*eb00b1c8SRobert Mustacchi .idimm_density = 2, 226*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 227*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 228*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 229*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 230*eb00b1c8SRobert Mustacchi }, 231*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 232*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 233*eb00b1c8SRobert Mustacchi 0, 0 }, 234*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 235*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 236*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 237*eb00b1c8SRobert Mustacchi .irle_nways = 1, 238*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 239*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 240*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 241*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 242*eb00b1c8SRobert Mustacchi } 243*eb00b1c8SRobert Mustacchi } 244*eb00b1c8SRobert Mustacchi } 245*eb00b1c8SRobert Mustacchi }, 246*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 247*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 248*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 249*eb00b1c8SRobert Mustacchi .isock_sad = { 250*eb00b1c8SRobert Mustacchi .isad_flags = 0, 251*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 252*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 253*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 254*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 255*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 256*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 257*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 258*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 259*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 260*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 261*eb00b1c8SRobert Mustacchi } 262*eb00b1c8SRobert Mustacchi }, 263*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 264*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 265*eb00b1c8SRobert Mustacchi .itad_flags = 0, 266*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 267*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 268*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 269*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 270*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 271*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 272*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 273*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 274*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 275*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 276*eb00b1c8SRobert Mustacchi } 277*eb00b1c8SRobert Mustacchi }, 278*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 279*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 280*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 281*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 282*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 283*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 284*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 285*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 286*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 287*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 288*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 289*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 290*eb00b1c8SRobert Mustacchi .idimm_width = 8, 291*eb00b1c8SRobert Mustacchi .idimm_density = 2, 292*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 293*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 294*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 295*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 296*eb00b1c8SRobert Mustacchi }, 297*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 298*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 299*eb00b1c8SRobert Mustacchi 0, 0 }, 300*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 301*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 302*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 303*eb00b1c8SRobert Mustacchi .irle_nways = 1, 304*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 305*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 306*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 307*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 308*eb00b1c8SRobert Mustacchi } 309*eb00b1c8SRobert Mustacchi } 310*eb00b1c8SRobert Mustacchi } 311*eb00b1c8SRobert Mustacchi }, 312*eb00b1c8SRobert Mustacchi .imc_sockets[2] = { 313*eb00b1c8SRobert Mustacchi .isock_nodeid = 2, 314*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 315*eb00b1c8SRobert Mustacchi .isock_sad = { 316*eb00b1c8SRobert Mustacchi .isad_flags = 0, 317*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 318*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 319*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 320*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 321*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 322*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 323*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 324*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 325*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 326*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 327*eb00b1c8SRobert Mustacchi } 328*eb00b1c8SRobert Mustacchi }, 329*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 330*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 331*eb00b1c8SRobert Mustacchi .itad_flags = 0, 332*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 333*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 334*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 335*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 336*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 337*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 338*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 339*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 340*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 341*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 342*eb00b1c8SRobert Mustacchi } 343*eb00b1c8SRobert Mustacchi }, 344*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 345*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 346*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 347*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 348*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 349*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 350*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 351*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 352*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 353*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 354*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 355*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 356*eb00b1c8SRobert Mustacchi .idimm_width = 8, 357*eb00b1c8SRobert Mustacchi .idimm_density = 2, 358*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 359*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 360*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 361*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 362*eb00b1c8SRobert Mustacchi }, 363*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 364*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 365*eb00b1c8SRobert Mustacchi 0, 0 }, 366*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 367*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 368*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 369*eb00b1c8SRobert Mustacchi .irle_nways = 1, 370*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 371*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 372*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 373*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 374*eb00b1c8SRobert Mustacchi } 375*eb00b1c8SRobert Mustacchi } 376*eb00b1c8SRobert Mustacchi } 377*eb00b1c8SRobert Mustacchi }, 378*eb00b1c8SRobert Mustacchi .imc_sockets[3] = { 379*eb00b1c8SRobert Mustacchi .isock_nodeid = 3, 380*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 381*eb00b1c8SRobert Mustacchi .isock_sad = { 382*eb00b1c8SRobert Mustacchi .isad_flags = 0, 383*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 384*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 385*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 386*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 387*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 388*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 389*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 390*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 391*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 392*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 393*eb00b1c8SRobert Mustacchi } 394*eb00b1c8SRobert Mustacchi }, 395*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 396*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 397*eb00b1c8SRobert Mustacchi .itad_flags = 0, 398*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 399*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 400*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 401*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 402*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 403*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 404*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 405*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 406*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 407*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 408*eb00b1c8SRobert Mustacchi } 409*eb00b1c8SRobert Mustacchi }, 410*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 411*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 412*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 413*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 414*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 415*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 416*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 417*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 418*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 419*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 420*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 421*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 422*eb00b1c8SRobert Mustacchi .idimm_width = 8, 423*eb00b1c8SRobert Mustacchi .idimm_density = 2, 424*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 425*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 426*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 427*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 428*eb00b1c8SRobert Mustacchi }, 429*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 430*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 431*eb00b1c8SRobert Mustacchi 0, 0 }, 432*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 433*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 434*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 435*eb00b1c8SRobert Mustacchi .irle_nways = 1, 436*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 437*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 438*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 439*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 440*eb00b1c8SRobert Mustacchi } 441*eb00b1c8SRobert Mustacchi } 442*eb00b1c8SRobert Mustacchi } 443*eb00b1c8SRobert Mustacchi } 444*eb00b1c8SRobert Mustacchi }; 445*eb00b1c8SRobert Mustacchi 446*eb00b1c8SRobert Mustacchi /* 447*eb00b1c8SRobert Mustacchi * This is similar to imc_sad_2s_basic; however, it enables the XOR mode. 448*eb00b1c8SRobert Mustacchi */ 449*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_xor = { 450*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_IVY, 451*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 452*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 453*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 454*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 455*eb00b1c8SRobert Mustacchi .isock_sad = { 456*eb00b1c8SRobert Mustacchi .isad_flags = 0, 457*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 458*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 459*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 460*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 461*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 462*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 463*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 464*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6XOR, 465*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 466*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 467*eb00b1c8SRobert Mustacchi } 468*eb00b1c8SRobert Mustacchi }, 469*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 470*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 471*eb00b1c8SRobert Mustacchi .itad_flags = 0, 472*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 473*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 474*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 475*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 476*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 477*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 478*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 479*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 480*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 481*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 482*eb00b1c8SRobert Mustacchi } 483*eb00b1c8SRobert Mustacchi }, 484*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 485*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 486*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 487*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 488*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 489*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 490*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 491*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 492*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 493*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 494*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 495*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 496*eb00b1c8SRobert Mustacchi .idimm_width = 8, 497*eb00b1c8SRobert Mustacchi .idimm_density = 2, 498*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 499*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 500*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 501*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 502*eb00b1c8SRobert Mustacchi }, 503*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 504*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 505*eb00b1c8SRobert Mustacchi 0, 0 }, 506*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 507*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 508*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 509*eb00b1c8SRobert Mustacchi .irle_nways = 1, 510*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 511*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 512*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 513*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 514*eb00b1c8SRobert Mustacchi } 515*eb00b1c8SRobert Mustacchi } 516*eb00b1c8SRobert Mustacchi } 517*eb00b1c8SRobert Mustacchi }, 518*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 519*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 520*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 521*eb00b1c8SRobert Mustacchi .isock_sad = { 522*eb00b1c8SRobert Mustacchi .isad_flags = 0, 523*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 524*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 525*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 526*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 527*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 528*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 529*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 530*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6XOR, 531*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 532*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 533*eb00b1c8SRobert Mustacchi } 534*eb00b1c8SRobert Mustacchi }, 535*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 536*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 537*eb00b1c8SRobert Mustacchi .itad_flags = 0, 538*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 539*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 540*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 541*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 542*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 543*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 544*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 545*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 546*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 547*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 548*eb00b1c8SRobert Mustacchi } 549*eb00b1c8SRobert Mustacchi }, 550*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 551*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 552*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 553*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 554*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 555*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 556*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 557*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 558*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 559*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 560*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 561*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 562*eb00b1c8SRobert Mustacchi .idimm_width = 8, 563*eb00b1c8SRobert Mustacchi .idimm_density = 2, 564*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 565*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 566*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 567*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 568*eb00b1c8SRobert Mustacchi }, 569*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 570*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 571*eb00b1c8SRobert Mustacchi 0, 0 }, 572*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 573*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 574*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 575*eb00b1c8SRobert Mustacchi .irle_nways = 1, 576*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 577*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 578*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 579*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 580*eb00b1c8SRobert Mustacchi } 581*eb00b1c8SRobert Mustacchi } 582*eb00b1c8SRobert Mustacchi } 583*eb00b1c8SRobert Mustacchi } 584*eb00b1c8SRobert Mustacchi }; 585*eb00b1c8SRobert Mustacchi 586*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_a7 = { 587*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_IVY, 588*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 589*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 590*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 591*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 592*eb00b1c8SRobert Mustacchi .isock_sad = { 593*eb00b1c8SRobert Mustacchi .isad_flags = 0, 594*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 595*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 596*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 597*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 598*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 599*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 600*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 601*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 602*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 603*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 604*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 605*eb00b1c8SRobert Mustacchi } 606*eb00b1c8SRobert Mustacchi }, 607*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 608*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 609*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 610*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 611*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 612*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 613*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 614*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 615*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 616*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 617*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 618*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 619*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 620*eb00b1c8SRobert Mustacchi } 621*eb00b1c8SRobert Mustacchi }, 622*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 623*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 624*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 625*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 626*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 627*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 628*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 629*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 630*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 631*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 632*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 633*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 634*eb00b1c8SRobert Mustacchi .idimm_width = 8, 635*eb00b1c8SRobert Mustacchi .idimm_density = 2, 636*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 637*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 638*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 639*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 640*eb00b1c8SRobert Mustacchi }, 641*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 642*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 643*eb00b1c8SRobert Mustacchi 0, 0 }, 644*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 645*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 646*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 647*eb00b1c8SRobert Mustacchi .irle_nways = 1, 648*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 649*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 650*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 651*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 652*eb00b1c8SRobert Mustacchi } 653*eb00b1c8SRobert Mustacchi } 654*eb00b1c8SRobert Mustacchi } 655*eb00b1c8SRobert Mustacchi }, 656*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 657*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 658*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 659*eb00b1c8SRobert Mustacchi .isock_sad = { 660*eb00b1c8SRobert Mustacchi .isad_flags = 0, 661*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 662*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 663*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 664*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 665*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 666*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 667*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 668*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 669*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 670*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 671*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 672*eb00b1c8SRobert Mustacchi } 673*eb00b1c8SRobert Mustacchi }, 674*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 675*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 676*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 677*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 678*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 679*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 680*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 681*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 682*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 683*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 684*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 685*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 686*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 687*eb00b1c8SRobert Mustacchi } 688*eb00b1c8SRobert Mustacchi }, 689*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 690*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 691*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 692*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 693*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 694*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 695*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 696*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 697*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 698*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 699*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 700*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 701*eb00b1c8SRobert Mustacchi .idimm_width = 8, 702*eb00b1c8SRobert Mustacchi .idimm_density = 2, 703*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 704*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 705*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 706*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 707*eb00b1c8SRobert Mustacchi }, 708*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 709*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 710*eb00b1c8SRobert Mustacchi 0, 0 }, 711*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 712*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 713*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 714*eb00b1c8SRobert Mustacchi .irle_nways = 1, 715*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 716*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 717*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 718*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 719*eb00b1c8SRobert Mustacchi } 720*eb00b1c8SRobert Mustacchi } 721*eb00b1c8SRobert Mustacchi } 722*eb00b1c8SRobert Mustacchi } 723*eb00b1c8SRobert Mustacchi }; 724*eb00b1c8SRobert Mustacchi 725*eb00b1c8SRobert Mustacchi /* 726*eb00b1c8SRobert Mustacchi * This is a 4 socket variants of the previous one. Each DIMM now has a much 727*eb00b1c8SRobert Mustacchi * smaller amount of memory in it. 728*eb00b1c8SRobert Mustacchi */ 729*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_4s_a7 = { 730*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_HASWELL, 731*eb00b1c8SRobert Mustacchi .imc_nsockets = 4, 732*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 733*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 734*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 735*eb00b1c8SRobert Mustacchi .isock_sad = { 736*eb00b1c8SRobert Mustacchi .isad_flags = 0, 737*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 738*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 739*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 740*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 741*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 742*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 743*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 744*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 745*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 746*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 747*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 748*eb00b1c8SRobert Mustacchi } 749*eb00b1c8SRobert Mustacchi }, 750*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 751*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 752*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 753*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 754*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 755*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 756*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 757*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 758*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 759*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 760*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 761*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 762*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 763*eb00b1c8SRobert Mustacchi } 764*eb00b1c8SRobert Mustacchi }, 765*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 766*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 767*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 768*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 769*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 770*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 771*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 772*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 773*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 774*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 775*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 776*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 777*eb00b1c8SRobert Mustacchi .idimm_width = 8, 778*eb00b1c8SRobert Mustacchi .idimm_density = 2, 779*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 780*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 781*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 782*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 783*eb00b1c8SRobert Mustacchi }, 784*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 785*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 786*eb00b1c8SRobert Mustacchi 0, 0 }, 787*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 788*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 789*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 790*eb00b1c8SRobert Mustacchi .irle_nways = 1, 791*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 792*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 793*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 794*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 795*eb00b1c8SRobert Mustacchi } 796*eb00b1c8SRobert Mustacchi } 797*eb00b1c8SRobert Mustacchi } 798*eb00b1c8SRobert Mustacchi }, 799*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 800*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 801*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 802*eb00b1c8SRobert Mustacchi .isock_sad = { 803*eb00b1c8SRobert Mustacchi .isad_flags = 0, 804*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 805*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 806*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 807*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 808*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 809*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 810*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 811*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 812*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 813*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 814*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 815*eb00b1c8SRobert Mustacchi } 816*eb00b1c8SRobert Mustacchi }, 817*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 818*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 819*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 820*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 821*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 822*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 823*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 824*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 825*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 826*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 827*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 828*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 829*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 830*eb00b1c8SRobert Mustacchi } 831*eb00b1c8SRobert Mustacchi }, 832*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 833*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 834*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 835*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 836*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 837*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 838*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 839*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 840*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 841*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 842*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 843*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 844*eb00b1c8SRobert Mustacchi .idimm_width = 8, 845*eb00b1c8SRobert Mustacchi .idimm_density = 2, 846*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 847*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 848*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 849*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 850*eb00b1c8SRobert Mustacchi }, 851*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 852*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 853*eb00b1c8SRobert Mustacchi 0, 0 }, 854*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 855*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 856*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 857*eb00b1c8SRobert Mustacchi .irle_nways = 1, 858*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 859*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 860*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 861*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 862*eb00b1c8SRobert Mustacchi } 863*eb00b1c8SRobert Mustacchi } 864*eb00b1c8SRobert Mustacchi } 865*eb00b1c8SRobert Mustacchi }, 866*eb00b1c8SRobert Mustacchi .imc_sockets[2] = { 867*eb00b1c8SRobert Mustacchi .isock_nodeid = 2, 868*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 869*eb00b1c8SRobert Mustacchi .isock_sad = { 870*eb00b1c8SRobert Mustacchi .isad_flags = 0, 871*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 872*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 873*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 874*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 875*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 876*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 877*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 878*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 879*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 880*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 881*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 882*eb00b1c8SRobert Mustacchi } 883*eb00b1c8SRobert Mustacchi }, 884*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 885*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 886*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 887*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 888*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 889*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 890*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 891*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 892*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 893*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 894*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 895*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 896*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 897*eb00b1c8SRobert Mustacchi } 898*eb00b1c8SRobert Mustacchi }, 899*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 900*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 901*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 902*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 903*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 904*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 905*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 906*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 907*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 908*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 909*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 910*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 911*eb00b1c8SRobert Mustacchi .idimm_width = 8, 912*eb00b1c8SRobert Mustacchi .idimm_density = 2, 913*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 914*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 915*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 916*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 917*eb00b1c8SRobert Mustacchi }, 918*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 919*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 920*eb00b1c8SRobert Mustacchi 0, 0 }, 921*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 922*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 923*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 924*eb00b1c8SRobert Mustacchi .irle_nways = 1, 925*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 926*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 927*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 928*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 929*eb00b1c8SRobert Mustacchi } 930*eb00b1c8SRobert Mustacchi } 931*eb00b1c8SRobert Mustacchi } 932*eb00b1c8SRobert Mustacchi }, 933*eb00b1c8SRobert Mustacchi .imc_sockets[3] = { 934*eb00b1c8SRobert Mustacchi .isock_nodeid = 3, 935*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 936*eb00b1c8SRobert Mustacchi .isock_sad = { 937*eb00b1c8SRobert Mustacchi .isad_flags = 0, 938*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 939*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 940*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 941*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 942*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 943*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 944*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 945*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 946*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 947*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 948*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 2, 3, 0, 1, 2, 3 } 949*eb00b1c8SRobert Mustacchi } 950*eb00b1c8SRobert Mustacchi }, 951*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 952*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 953*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 954*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 955*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 956*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 957*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 958*eb00b1c8SRobert Mustacchi .itr_sock_way = 4, 959*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 960*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 961*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 962*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 963*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 964*eb00b1c8SRobert Mustacchi } 965*eb00b1c8SRobert Mustacchi }, 966*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 967*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 968*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 969*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 970*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 971*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 972*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 973*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 974*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 975*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 976*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 977*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 978*eb00b1c8SRobert Mustacchi .idimm_width = 8, 979*eb00b1c8SRobert Mustacchi .idimm_density = 2, 980*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 981*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 982*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 983*eb00b1c8SRobert Mustacchi .idimm_size = 0x20000000 984*eb00b1c8SRobert Mustacchi }, 985*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 986*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 987*eb00b1c8SRobert Mustacchi 0, 0 }, 988*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 989*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 990*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 991*eb00b1c8SRobert Mustacchi .irle_nways = 1, 992*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 993*eb00b1c8SRobert Mustacchi .irle_limit = 0x20000000, 994*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 995*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 996*eb00b1c8SRobert Mustacchi } 997*eb00b1c8SRobert Mustacchi } 998*eb00b1c8SRobert Mustacchi } 999*eb00b1c8SRobert Mustacchi } 1000*eb00b1c8SRobert Mustacchi }; 1001*eb00b1c8SRobert Mustacchi 1002*eb00b1c8SRobert Mustacchi /* 1003*eb00b1c8SRobert Mustacchi * This is similar to imc_sad_2s_basic; however, it enables the XOR mode. 1004*eb00b1c8SRobert Mustacchi */ 1005*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_a7_xor = { 1006*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_BROADWELL, 1007*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 1008*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 1009*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 1010*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1011*eb00b1c8SRobert Mustacchi .isock_sad = { 1012*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1013*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1014*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1015*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1016*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 1017*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1018*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1019*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1020*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6XOR, 1021*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 1022*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1023*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 1024*eb00b1c8SRobert Mustacchi } 1025*eb00b1c8SRobert Mustacchi }, 1026*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1027*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1028*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 1029*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 1030*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1031*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1032*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1033*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1034*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1035*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1036*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1037*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1038*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1039*eb00b1c8SRobert Mustacchi } 1040*eb00b1c8SRobert Mustacchi }, 1041*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1042*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1043*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1044*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 1045*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1046*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1047*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1048*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1049*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1050*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1051*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1052*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1053*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1054*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1055*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1056*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1057*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1058*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1059*eb00b1c8SRobert Mustacchi }, 1060*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1061*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1062*eb00b1c8SRobert Mustacchi 0, 0 }, 1063*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 1064*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1065*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1066*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1067*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1068*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1069*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1070*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1071*eb00b1c8SRobert Mustacchi } 1072*eb00b1c8SRobert Mustacchi } 1073*eb00b1c8SRobert Mustacchi } 1074*eb00b1c8SRobert Mustacchi }, 1075*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 1076*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 1077*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1078*eb00b1c8SRobert Mustacchi .isock_sad = { 1079*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1080*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1081*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1082*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1083*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 1084*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1085*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1086*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1087*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6XOR, 1088*eb00b1c8SRobert Mustacchi .isr_a7mode = B_TRUE, 1089*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1090*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 1091*eb00b1c8SRobert Mustacchi } 1092*eb00b1c8SRobert Mustacchi }, 1093*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1094*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1095*eb00b1c8SRobert Mustacchi .itad_flags = IMC_TAD_FLAG_CHANSHIFT, 1096*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 1097*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1098*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1099*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1100*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1101*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1102*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1103*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1104*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1105*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1106*eb00b1c8SRobert Mustacchi } 1107*eb00b1c8SRobert Mustacchi }, 1108*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1109*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1110*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1111*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 1112*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1113*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1114*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1115*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1116*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1117*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1118*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1119*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1120*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1121*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1122*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1123*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1124*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1125*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1126*eb00b1c8SRobert Mustacchi }, 1127*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1128*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1129*eb00b1c8SRobert Mustacchi 0, 0 }, 1130*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 1131*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1132*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1133*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1134*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1135*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1136*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1137*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1138*eb00b1c8SRobert Mustacchi } 1139*eb00b1c8SRobert Mustacchi } 1140*eb00b1c8SRobert Mustacchi } 1141*eb00b1c8SRobert Mustacchi } 1142*eb00b1c8SRobert Mustacchi }; 1143*eb00b1c8SRobert Mustacchi 1144*eb00b1c8SRobert Mustacchi /* 1145*eb00b1c8SRobert Mustacchi * This constructs an IMC that has multiple SAD rules that change how we 1146*eb00b1c8SRobert Mustacchi * interleave across different regions of memory. 1147*eb00b1c8SRobert Mustacchi */ 1148*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_multirule = { 1149*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SANDY, 1150*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 1151*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 1152*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 1153*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1154*eb00b1c8SRobert Mustacchi .isock_sad = { 1155*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1156*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1157*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1158*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1159*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 1160*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1161*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1162*eb00b1c8SRobert Mustacchi .isr_limit = 0x20000000, 1163*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1164*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1165*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 1166*eb00b1c8SRobert Mustacchi }, 1167*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 1168*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1169*eb00b1c8SRobert Mustacchi .isr_limit = 0x40000000, 1170*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1171*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1172*eb00b1c8SRobert Mustacchi .isr_targets = { 1, 1, 1, 1, 1, 1, 1, 1 } 1173*eb00b1c8SRobert Mustacchi }, 1174*eb00b1c8SRobert Mustacchi .isad_rules[2] = { 1175*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1176*eb00b1c8SRobert Mustacchi .isr_limit = 0x60000000, 1177*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1178*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1179*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 0, 0, 0, 0, 0, 0, 0 } 1180*eb00b1c8SRobert Mustacchi }, 1181*eb00b1c8SRobert Mustacchi .isad_rules[3] = { 1182*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1183*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1184*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1185*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1186*eb00b1c8SRobert Mustacchi .isr_targets = { 1, 0, 1, 0, 1, 0, 1, 0 } 1187*eb00b1c8SRobert Mustacchi } 1188*eb00b1c8SRobert Mustacchi }, 1189*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1190*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1191*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1192*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 1193*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1194*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1195*eb00b1c8SRobert Mustacchi .itr_limit = 0x20000000, 1196*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1197*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1198*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1199*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1200*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1201*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1202*eb00b1c8SRobert Mustacchi }, 1203*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1204*eb00b1c8SRobert Mustacchi .itr_base = 0x20000000, 1205*eb00b1c8SRobert Mustacchi .itr_limit = 0x60000000, 1206*eb00b1c8SRobert Mustacchi .itr_sock_way = 1, 1207*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1208*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1209*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1210*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1211*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1212*eb00b1c8SRobert Mustacchi }, 1213*eb00b1c8SRobert Mustacchi .itad_rules[2] = { 1214*eb00b1c8SRobert Mustacchi .itr_base = 0x60000000, 1215*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1216*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1217*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1218*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1219*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1220*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1221*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1222*eb00b1c8SRobert Mustacchi } 1223*eb00b1c8SRobert Mustacchi }, 1224*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1225*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1226*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1227*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 1228*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1229*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1230*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1231*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1232*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1233*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1234*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1235*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1236*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1237*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1238*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1239*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1240*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1241*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1242*eb00b1c8SRobert Mustacchi }, 1243*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1244*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0x30000000, 0, 0, 0, 0, 1245*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1246*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 1247*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1248*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1249*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1250*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1251*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1252*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1253*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1254*eb00b1c8SRobert Mustacchi } 1255*eb00b1c8SRobert Mustacchi } 1256*eb00b1c8SRobert Mustacchi } 1257*eb00b1c8SRobert Mustacchi }, 1258*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 1259*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 1260*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1261*eb00b1c8SRobert Mustacchi .isock_sad = { 1262*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1263*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1264*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1265*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1266*eb00b1c8SRobert Mustacchi .isad_nrules = 10, 1267*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1268*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1269*eb00b1c8SRobert Mustacchi .isr_limit = 0x20000000, 1270*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1271*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1272*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 1, 0, 1, 0, 1, 0, 1 } 1273*eb00b1c8SRobert Mustacchi }, 1274*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 1275*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1276*eb00b1c8SRobert Mustacchi .isr_limit = 0x40000000, 1277*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1278*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1279*eb00b1c8SRobert Mustacchi .isr_targets = { 1, 1, 1, 1, 1, 1, 1, 1 } 1280*eb00b1c8SRobert Mustacchi }, 1281*eb00b1c8SRobert Mustacchi .isad_rules[2] = { 1282*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1283*eb00b1c8SRobert Mustacchi .isr_limit = 0x60000000, 1284*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1285*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1286*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 0, 0, 0, 0, 0, 0, 0 } 1287*eb00b1c8SRobert Mustacchi }, 1288*eb00b1c8SRobert Mustacchi .isad_rules[3] = { 1289*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1290*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1291*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_8t6, 1292*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1293*eb00b1c8SRobert Mustacchi .isr_targets = { 1, 0, 1, 0, 1, 0, 1, 0 } 1294*eb00b1c8SRobert Mustacchi } 1295*eb00b1c8SRobert Mustacchi }, 1296*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1297*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1298*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1299*eb00b1c8SRobert Mustacchi .itad_nrules = 12, 1300*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1301*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1302*eb00b1c8SRobert Mustacchi .itr_limit = 0x20000000, 1303*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1304*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1305*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1306*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1307*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1308*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1309*eb00b1c8SRobert Mustacchi }, 1310*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1311*eb00b1c8SRobert Mustacchi .itr_base = 0x20000000, 1312*eb00b1c8SRobert Mustacchi .itr_limit = 0x60000000, 1313*eb00b1c8SRobert Mustacchi .itr_sock_way = 1, 1314*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1315*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1316*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1317*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1318*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1319*eb00b1c8SRobert Mustacchi }, 1320*eb00b1c8SRobert Mustacchi .itad_rules[2] = { 1321*eb00b1c8SRobert Mustacchi .itr_base = 0x60000000, 1322*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1323*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1324*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1325*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_64B, 1326*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1327*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1328*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1329*eb00b1c8SRobert Mustacchi } 1330*eb00b1c8SRobert Mustacchi }, 1331*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1332*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1333*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1334*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR3, 1335*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1336*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1337*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1338*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1339*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1340*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1341*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1342*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1343*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1344*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1345*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1346*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1347*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1348*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1349*eb00b1c8SRobert Mustacchi }, 1350*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1351*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0x10000000, 0, 0, 0, 0, 1352*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1353*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 8, 1354*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1355*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1356*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1357*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1358*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1359*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1360*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1361*eb00b1c8SRobert Mustacchi } 1362*eb00b1c8SRobert Mustacchi } 1363*eb00b1c8SRobert Mustacchi } 1364*eb00b1c8SRobert Mustacchi } 1365*eb00b1c8SRobert Mustacchi }; 1366*eb00b1c8SRobert Mustacchi 1367*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_2s_skx_10t8 = { 1368*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SKYLAKE, 1369*eb00b1c8SRobert Mustacchi .imc_nsockets = 2, 1370*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 1371*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 1372*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1373*eb00b1c8SRobert Mustacchi .isock_sad = { 1374*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1375*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1376*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1377*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1378*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1379*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1380*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1381*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1382*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_10t8, 1383*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1384*eb00b1c8SRobert Mustacchi .isr_targets = { 8, 1, 8, 1, 8, 1, 8, 1 } 1385*eb00b1c8SRobert Mustacchi }, 1386*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1387*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1388*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 } 1389*eb00b1c8SRobert Mustacchi } 1390*eb00b1c8SRobert Mustacchi }, 1391*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1392*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1393*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1394*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1395*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1396*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1397*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1398*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1399*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1400*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_256B, 1401*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1402*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1403*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1404*eb00b1c8SRobert Mustacchi } 1405*eb00b1c8SRobert Mustacchi }, 1406*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1407*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1408*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1409*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1410*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1411*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1412*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1413*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1414*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1415*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1416*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1417*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1418*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1419*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1420*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1421*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1422*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1423*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1424*eb00b1c8SRobert Mustacchi }, 1425*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1426*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1427*eb00b1c8SRobert Mustacchi 0, 0 }, 1428*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1429*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1430*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1431*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1432*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1433*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1434*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1435*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1436*eb00b1c8SRobert Mustacchi } 1437*eb00b1c8SRobert Mustacchi } 1438*eb00b1c8SRobert Mustacchi } 1439*eb00b1c8SRobert Mustacchi }, 1440*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 1441*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 1442*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1443*eb00b1c8SRobert Mustacchi .isock_sad = { 1444*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1445*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1446*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1447*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1448*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1449*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1450*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1451*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1452*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_10t8, 1453*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1454*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 8, 0, 8, 0, 8, 0, 8 } 1455*eb00b1c8SRobert Mustacchi }, 1456*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1457*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1458*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 } 1459*eb00b1c8SRobert Mustacchi } 1460*eb00b1c8SRobert Mustacchi }, 1461*eb00b1c8SRobert Mustacchi .isock_ntad = 1, 1462*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1463*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1464*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1465*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1466*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1467*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1468*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1469*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1470*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_256B, 1471*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1472*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1473*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1474*eb00b1c8SRobert Mustacchi } 1475*eb00b1c8SRobert Mustacchi }, 1476*eb00b1c8SRobert Mustacchi .isock_nimc = 1, 1477*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1478*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1479*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1480*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1481*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1482*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1483*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1484*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1485*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1486*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1487*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1488*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1489*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1490*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1491*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1492*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1493*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1494*eb00b1c8SRobert Mustacchi }, 1495*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1496*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0x100, 0, 0, 0, 0, 0, 0, 1497*eb00b1c8SRobert Mustacchi 0, 0, 0, 0 }, 1498*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1499*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1500*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1501*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1502*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1503*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1504*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1505*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1506*eb00b1c8SRobert Mustacchi } 1507*eb00b1c8SRobert Mustacchi } 1508*eb00b1c8SRobert Mustacchi } 1509*eb00b1c8SRobert Mustacchi } 1510*eb00b1c8SRobert Mustacchi }; 1511*eb00b1c8SRobert Mustacchi 1512*eb00b1c8SRobert Mustacchi /* 1513*eb00b1c8SRobert Mustacchi * This performs 2 way interleaving across memory controllers, rather than 1514*eb00b1c8SRobert Mustacchi * across sockets. 1515*eb00b1c8SRobert Mustacchi */ 1516*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_1s_skx_14t12 = { 1517*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SKYLAKE, 1518*eb00b1c8SRobert Mustacchi .imc_nsockets = 1, 1519*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 1520*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 1521*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1522*eb00b1c8SRobert Mustacchi .isock_sad = { 1523*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1524*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1525*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1526*eb00b1c8SRobert Mustacchi .isad_tohm = 0, 1527*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1528*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1529*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1530*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000, 1531*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_14t12, 1532*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1533*eb00b1c8SRobert Mustacchi .isr_targets = { 8, 9, 8, 9, 8, 9, 8, 9 } 1534*eb00b1c8SRobert Mustacchi }, 1535*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1536*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1537*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 }, 1538*eb00b1c8SRobert Mustacchi .ismc_mcroutes[1] = { 1, 0 } 1539*eb00b1c8SRobert Mustacchi } 1540*eb00b1c8SRobert Mustacchi }, 1541*eb00b1c8SRobert Mustacchi .isock_ntad = 2, 1542*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1543*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1544*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1545*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1546*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1547*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1548*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1549*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1550*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_4KB, 1551*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1552*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1553*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1554*eb00b1c8SRobert Mustacchi } 1555*eb00b1c8SRobert Mustacchi }, 1556*eb00b1c8SRobert Mustacchi .isock_tad[1] = { 1557*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1558*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1559*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1560*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1561*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1562*eb00b1c8SRobert Mustacchi .itr_sock_way = 2, 1563*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1564*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_4KB, 1565*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1566*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1567*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1568*eb00b1c8SRobert Mustacchi } 1569*eb00b1c8SRobert Mustacchi }, 1570*eb00b1c8SRobert Mustacchi .isock_nimc = 2, 1571*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1572*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1573*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1574*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1575*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1576*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1577*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1578*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1579*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1580*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1581*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1582*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1583*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1584*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1585*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1586*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1587*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1588*eb00b1c8SRobert Mustacchi }, 1589*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1590*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1591*eb00b1c8SRobert Mustacchi 0, 0 }, 1592*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1593*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1594*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1595*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1596*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1597*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1598*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1599*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1600*eb00b1c8SRobert Mustacchi } 1601*eb00b1c8SRobert Mustacchi } 1602*eb00b1c8SRobert Mustacchi }, 1603*eb00b1c8SRobert Mustacchi .isock_imcs[1] = { 1604*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1605*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1606*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1607*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1608*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1609*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1610*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1611*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1612*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1613*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1614*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1615*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1616*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1617*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1618*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1619*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1620*eb00b1c8SRobert Mustacchi }, 1621*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1622*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1623*eb00b1c8SRobert Mustacchi 0, 0 }, 1624*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1625*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1626*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1627*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1628*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1629*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1630*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1631*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1632*eb00b1c8SRobert Mustacchi } 1633*eb00b1c8SRobert Mustacchi } 1634*eb00b1c8SRobert Mustacchi } 1635*eb00b1c8SRobert Mustacchi }, 1636*eb00b1c8SRobert Mustacchi }; 1637*eb00b1c8SRobert Mustacchi 1638*eb00b1c8SRobert Mustacchi static const imc_t imc_sad_4s_8w_skx_32t30 = { 1639*eb00b1c8SRobert Mustacchi .imc_gen = IMC_GEN_SKYLAKE, 1640*eb00b1c8SRobert Mustacchi .imc_nsockets = 4, 1641*eb00b1c8SRobert Mustacchi .imc_sockets[0] = { 1642*eb00b1c8SRobert Mustacchi .isock_nodeid = 0, 1643*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1644*eb00b1c8SRobert Mustacchi .isock_sad = { 1645*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1646*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1647*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1648*eb00b1c8SRobert Mustacchi .isad_tohm = 0x280000000ULL, 1649*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1650*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1651*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1652*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000ULL, 1653*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1654*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1655*eb00b1c8SRobert Mustacchi .isr_targets = { 8, 9, 8, 9, 8, 9, 8, 9 } 1656*eb00b1c8SRobert Mustacchi }, 1657*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 1658*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1659*eb00b1c8SRobert Mustacchi .isr_limit = 0x280000000ULL, 1660*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1661*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1662*eb00b1c8SRobert Mustacchi .isr_targets = { 3, 3, 0, 0, 1, 1, 2, 2 } 1663*eb00b1c8SRobert Mustacchi }, 1664*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1665*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1666*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 }, 1667*eb00b1c8SRobert Mustacchi .ismc_mcroutes[1] = { 1, 0 } 1668*eb00b1c8SRobert Mustacchi } 1669*eb00b1c8SRobert Mustacchi }, 1670*eb00b1c8SRobert Mustacchi .isock_ntad = 2, 1671*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1672*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1673*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1674*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1675*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1676*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1677*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1678*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1679*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1680*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1681*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1682*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1683*eb00b1c8SRobert Mustacchi }, 1684*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1685*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 1686*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 1687*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1688*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1689*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1690*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1691*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1692*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1693*eb00b1c8SRobert Mustacchi } 1694*eb00b1c8SRobert Mustacchi 1695*eb00b1c8SRobert Mustacchi }, 1696*eb00b1c8SRobert Mustacchi .isock_tad[1] = { 1697*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1698*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1699*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1700*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1701*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1702*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1703*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1704*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1705*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1706*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1707*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1708*eb00b1c8SRobert Mustacchi }, 1709*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1710*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 1711*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 1712*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1713*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1714*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1715*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1716*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1717*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1718*eb00b1c8SRobert Mustacchi } 1719*eb00b1c8SRobert Mustacchi }, 1720*eb00b1c8SRobert Mustacchi .isock_nimc = 2, 1721*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1722*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1723*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1724*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1725*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1726*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1727*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1728*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1729*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1730*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1731*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1732*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1733*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1734*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1735*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1736*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1737*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1738*eb00b1c8SRobert Mustacchi }, 1739*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1740*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 1741*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1742*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1743*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1744*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1745*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1746*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1747*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1748*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1749*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1750*eb00b1c8SRobert Mustacchi } 1751*eb00b1c8SRobert Mustacchi } 1752*eb00b1c8SRobert Mustacchi }, 1753*eb00b1c8SRobert Mustacchi .isock_imcs[1] = { 1754*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1755*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1756*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1757*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1758*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1759*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1760*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1761*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1762*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1763*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1764*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1765*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1766*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1767*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1768*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1769*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1770*eb00b1c8SRobert Mustacchi }, 1771*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1772*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 1773*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1774*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1775*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1776*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1777*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1778*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1779*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1780*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1781*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1782*eb00b1c8SRobert Mustacchi } 1783*eb00b1c8SRobert Mustacchi } 1784*eb00b1c8SRobert Mustacchi } 1785*eb00b1c8SRobert Mustacchi }, 1786*eb00b1c8SRobert Mustacchi .imc_sockets[1] = { 1787*eb00b1c8SRobert Mustacchi .isock_nodeid = 1, 1788*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1789*eb00b1c8SRobert Mustacchi .isock_sad = { 1790*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1791*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1792*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1793*eb00b1c8SRobert Mustacchi .isad_tohm = 0x280000000ULL, 1794*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1795*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1796*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1797*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000ULL, 1798*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1799*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1800*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 0, 0, 0, 0, 0, 0, 0 } 1801*eb00b1c8SRobert Mustacchi }, 1802*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 1803*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1804*eb00b1c8SRobert Mustacchi .isr_limit = 0x280000000ULL, 1805*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1806*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1807*eb00b1c8SRobert Mustacchi .isr_targets = { 3, 3, 0, 0, 8, 9, 2, 2 } 1808*eb00b1c8SRobert Mustacchi }, 1809*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1810*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1811*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 }, 1812*eb00b1c8SRobert Mustacchi .ismc_mcroutes[1] = { 1, 0 } 1813*eb00b1c8SRobert Mustacchi } 1814*eb00b1c8SRobert Mustacchi }, 1815*eb00b1c8SRobert Mustacchi .isock_ntad = 2, 1816*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1817*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1818*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1819*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1820*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1821*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1822*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1823*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1824*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1825*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1826*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1827*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1828*eb00b1c8SRobert Mustacchi }, 1829*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1830*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 1831*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 1832*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1833*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1834*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1835*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1836*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1837*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1838*eb00b1c8SRobert Mustacchi } 1839*eb00b1c8SRobert Mustacchi 1840*eb00b1c8SRobert Mustacchi }, 1841*eb00b1c8SRobert Mustacchi .isock_tad[1] = { 1842*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1843*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1844*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1845*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1846*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1847*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1848*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1849*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1850*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1851*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1852*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1853*eb00b1c8SRobert Mustacchi }, 1854*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1855*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 1856*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 1857*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1858*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1859*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1860*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1861*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1862*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1863*eb00b1c8SRobert Mustacchi } 1864*eb00b1c8SRobert Mustacchi }, 1865*eb00b1c8SRobert Mustacchi .isock_nimc = 2, 1866*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 1867*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1868*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1869*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1870*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1871*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1872*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1873*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1874*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1875*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1876*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1877*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1878*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1879*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1880*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1881*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1882*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1883*eb00b1c8SRobert Mustacchi }, 1884*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1885*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 1886*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1887*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1888*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1889*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1890*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1891*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1892*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1893*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1894*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1895*eb00b1c8SRobert Mustacchi } 1896*eb00b1c8SRobert Mustacchi } 1897*eb00b1c8SRobert Mustacchi }, 1898*eb00b1c8SRobert Mustacchi .isock_imcs[1] = { 1899*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 1900*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 1901*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 1902*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 1903*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 1904*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 1905*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 1906*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 1907*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 1908*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 1909*eb00b1c8SRobert Mustacchi .idimm_width = 8, 1910*eb00b1c8SRobert Mustacchi .idimm_density = 2, 1911*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 1912*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 1913*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 1914*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 1915*eb00b1c8SRobert Mustacchi }, 1916*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 1917*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 1918*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 1919*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 1920*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 1921*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 1922*eb00b1c8SRobert Mustacchi .irle_nways = 1, 1923*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 1924*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 1925*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 1926*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 1927*eb00b1c8SRobert Mustacchi } 1928*eb00b1c8SRobert Mustacchi } 1929*eb00b1c8SRobert Mustacchi } 1930*eb00b1c8SRobert Mustacchi }, 1931*eb00b1c8SRobert Mustacchi .imc_sockets[2] = { 1932*eb00b1c8SRobert Mustacchi .isock_nodeid = 2, 1933*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 1934*eb00b1c8SRobert Mustacchi .isock_sad = { 1935*eb00b1c8SRobert Mustacchi .isad_flags = 0, 1936*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 1937*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 1938*eb00b1c8SRobert Mustacchi .isad_tohm = 0x280000000ULL, 1939*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 1940*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 1941*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1942*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000ULL, 1943*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1944*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1945*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 0, 0, 0, 0, 0, 0, 0 } 1946*eb00b1c8SRobert Mustacchi }, 1947*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 1948*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 1949*eb00b1c8SRobert Mustacchi .isr_limit = 0x280000000ULL, 1950*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 1951*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 1952*eb00b1c8SRobert Mustacchi .isr_targets = { 3, 3, 0, 0, 1, 1, 8, 9 } 1953*eb00b1c8SRobert Mustacchi }, 1954*eb00b1c8SRobert Mustacchi .isad_mcroute = { 1955*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 1956*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 }, 1957*eb00b1c8SRobert Mustacchi .ismc_mcroutes[1] = { 1, 0 } 1958*eb00b1c8SRobert Mustacchi } 1959*eb00b1c8SRobert Mustacchi }, 1960*eb00b1c8SRobert Mustacchi .isock_ntad = 2, 1961*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 1962*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1963*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1964*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1965*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1966*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1967*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1968*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1969*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1970*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1971*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1972*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1973*eb00b1c8SRobert Mustacchi }, 1974*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 1975*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 1976*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 1977*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1978*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1979*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1980*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1981*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1982*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1983*eb00b1c8SRobert Mustacchi } 1984*eb00b1c8SRobert Mustacchi 1985*eb00b1c8SRobert Mustacchi }, 1986*eb00b1c8SRobert Mustacchi .isock_tad[1] = { 1987*eb00b1c8SRobert Mustacchi .itad_flags = 0, 1988*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 1989*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 1990*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 1991*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 1992*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 1993*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 1994*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 1995*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 1996*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 1997*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 1998*eb00b1c8SRobert Mustacchi }, 1999*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 2000*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 2001*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 2002*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 2003*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 2004*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 2005*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 2006*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 2007*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 2008*eb00b1c8SRobert Mustacchi } 2009*eb00b1c8SRobert Mustacchi }, 2010*eb00b1c8SRobert Mustacchi .isock_nimc = 2, 2011*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 2012*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 2013*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 2014*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 2015*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 2016*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 2017*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 2018*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 2019*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 2020*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 2021*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 2022*eb00b1c8SRobert Mustacchi .idimm_width = 8, 2023*eb00b1c8SRobert Mustacchi .idimm_density = 2, 2024*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 2025*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 2026*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 2027*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 2028*eb00b1c8SRobert Mustacchi }, 2029*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 2030*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 2031*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 2032*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 2033*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 2034*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 2035*eb00b1c8SRobert Mustacchi .irle_nways = 1, 2036*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 2037*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 2038*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 2039*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 2040*eb00b1c8SRobert Mustacchi } 2041*eb00b1c8SRobert Mustacchi } 2042*eb00b1c8SRobert Mustacchi }, 2043*eb00b1c8SRobert Mustacchi .isock_imcs[1] = { 2044*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 2045*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 2046*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 2047*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 2048*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 2049*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 2050*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 2051*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 2052*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 2053*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 2054*eb00b1c8SRobert Mustacchi .idimm_width = 8, 2055*eb00b1c8SRobert Mustacchi .idimm_density = 2, 2056*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 2057*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 2058*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 2059*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 2060*eb00b1c8SRobert Mustacchi }, 2061*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 2062*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0, 0, 0, 0, 0, 2063*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0 }, 2064*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 2065*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 2066*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 2067*eb00b1c8SRobert Mustacchi .irle_nways = 1, 2068*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 2069*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 2070*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 2071*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 2072*eb00b1c8SRobert Mustacchi } 2073*eb00b1c8SRobert Mustacchi } 2074*eb00b1c8SRobert Mustacchi } 2075*eb00b1c8SRobert Mustacchi }, 2076*eb00b1c8SRobert Mustacchi .imc_sockets[3] = { 2077*eb00b1c8SRobert Mustacchi .isock_nodeid = 3, 2078*eb00b1c8SRobert Mustacchi .isock_valid = IMC_SOCKET_V_VALID, 2079*eb00b1c8SRobert Mustacchi .isock_sad = { 2080*eb00b1c8SRobert Mustacchi .isad_flags = 0, 2081*eb00b1c8SRobert Mustacchi .isad_valid = IMC_SAD_V_VALID, 2082*eb00b1c8SRobert Mustacchi .isad_tolm = 0x80000000, 2083*eb00b1c8SRobert Mustacchi .isad_tohm = 0x280000000ULL, 2084*eb00b1c8SRobert Mustacchi .isad_nrules = 24, 2085*eb00b1c8SRobert Mustacchi .isad_rules[0] = { 2086*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 2087*eb00b1c8SRobert Mustacchi .isr_limit = 0x80000000ULL, 2088*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 2089*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 2090*eb00b1c8SRobert Mustacchi .isr_targets = { 0, 0, 0, 0, 0, 0, 0, 0 } 2091*eb00b1c8SRobert Mustacchi }, 2092*eb00b1c8SRobert Mustacchi .isad_rules[1] = { 2093*eb00b1c8SRobert Mustacchi .isr_enable = B_TRUE, 2094*eb00b1c8SRobert Mustacchi .isr_limit = 0x280000000ULL, 2095*eb00b1c8SRobert Mustacchi .isr_imode = IMC_SAD_IMODE_32t30, 2096*eb00b1c8SRobert Mustacchi .isr_ntargets = IMC_MAX_SAD_INTERLEAVE, 2097*eb00b1c8SRobert Mustacchi .isr_targets = { 8, 9, 0, 0, 1, 1, 2, 2 } 2098*eb00b1c8SRobert Mustacchi }, 2099*eb00b1c8SRobert Mustacchi .isad_mcroute = { 2100*eb00b1c8SRobert Mustacchi .ismc_nroutes = 6, 2101*eb00b1c8SRobert Mustacchi .ismc_mcroutes[0] = { 0, 0 }, 2102*eb00b1c8SRobert Mustacchi .ismc_mcroutes[1] = { 1, 0 } 2103*eb00b1c8SRobert Mustacchi } 2104*eb00b1c8SRobert Mustacchi }, 2105*eb00b1c8SRobert Mustacchi .isock_ntad = 2, 2106*eb00b1c8SRobert Mustacchi .isock_tad[0] = { 2107*eb00b1c8SRobert Mustacchi .itad_flags = 0, 2108*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 2109*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 2110*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 2111*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 2112*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 2113*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 2114*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 2115*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 2116*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 2117*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 2118*eb00b1c8SRobert Mustacchi }, 2119*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 2120*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 2121*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 2122*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 2123*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 2124*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 2125*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 2126*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 2127*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 2128*eb00b1c8SRobert Mustacchi } 2129*eb00b1c8SRobert Mustacchi 2130*eb00b1c8SRobert Mustacchi }, 2131*eb00b1c8SRobert Mustacchi .isock_tad[1] = { 2132*eb00b1c8SRobert Mustacchi .itad_flags = 0, 2133*eb00b1c8SRobert Mustacchi .itad_nrules = 8, 2134*eb00b1c8SRobert Mustacchi .itad_rules[0] = { 2135*eb00b1c8SRobert Mustacchi .itr_base = 0x0, 2136*eb00b1c8SRobert Mustacchi .itr_limit = 0x80000000, 2137*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 2138*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 2139*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 2140*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 2141*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 2142*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 2143*eb00b1c8SRobert Mustacchi }, 2144*eb00b1c8SRobert Mustacchi .itad_rules[1] = { 2145*eb00b1c8SRobert Mustacchi .itr_base = 0x100000000ULL, 2146*eb00b1c8SRobert Mustacchi .itr_limit = 0x280000000ULL, 2147*eb00b1c8SRobert Mustacchi .itr_sock_way = 8, 2148*eb00b1c8SRobert Mustacchi .itr_chan_way = 1, 2149*eb00b1c8SRobert Mustacchi .itr_sock_gran = IMC_TAD_GRAN_1GB, 2150*eb00b1c8SRobert Mustacchi .itr_chan_gran = IMC_TAD_GRAN_64B, 2151*eb00b1c8SRobert Mustacchi .itr_ntargets = 4, 2152*eb00b1c8SRobert Mustacchi .itr_targets = { 0, 0, 0, 0 } 2153*eb00b1c8SRobert Mustacchi } 2154*eb00b1c8SRobert Mustacchi }, 2155*eb00b1c8SRobert Mustacchi .isock_nimc = 2, 2156*eb00b1c8SRobert Mustacchi .isock_imcs[0] = { 2157*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 2158*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 2159*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 2160*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 2161*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 2162*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 2163*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 2164*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 2165*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 2166*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 2167*eb00b1c8SRobert Mustacchi .idimm_width = 8, 2168*eb00b1c8SRobert Mustacchi .idimm_density = 2, 2169*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 2170*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 2171*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 2172*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 2173*eb00b1c8SRobert Mustacchi }, 2174*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 2175*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0x200000000ULL, 0, 0, 2176*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0, 0, 0 }, 2177*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 2178*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 2179*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 2180*eb00b1c8SRobert Mustacchi .irle_nways = 1, 2181*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 2182*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 2183*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 2184*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 2185*eb00b1c8SRobert Mustacchi } 2186*eb00b1c8SRobert Mustacchi } 2187*eb00b1c8SRobert Mustacchi }, 2188*eb00b1c8SRobert Mustacchi .isock_imcs[1] = { 2189*eb00b1c8SRobert Mustacchi .icn_nchannels = 1, 2190*eb00b1c8SRobert Mustacchi .icn_dimm_type = IMC_DIMM_DDR4, 2191*eb00b1c8SRobert Mustacchi .icn_ecc = B_TRUE, 2192*eb00b1c8SRobert Mustacchi .icn_lockstep = B_FALSE, 2193*eb00b1c8SRobert Mustacchi .icn_closed = B_FALSE, 2194*eb00b1c8SRobert Mustacchi .icn_channels[0] = { 2195*eb00b1c8SRobert Mustacchi .ich_ndimms = 1, 2196*eb00b1c8SRobert Mustacchi .ich_dimms[0] = { 2197*eb00b1c8SRobert Mustacchi .idimm_present = B_TRUE, 2198*eb00b1c8SRobert Mustacchi .idimm_nbanks = 3, 2199*eb00b1c8SRobert Mustacchi .idimm_width = 8, 2200*eb00b1c8SRobert Mustacchi .idimm_density = 2, 2201*eb00b1c8SRobert Mustacchi .idimm_nranks = 2, 2202*eb00b1c8SRobert Mustacchi .idimm_nrows = 14, 2203*eb00b1c8SRobert Mustacchi .idimm_ncolumns = 10, 2204*eb00b1c8SRobert Mustacchi .idimm_size = 0x40000000 2205*eb00b1c8SRobert Mustacchi }, 2206*eb00b1c8SRobert Mustacchi .ich_ntad_offsets = 12, 2207*eb00b1c8SRobert Mustacchi .ich_tad_offsets = { 0, 0x240000000ULL, 0, 0, 2208*eb00b1c8SRobert Mustacchi 0, 0, 0, 0, 0, 0, 0 }, 2209*eb00b1c8SRobert Mustacchi .ich_nrankileaves = 4, 2210*eb00b1c8SRobert Mustacchi .ich_rankileaves[0] = { 2211*eb00b1c8SRobert Mustacchi .irle_enabled = B_TRUE, 2212*eb00b1c8SRobert Mustacchi .irle_nways = 1, 2213*eb00b1c8SRobert Mustacchi .irle_nwaysbits = 1, 2214*eb00b1c8SRobert Mustacchi .irle_limit = 0x40000000, 2215*eb00b1c8SRobert Mustacchi .irle_nentries = 8, 2216*eb00b1c8SRobert Mustacchi .irle_entries[0] = { 0x0, 0x0 }, 2217*eb00b1c8SRobert Mustacchi } 2218*eb00b1c8SRobert Mustacchi } 2219*eb00b1c8SRobert Mustacchi } 2220*eb00b1c8SRobert Mustacchi }, 2221*eb00b1c8SRobert Mustacchi }; 2222*eb00b1c8SRobert Mustacchi 2223*eb00b1c8SRobert Mustacchi const imc_test_case_t imc_test_sad[] = { 2224*eb00b1c8SRobert Mustacchi /* 2225*eb00b1c8SRobert Mustacchi * This first set of tests just makes sure that we properly handle SAD 2226*eb00b1c8SRobert Mustacchi * interleaving rules and get routed to the right socket. 2227*eb00b1c8SRobert Mustacchi */ 2228*eb00b1c8SRobert Mustacchi { 2229*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 Interleave (1)", 2230*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_basic, 2231*eb00b1c8SRobert Mustacchi .itc_pa = 0x0, 2232*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2233*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2234*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2235*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2236*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0, 2237*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2238*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2239*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0 2240*eb00b1c8SRobert Mustacchi }, { 2241*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 Interleave (2)", 2242*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_basic, 2243*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345678, 2244*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2245*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2246*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2247*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2248*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91a2b38, 2249*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2250*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2251*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91a2b38 2252*eb00b1c8SRobert Mustacchi }, { 2253*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 Interleave (3)", 2254*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_basic, 2255*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345638, 2256*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2257*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2258*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2259*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2260*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91a2b38, 2261*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2262*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2263*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91a2b38 2264*eb00b1c8SRobert Mustacchi }, 2265*eb00b1c8SRobert Mustacchi /* 2266*eb00b1c8SRobert Mustacchi * This is the same as above, but uses a 4-socket configuration instead. 2267*eb00b1c8SRobert Mustacchi */ 2268*eb00b1c8SRobert Mustacchi { 2269*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 Interleave (1)", 2270*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_basic, 2271*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345638, 2272*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2273*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2274*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2275*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2276*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x48d15b8, 2277*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2278*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2279*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x48d15b8 2280*eb00b1c8SRobert Mustacchi }, { 2281*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 Interleave (2)", 2282*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_basic, 2283*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345678, 2284*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2285*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2286*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2287*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2288*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x48d15b8, 2289*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2290*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2291*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x48d15b8 2292*eb00b1c8SRobert Mustacchi }, { 2293*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 Interleave (3)", 2294*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_basic, 2295*eb00b1c8SRobert Mustacchi .itc_pa = 0x123456b8, 2296*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2297*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 2298*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2299*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2300*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x48d15b8, 2301*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2302*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2303*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x48d15b8 2304*eb00b1c8SRobert Mustacchi }, { 2305*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 Interleave (4)", 2306*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_basic, 2307*eb00b1c8SRobert Mustacchi .itc_pa = 0x123456f8, 2308*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2309*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 2310*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2311*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2312*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x48d15b8, 2313*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2314*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2315*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x48d15b8 2316*eb00b1c8SRobert Mustacchi }, 2317*eb00b1c8SRobert Mustacchi /* 2318*eb00b1c8SRobert Mustacchi * This is a variant on the basic 2s tests. XOR mode is enabled, so we use that 2319*eb00b1c8SRobert Mustacchi * to see that we actually have differences versus the basic 2s tests. 2320*eb00b1c8SRobert Mustacchi */ 2321*eb00b1c8SRobert Mustacchi { 2322*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (1)", 2323*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2324*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345638, 2325*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2326*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2327*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2328*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2329*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91a2b38, 2330*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2331*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2332*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91a2b38 2333*eb00b1c8SRobert Mustacchi }, { 2334*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (2)", 2335*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2336*eb00b1c8SRobert Mustacchi .itc_pa = 0x12345678, 2337*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2338*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2339*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2340*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2341*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91a2b38, 2342*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2343*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2344*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91a2b38 2345*eb00b1c8SRobert Mustacchi }, { 2346*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (3)", 2347*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2348*eb00b1c8SRobert Mustacchi .itc_pa = 0x12355638, 2349*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2350*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2351*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2352*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2353*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91aab38, 2354*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2355*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2356*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91aab38 2357*eb00b1c8SRobert Mustacchi }, { 2358*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (4)", 2359*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2360*eb00b1c8SRobert Mustacchi .itc_pa = 0x12355678, 2361*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2362*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2363*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2364*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2365*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91aab38, 2366*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2367*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2368*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91aab38 2369*eb00b1c8SRobert Mustacchi }, { 2370*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (5)", 2371*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2372*eb00b1c8SRobert Mustacchi .itc_pa = 0x12365638, 2373*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2374*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2375*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2376*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2377*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91b2b38, 2378*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2379*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2380*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91b2b38 2381*eb00b1c8SRobert Mustacchi }, { 2382*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (6)", 2383*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2384*eb00b1c8SRobert Mustacchi .itc_pa = 0x12365678, 2385*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2386*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2387*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2388*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2389*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91b2b38, 2390*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2391*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2392*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91b2b38 2393*eb00b1c8SRobert Mustacchi }, { 2394*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (7)", 2395*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2396*eb00b1c8SRobert Mustacchi .itc_pa = 0x12375638, 2397*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2398*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2399*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2400*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2401*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91bab38, 2402*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2403*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2404*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91bab38 2405*eb00b1c8SRobert Mustacchi }, { 2406*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR Interleave (8)", 2407*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_xor, 2408*eb00b1c8SRobert Mustacchi .itc_pa = 0x12375678, 2409*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2410*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2411*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2412*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2413*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x91bab38, 2414*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2415*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2416*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x91bab38 2417*eb00b1c8SRobert Mustacchi }, 2418*eb00b1c8SRobert Mustacchi /* 2419*eb00b1c8SRobert Mustacchi * Next, we're going to repeat the same initial set of tests that we had, but 2420*eb00b1c8SRobert Mustacchi * we're also going to turn on a7 mode. First up is the 2 socket case. 2421*eb00b1c8SRobert Mustacchi */ 2422*eb00b1c8SRobert Mustacchi { 2423*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 A7 Interleave (1)", 2424*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7, 2425*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342000f, 2426*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2427*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2428*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2429*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2430*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x11a1000f, 2431*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2432*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2433*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x11a1000f 2434*eb00b1c8SRobert Mustacchi }, { 2435*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 A7 Interleave (2)", 2436*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7, 2437*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342004f, 2438*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2439*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2440*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2441*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2442*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x11a1004f, 2443*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2444*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2445*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x11a1004f 2446*eb00b1c8SRobert Mustacchi }, { 2447*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 A7 Interleave (3)", 2448*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7, 2449*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342020f, 2450*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2451*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2452*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2453*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2454*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x11a1010f, 2455*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2456*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2457*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x11a1010f 2458*eb00b1c8SRobert Mustacchi }, { 2459*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 A7 Interleave (4)", 2460*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7, 2461*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342024f, 2462*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2463*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2464*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2465*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2466*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x11a1014f, 2467*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2468*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2469*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x11a1014f 2470*eb00b1c8SRobert Mustacchi }, 2471*eb00b1c8SRobert Mustacchi /* 2472*eb00b1c8SRobert Mustacchi * Next, we're going to repeat the same initial set of tests that we had, but 2473*eb00b1c8SRobert Mustacchi * we're also going to turn on a7 mode. First up is the 4 socket case. 2474*eb00b1c8SRobert Mustacchi */ 2475*eb00b1c8SRobert Mustacchi { 2476*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 A7 (1)", 2477*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_a7, 2478*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342000f, 2479*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2480*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2481*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2482*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2483*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08d0800f, 2484*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2485*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2486*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08d0800f 2487*eb00b1c8SRobert Mustacchi }, { 2488*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 A7 (2)", 2489*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_a7, 2490*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342008f, 2491*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2492*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 2493*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2494*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2495*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08d0800f, 2496*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2497*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2498*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08d0800f 2499*eb00b1c8SRobert Mustacchi }, { 2500*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 A7 (3)", 2501*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_a7, 2502*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342020f, 2503*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2504*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2505*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2506*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2507*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08d0808f, 2508*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2509*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2510*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08d0808f 2511*eb00b1c8SRobert Mustacchi }, { 2512*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 A7 (4)", 2513*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_a7, 2514*eb00b1c8SRobert Mustacchi .itc_pa = 0x2342028f, 2515*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2516*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 2517*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2518*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2519*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08d0808f, 2520*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2521*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2522*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08d0808f 2523*eb00b1c8SRobert Mustacchi }, { 2524*eb00b1c8SRobert Mustacchi .itc_desc = "4 Socket SAD 8-6 A7 (5)", 2525*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_a7, 2526*eb00b1c8SRobert Mustacchi .itc_pa = 0x23420f8f, 2527*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2528*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 2529*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2530*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2531*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08d0838f, 2532*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2533*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2534*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08d0838f 2535*eb00b1c8SRobert Mustacchi }, 2536*eb00b1c8SRobert Mustacchi /* 2537*eb00b1c8SRobert Mustacchi * 2 Socket 8-6 XOR mode, with a7 set. Here, we'll end up working through all of 2538*eb00b1c8SRobert Mustacchi * the XOR permutations to make sure that we're in good shape. 2539*eb00b1c8SRobert Mustacchi */ 2540*eb00b1c8SRobert Mustacchi { 2541*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (1)", 2542*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2543*eb00b1c8SRobert Mustacchi .itc_pa = 0x4200000b, 2544*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2545*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2546*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2547*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2548*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2100000b, 2549*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2550*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2551*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2100000b 2552*eb00b1c8SRobert Mustacchi }, { 2553*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (2)", 2554*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2555*eb00b1c8SRobert Mustacchi .itc_pa = 0x4200020b, 2556*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2557*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2558*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2559*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2560*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2100010b, 2561*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2562*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2563*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2100010b 2564*eb00b1c8SRobert Mustacchi }, { 2565*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (3)", 2566*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2567*eb00b1c8SRobert Mustacchi .itc_pa = 0x4201000b, 2568*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2569*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2570*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2571*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2572*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2100800b, 2573*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2574*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2575*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2100800b 2576*eb00b1c8SRobert Mustacchi }, { 2577*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (4)", 2578*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2579*eb00b1c8SRobert Mustacchi .itc_pa = 0x4201020b, 2580*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2581*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2582*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2583*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2584*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2100810b, 2585*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2586*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2587*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2100810b 2588*eb00b1c8SRobert Mustacchi }, { 2589*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (5)", 2590*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2591*eb00b1c8SRobert Mustacchi .itc_pa = 0x4202000b, 2592*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2593*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2594*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2595*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2596*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2101000b, 2597*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2598*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2599*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2101000b 2600*eb00b1c8SRobert Mustacchi }, { 2601*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (6)", 2602*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2603*eb00b1c8SRobert Mustacchi .itc_pa = 0x4202020b, 2604*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2605*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2606*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2607*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2608*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2101010b, 2609*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2610*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2611*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2101010b 2612*eb00b1c8SRobert Mustacchi }, { 2613*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (7)", 2614*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2615*eb00b1c8SRobert Mustacchi .itc_pa = 0x4203000b, 2616*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2617*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2618*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2619*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2620*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2101800b, 2621*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2622*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2623*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2101800b 2624*eb00b1c8SRobert Mustacchi }, { 2625*eb00b1c8SRobert Mustacchi .itc_desc = "2 Socket SAD 8-6 XOR A7 (8)", 2626*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_a7_xor, 2627*eb00b1c8SRobert Mustacchi .itc_pa = 0x4203020b, 2628*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2629*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2630*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2631*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2632*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2101810b, 2633*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2634*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2635*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2101810b 2636*eb00b1c8SRobert Mustacchi }, 2637*eb00b1c8SRobert Mustacchi /* 2638*eb00b1c8SRobert Mustacchi * This is a multi-rule SAD that alternates how we target socket interleaving 2639*eb00b1c8SRobert Mustacchi * depending on which address range we're at. 2640*eb00b1c8SRobert Mustacchi */ 2641*eb00b1c8SRobert Mustacchi { 2642*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (1)", 2643*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2644*eb00b1c8SRobert Mustacchi .itc_pa = 0x0ff60003, 2645*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2646*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2647*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2648*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2649*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x07fb0003, 2650*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2651*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2652*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x07fb0003 2653*eb00b1c8SRobert Mustacchi }, { 2654*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (2)", 2655*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2656*eb00b1c8SRobert Mustacchi .itc_pa = 0x0ff60043, 2657*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2658*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2659*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2660*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2661*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x07fb0003, 2662*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2663*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2664*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x07fb0003 2665*eb00b1c8SRobert Mustacchi }, { 2666*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (3)", 2667*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2668*eb00b1c8SRobert Mustacchi .itc_pa = 0x1ff60003, 2669*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2670*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2671*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2672*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2673*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0ffb0003, 2674*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2675*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2676*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0ffb0003 2677*eb00b1c8SRobert Mustacchi }, { 2678*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (4)", 2679*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2680*eb00b1c8SRobert Mustacchi .itc_pa = 0x1ff60043, 2681*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2682*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2683*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2684*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2685*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0ffb0003, 2686*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2687*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2688*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0ffb0003 2689*eb00b1c8SRobert Mustacchi }, { 2690*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (5)", 2691*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2692*eb00b1c8SRobert Mustacchi .itc_pa = 0x2ff60003, 2693*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2694*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2695*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2696*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2697*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x1ff60003, 2698*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2699*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2700*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x1ff60003 2701*eb00b1c8SRobert Mustacchi }, 2702*eb00b1c8SRobert Mustacchi { 2703*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (6)", 2704*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2705*eb00b1c8SRobert Mustacchi .itc_pa = 0x2ff60043, 2706*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2707*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2708*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2709*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2710*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x1ff60043, 2711*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2712*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2713*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x1ff60043 2714*eb00b1c8SRobert Mustacchi }, { 2715*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (7)", 2716*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2717*eb00b1c8SRobert Mustacchi .itc_pa = 0x3ff60003, 2718*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2719*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2720*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2721*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2722*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2ff60003, 2723*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2724*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2725*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2ff60003 2726*eb00b1c8SRobert Mustacchi }, { 2727*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (8)", 2728*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2729*eb00b1c8SRobert Mustacchi .itc_pa = 0x3ff60043, 2730*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2731*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2732*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2733*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2734*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2ff60043, 2735*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2736*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2737*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2ff60043 2738*eb00b1c8SRobert Mustacchi }, { 2739*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (9)", 2740*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2741*eb00b1c8SRobert Mustacchi .itc_pa = 0x4ff60003, 2742*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2743*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2744*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2745*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2746*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x1ff60003, 2747*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2748*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2749*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x1ff60003 2750*eb00b1c8SRobert Mustacchi }, { 2751*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (10)", 2752*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2753*eb00b1c8SRobert Mustacchi .itc_pa = 0x4ff60043, 2754*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2755*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2756*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2757*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2758*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x1ff60043, 2759*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2760*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2761*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x1ff60043 2762*eb00b1c8SRobert Mustacchi }, { 2763*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (11)", 2764*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2765*eb00b1c8SRobert Mustacchi .itc_pa = 0x5ff60003, 2766*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2767*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2768*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2769*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2770*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2ff60003, 2771*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2772*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2773*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2ff60003 2774*eb00b1c8SRobert Mustacchi }, { 2775*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (12)", 2776*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2777*eb00b1c8SRobert Mustacchi .itc_pa = 0x5ff60043, 2778*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2779*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2780*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2781*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2782*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x2ff60043, 2783*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2784*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2785*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x2ff60043 2786*eb00b1c8SRobert Mustacchi }, { 2787*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (13)", 2788*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2789*eb00b1c8SRobert Mustacchi .itc_pa = 0x6ff60003, 2790*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2791*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2792*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2793*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2794*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x37fb0003, 2795*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2796*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2797*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x37fb0003 2798*eb00b1c8SRobert Mustacchi }, { 2799*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (14)", 2800*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2801*eb00b1c8SRobert Mustacchi .itc_pa = 0x6ff60043, 2802*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2803*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2804*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2805*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2806*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x37fb0003, 2807*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2808*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2809*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x37fb0003 2810*eb00b1c8SRobert Mustacchi }, { 2811*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (15)", 2812*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2813*eb00b1c8SRobert Mustacchi .itc_pa = 0x7ff60003, 2814*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2815*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2816*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2817*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2818*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x3ffb0003, 2819*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2820*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2821*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x3ffb0003 2822*eb00b1c8SRobert Mustacchi }, { 2823*eb00b1c8SRobert Mustacchi .itc_desc = "SAD Multi-rule (16)", 2824*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_multirule, 2825*eb00b1c8SRobert Mustacchi .itc_pa = 0x7ff60043, 2826*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2827*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2828*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2829*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2830*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x3ffb0003, 2831*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2832*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2833*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x3ffb0003 2834*eb00b1c8SRobert Mustacchi }, 2835*eb00b1c8SRobert Mustacchi /* 2836*eb00b1c8SRobert Mustacchi * Verify that SAD interleaving at 10-8 works. 2837*eb00b1c8SRobert Mustacchi */ 2838*eb00b1c8SRobert Mustacchi { 2839*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (1)", 2840*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2841*eb00b1c8SRobert Mustacchi .itc_pa = 0x11220000, 2842*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2843*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2844*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2845*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2846*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910000, 2847*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2848*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2849*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910000 2850*eb00b1c8SRobert Mustacchi }, { 2851*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (2)", 2852*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2853*eb00b1c8SRobert Mustacchi .itc_pa = 0x11220100, 2854*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2855*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2856*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2857*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2858*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910000, 2859*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2860*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2861*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910000 2862*eb00b1c8SRobert Mustacchi }, { 2863*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (3)", 2864*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2865*eb00b1c8SRobert Mustacchi .itc_pa = 0x112200ff, 2866*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2867*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2868*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2869*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2870*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089100ff, 2871*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2872*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2873*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089100ff 2874*eb00b1c8SRobert Mustacchi }, { 2875*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (4)", 2876*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2877*eb00b1c8SRobert Mustacchi .itc_pa = 0x112201ff, 2878*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2879*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2880*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2881*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2882*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089100ff, 2883*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2884*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2885*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089100ff 2886*eb00b1c8SRobert Mustacchi }, { 2887*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (5)", 2888*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2889*eb00b1c8SRobert Mustacchi .itc_pa = 0x7ffffeff, 2890*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2891*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2892*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2893*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2894*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x3fffffff, 2895*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2896*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2897*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x3fffffff 2898*eb00b1c8SRobert Mustacchi }, { 2899*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 10-8 (6)", 2900*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_2s_skx_10t8, 2901*eb00b1c8SRobert Mustacchi .itc_pa = 0x7fffffff, 2902*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2903*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 2904*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2905*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2906*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x3fffffff, 2907*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2908*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2909*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x3fffffff 2910*eb00b1c8SRobert Mustacchi }, 2911*eb00b1c8SRobert Mustacchi /* 2912*eb00b1c8SRobert Mustacchi * Again with SKX; however, now with 15-12. 2913*eb00b1c8SRobert Mustacchi */ 2914*eb00b1c8SRobert Mustacchi { 2915*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (1)", 2916*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2917*eb00b1c8SRobert Mustacchi .itc_pa = 0x11220000, 2918*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2919*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2920*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2921*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2922*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910000, 2923*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2924*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2925*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910000 2926*eb00b1c8SRobert Mustacchi }, { 2927*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (2)", 2928*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2929*eb00b1c8SRobert Mustacchi .itc_pa = 0x11220100, 2930*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2931*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2932*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2933*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2934*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910100, 2935*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2936*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2937*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910100 2938*eb00b1c8SRobert Mustacchi }, { 2939*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (3)", 2940*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2941*eb00b1c8SRobert Mustacchi .itc_pa = 0x112200ff, 2942*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2943*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2944*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2945*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2946*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089100ff, 2947*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2948*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2949*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089100ff 2950*eb00b1c8SRobert Mustacchi }, { 2951*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (4)", 2952*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2953*eb00b1c8SRobert Mustacchi .itc_pa = 0x112201ff, 2954*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2955*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2956*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 2957*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2958*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089101ff, 2959*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2960*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2961*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089101ff 2962*eb00b1c8SRobert Mustacchi }, { 2963*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (5)", 2964*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2965*eb00b1c8SRobert Mustacchi .itc_pa = 0x11221000, 2966*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2967*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2968*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 2969*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2970*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910000, 2971*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2972*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2973*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910000 2974*eb00b1c8SRobert Mustacchi }, { 2975*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (6)", 2976*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2977*eb00b1c8SRobert Mustacchi .itc_pa = 0x11221100, 2978*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2979*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2980*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 2981*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2982*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x08910100, 2983*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2984*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2985*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x08910100 2986*eb00b1c8SRobert Mustacchi }, { 2987*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (7)", 2988*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 2989*eb00b1c8SRobert Mustacchi .itc_pa = 0x112210ff, 2990*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 2991*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 2992*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 2993*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 2994*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089100ff, 2995*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 2996*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 2997*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089100ff 2998*eb00b1c8SRobert Mustacchi }, { 2999*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 2s SKX 14-12 (8)", 3000*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_1s_skx_14t12, 3001*eb00b1c8SRobert Mustacchi .itc_pa = 0x112211ff, 3002*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3003*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 3004*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3005*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3006*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x089101ff, 3007*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3008*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3009*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x089101ff 3010*eb00b1c8SRobert Mustacchi }, 3011*eb00b1c8SRobert Mustacchi /* 3012*eb00b1c8SRobert Mustacchi * This set covers using an 8-way socket granularity on Skylake. This means that 3013*eb00b1c8SRobert Mustacchi * we have two IMCs per socket as well. We're also using 1 GiB granularity here. 3014*eb00b1c8SRobert Mustacchi * So we want to verify that is working as well. 3015*eb00b1c8SRobert Mustacchi */ 3016*eb00b1c8SRobert Mustacchi { 3017*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (1)", 3018*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3019*eb00b1c8SRobert Mustacchi .itc_pa = 0x0badcafe, 3020*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3021*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 3022*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3023*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3024*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3025*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3026*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3027*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3028*eb00b1c8SRobert Mustacchi }, { 3029*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (2)", 3030*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3031*eb00b1c8SRobert Mustacchi .itc_pa = 0x4badcafe, 3032*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3033*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 3034*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3035*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3036*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3037*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3038*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3039*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3040*eb00b1c8SRobert Mustacchi }, { 3041*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (3)", 3042*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3043*eb00b1c8SRobert Mustacchi .itc_pa = 0x10badcafeULL, 3044*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3045*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 3046*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3047*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3048*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3049*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3050*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3051*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3052*eb00b1c8SRobert Mustacchi }, { 3053*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (4)", 3054*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3055*eb00b1c8SRobert Mustacchi .itc_pa = 0x14badcafeULL, 3056*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3057*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 3058*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3059*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3060*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3061*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3062*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3063*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3064*eb00b1c8SRobert Mustacchi }, { 3065*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (5)", 3066*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3067*eb00b1c8SRobert Mustacchi .itc_pa = 0x18badcafeULL, 3068*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3069*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 3070*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3071*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3072*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3073*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3074*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3075*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3076*eb00b1c8SRobert Mustacchi }, { 3077*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (6)", 3078*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3079*eb00b1c8SRobert Mustacchi .itc_pa = 0x1cbadcafeULL, 3080*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3081*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 3082*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3083*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3084*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3085*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3086*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3087*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3088*eb00b1c8SRobert Mustacchi }, { 3089*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (7)", 3090*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3091*eb00b1c8SRobert Mustacchi .itc_pa = 0x20badcafeULL, 3092*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3093*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 3094*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3095*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3096*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3097*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3098*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3099*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3100*eb00b1c8SRobert Mustacchi }, { 3101*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (8)", 3102*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3103*eb00b1c8SRobert Mustacchi .itc_pa = 0x24badcafeULL, 3104*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3105*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 3106*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3107*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3108*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badcafe, 3109*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3110*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3111*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badcafe 3112*eb00b1c8SRobert Mustacchi }, 3113*eb00b1c8SRobert Mustacchi 3114*eb00b1c8SRobert Mustacchi { 3115*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (9)", 3116*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3117*eb00b1c8SRobert Mustacchi .itc_pa = 0x0badca77, 3118*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3119*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 3120*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3121*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3122*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3123*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3124*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3125*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3126*eb00b1c8SRobert Mustacchi }, { 3127*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (10)", 3128*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3129*eb00b1c8SRobert Mustacchi .itc_pa = 0x4badca77, 3130*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3131*eb00b1c8SRobert Mustacchi .itc_nodeid = 0, 3132*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3133*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3134*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3135*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3136*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3137*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3138*eb00b1c8SRobert Mustacchi }, { 3139*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (11)", 3140*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3141*eb00b1c8SRobert Mustacchi .itc_pa = 0x10badca77ULL, 3142*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3143*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 3144*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3145*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3146*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3147*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3148*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3149*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3150*eb00b1c8SRobert Mustacchi }, { 3151*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (12)", 3152*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3153*eb00b1c8SRobert Mustacchi .itc_pa = 0x14badca77ULL, 3154*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3155*eb00b1c8SRobert Mustacchi .itc_nodeid = 1, 3156*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3157*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3158*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3159*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3160*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3161*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3162*eb00b1c8SRobert Mustacchi }, { 3163*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (13)", 3164*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3165*eb00b1c8SRobert Mustacchi .itc_pa = 0x18badca77ULL, 3166*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3167*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 3168*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3169*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3170*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3171*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3172*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3173*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3174*eb00b1c8SRobert Mustacchi }, { 3175*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (14)", 3176*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3177*eb00b1c8SRobert Mustacchi .itc_pa = 0x1cbadca77ULL, 3178*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3179*eb00b1c8SRobert Mustacchi .itc_nodeid = 2, 3180*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3181*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3182*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3183*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3184*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3185*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3186*eb00b1c8SRobert Mustacchi }, { 3187*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (15)", 3188*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3189*eb00b1c8SRobert Mustacchi .itc_pa = 0x20badca77ULL, 3190*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3191*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 3192*eb00b1c8SRobert Mustacchi .itc_tadid = 0, 3193*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3194*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3195*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3196*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3197*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3198*eb00b1c8SRobert Mustacchi }, { 3199*eb00b1c8SRobert Mustacchi .itc_desc = "SAD 4s 8-way SKX 32-30 (16)", 3200*eb00b1c8SRobert Mustacchi .itc_imc = &imc_sad_4s_8w_skx_32t30, 3201*eb00b1c8SRobert Mustacchi .itc_pa = 0x24badca77ULL, 3202*eb00b1c8SRobert Mustacchi .itc_pass = B_TRUE, 3203*eb00b1c8SRobert Mustacchi .itc_nodeid = 3, 3204*eb00b1c8SRobert Mustacchi .itc_tadid = 1, 3205*eb00b1c8SRobert Mustacchi .itc_channelid = 0, 3206*eb00b1c8SRobert Mustacchi .itc_chanaddr = 0x0badca77, 3207*eb00b1c8SRobert Mustacchi .itc_dimmid = 0, 3208*eb00b1c8SRobert Mustacchi .itc_rankid = 0, 3209*eb00b1c8SRobert Mustacchi .itc_rankaddr = 0x0badca77 3210*eb00b1c8SRobert Mustacchi }, { 3211*eb00b1c8SRobert Mustacchi .itc_desc = NULL 3212*eb00b1c8SRobert Mustacchi } }; 3213