1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*
28  * Copyright 2011, Richard Lowe.
29  */
30 
31 #ifndef _LIBM_INLINES_H
32 #define	_LIBM_INLINES_H
33 
34 #ifdef __GNUC__
35 
36 #include <sys/types.h>
37 #include <sys/ieeefp.h>
38 
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 extern __GNU_INLINE enum fp_class_type
fp_classf(float f)44 fp_classf(float f)
45 {
46 	enum fp_class_type ret;
47 	int fint;		/* scratch for f as int */
48 	uint64_t tmp;
49 
50 	__asm__ __volatile__(
51 	    "fabss  %3,%3\n\t"
52 	    "st	    %3,%1\n\t"
53 	    "ld	    %1,%0\n\t"
54 	    "orcc   %%g0,%0,%%g0\n\t"
55 	    "be,pn  %%icc,2f\n\t"
56 	    "nop\n\t"
57 	    "1:\n\t"
58 	    "sethi  %%hi(0x7f800000),%2\n\t"
59 	    "andcc  %0,%2,%%g0\n\t"
60 	    "bne,pt %%icc,1f\n\t"
61 	    "nop\n\t"
62 	    "or	    %%g0,1,%0\n\t"
63 	    "ba	    2f\n\t"	/* subnormal */
64 	    "nop\n\t"
65 	    "1:\n\t"
66 	    "subcc  %0,%2,%%g0\n\t"
67 	    "bge,pn %%icc,1f\n\t"
68 	    "nop\n\t"
69 	    "or	    %%g0,2,%0\n\t"
70 	    "ba	    2f\n\t"	/* normal */
71 	    "nop\n\t"
72 	    "1:\n\t"
73 	    "bg,pn  %%icc,1f\n\t"
74 	    "nop\n\t"
75 	    "or	    %%g0,3,%0\n\t"
76 	    "ba	    2f\n\t"	/* infinity */
77 	    "nop\n\t"
78 	    "1:\n\t"
79 	    "sethi  %%hi(0x00400000),%2\n\t"
80 	    "andcc  %0,%2,%%g0\n\t"
81 	    "or	    %%g0,4,%0\n\t"
82 	    "bne,pt %%icc,2f\n\t" /* quiet NaN */
83 	    "nop\n\t"
84 	    "or	    %%g0,5,%0\n\t" /* signalling NaN */
85 	    "2:\n\t"
86 	    : "=r" (ret), "=m" (fint), "=r" (tmp), "+f" (f)
87 	    :
88 	    : "cc");
89 
90 	return (ret);
91 }
92 
93 extern __GNU_INLINE enum fp_class_type
fp_class(double d)94 fp_class(double d)
95 {
96 	enum fp_class_type ret;
97 	uint64_t dint;		/* Scratch for d-as-long */
98 	uint64_t tmp;
99 
100 	__asm__ __volatile__(
101 	    "fabsd  %3,%3\n\t"
102 	    "std    %3,%1\n\t"
103 	    "ldx    %1,%0\n\t"
104 	    "orcc   %%g0,%0,%%g0\n\t"
105 	    "be,pn  %%xcc,2f\n\t"
106 	    "nop\n\t"
107 	    "sethi  %%hi(0x7ff00000),%2\n\t"
108 	    "sllx   %2,32,%2\n\t"
109 	    "andcc  %0,%2,%%g0\n\t"
110 	    "bne,pt %%xcc,1f\n\t"
111 	    "nop\n\t"
112 	    "or	    %%g0,1,%0\n\t"
113 	    "ba	    2f\n\t"
114 	    "nop\n\t"
115 	    "1:\n\t"
116 	    "subcc  %0,%2,%%g0\n\t"
117 	    "bge,pn %%xcc,1f\n\t"
118 	    "nop\n\t"
119 	    "or	    %%g0,2,%0\n\t"
120 	    "ba	    2f\n\t"
121 	    "nop\n\t"
122 	    "1:\n\t"
123 	    "andncc %0,%2,%0\n\t"
124 	    "bne,pn %%xcc,1f\n\t"
125 	    "nop\n\t"
126 	    "or	    %%g0,3,%0\n\t"
127 	    "ba	    2f\n\t"
128 	    "nop\n\t"
129 	    "1:\n\t"
130 	    "sethi  %%hi(0x00080000),%2\n\t"
131 	    "sllx   %2,32,%2\n\t"
132 	    "andcc  %0,%2,%%g0\n\t"
133 	    "or	    %%g0,4,%0\n\t"
134 	    "bne,pt %%xcc,2f\n\t"
135 	    "nop\n\t"
136 	    "or	    %%g0,5,%0\n\t"
137 	    "2:\n\t"
138 	    : "=r" (ret), "=m" (dint), "=r" (tmp), "+e" (d)
139 	    :
140 	    : "cc");
141 
142 	return (ret);
143 }
144 
145 extern __GNU_INLINE float
__inline_sqrtf(float f)146 __inline_sqrtf(float f)
147 {
148 	float ret;
149 
150 	__asm__ __volatile__("fsqrts %1,%0\n\t" : "=f" (ret) : "f" (f));
151 	return (ret);
152 }
153 
154 extern __GNU_INLINE double
__inline_sqrt(double d)155 __inline_sqrt(double d)
156 {
157 	double ret;
158 
159 	__asm__ __volatile__("fsqrtd %1,%0\n\t" : "=f" (ret) : "f" (d));
160 	return (ret);
161 }
162 
163 extern __GNU_INLINE int
__swapEX(int i)164 __swapEX(int i)
165 {
166 	int ret;
167 	uint32_t fsr;
168 	uint64_t tmp1, tmp2;
169 
170 	__asm__ __volatile__(
171 	    "and  %4,0x1f,%2\n\t"
172 	    "sll  %2,5,%2\n\t"	/* shift input to aexc bit location */
173 	    ".volatile\n\t"
174 	    "st   %%fsr,%1\n\t"
175 	    "ld	  %1,%0\n\t"	/* %0 = fsr */
176 	    "andn %0,0x3e0,%3\n\t"
177 	    "or   %2,%3,%2\n\t"	/* %2 = new fsr */
178 	    "st	  %2,%1\n\t"
179 	    "ld	  %1,%%fsr\n\t"
180 	    "srl  %0,5,%0\n\t"
181 	    "and  %0,0x1f,%0\n\t"
182 	    ".nonvolatile\n\t"
183 	    : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2)
184 	    : "r" (i)
185 	    : "cc");
186 
187 	return (ret);
188 }
189 
190 /*
191  * On the SPARC, __swapRP is a no-op; always return 0 for backward
192  * compatibility
193  */
194 /* ARGSUSED */
195 extern __GNU_INLINE enum fp_precision_type
__swapRP(enum fp_precision_type i)196 __swapRP(enum fp_precision_type i)
197 {
198 	return (0);
199 }
200 
201 extern __GNU_INLINE enum fp_direction_type
__swapRD(enum fp_direction_type d)202 __swapRD(enum fp_direction_type d)
203 {
204 	enum fp_direction_type ret;
205 	uint32_t fsr;
206 	uint64_t tmp1, tmp2, tmp3;
207 
208 	__asm__ __volatile__(
209 	    "and   %5,0x3,%0\n\t"
210 	    "sll   %0,30,%2\n\t"	/* shift input to RD bit location */
211 	    ".volatile\n\t"
212 	    "st    %%fsr,%1\n\t"
213 	    "ld	   %1,%0\n\t"		/* %0 = fsr */
214 	    /* mask of rounding direction bits */
215 	    "sethi %%hi(0xc0000000),%4\n\t"
216 	    "andn  %0,%4,%3\n\t"
217 	    "or    %2,%3,%2\n\t"	/* %2 = new fsr */
218 	    "st	   %2,%1\n\t"
219 	    "ld	   %1,%%fsr\n\t"
220 	    "srl   %0,30,%0\n\t"
221 	    "and   %0,0x3,%0\n\t"
222 	    ".nonvolatile\n\t"
223 	    : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
224 	    : "r" (d)
225 	    : "cc");
226 
227 	return (ret);
228 }
229 
230 extern __GNU_INLINE int
__swapTE(int i)231 __swapTE(int i)
232 {
233 	int ret;
234 	uint32_t fsr;
235 	uint64_t tmp1, tmp2, tmp3;
236 
237 	__asm__ __volatile__(
238 	    "and   %5,0x1f,%0\n\t"
239 	    "sll   %0,23,%2\n\t"	/* shift input to TEM bit location */
240 	    ".volatile\n\t"
241 	    "st    %%fsr,%1\n\t"
242 	    "ld	   %1,%0\n\t"		/* %0 = fsr */
243 	    /* mask of TEM (Trap Enable Mode bits) */
244 	    "sethi %%hi(0x0f800000),%4\n\t"
245 	    "andn  %0,%4,%3\n\t"
246 	    "or    %2,%3,%2\n\t"	/* %2 = new fsr */
247 	    "st	   %2,%1\n\t"
248 	    "ld	   %1,%%fsr\n\t"
249 	    "srl   %0,23,%0\n\t"
250 	    "and   %0,0x1f,%0\n\t"
251 	    ".nonvolatile\n\t"
252 	    : "=r" (ret), "=m" (fsr), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3)
253 	    : "r" (i)
254 	    : "cc");
255 
256 	return (ret);
257 }
258 
259 
260 extern __GNU_INLINE double
sqrt(double d)261 sqrt(double d)
262 {
263 	return (__inline_sqrt(d));
264 }
265 
266 extern __GNU_INLINE float
sqrtf(float f)267 sqrtf(float f)
268 {
269 	return (__inline_sqrtf(f));
270 }
271 
272 extern __GNU_INLINE double
fabs(double d)273 fabs(double d)
274 {
275 	double ret;
276 
277 	__asm__ __volatile__("fabsd %1,%0\n\t" : "=e" (ret) : "e" (d));
278 	return (ret);
279 }
280 
281 extern __GNU_INLINE float
fabsf(float f)282 fabsf(float f)
283 {
284 	float ret;
285 
286 	__asm__ __volatile__("fabss %1,%0\n\t" : "=f" (ret) : "f" (f));
287 	return (ret);
288 }
289 
290 #ifdef __cplusplus
291 }
292 #endif
293 
294 #endif  /* __GNUC__ */
295 
296 #endif /* _LIBM_INLINES_H */
297