1d0b3732eSbholler /* 2d0b3732eSbholler * CDDL HEADER START 3d0b3732eSbholler * 4d0b3732eSbholler * The contents of this file are subject to the terms of the 5d0b3732eSbholler * Common Development and Distribution License (the "License"). 6d0b3732eSbholler * You may not use this file except in compliance with the License. 7d0b3732eSbholler * 8d0b3732eSbholler * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9d0b3732eSbholler * or http://www.opensolaris.org/os/licensing. 10d0b3732eSbholler * See the License for the specific language governing permissions 11d0b3732eSbholler * and limitations under the License. 12d0b3732eSbholler * 13d0b3732eSbholler * When distributing Covered Code, include this CDDL HEADER in each 14d0b3732eSbholler * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15d0b3732eSbholler * If applicable, add the following below this CDDL HEADER, with the 16d0b3732eSbholler * fields enclosed by brackets "[]" replaced with your own identifying 17d0b3732eSbholler * information: Portions Copyright [yyyy] [name of copyright owner] 18d0b3732eSbholler * 19d0b3732eSbholler * CDDL HEADER END 20d0b3732eSbholler */ 21d0b3732eSbholler 22d0b3732eSbholler /* 23*533d3a49SEdward Gillett * Copyright (c) 2009, Intel Corporation 24d0b3732eSbholler * All rights reserved. 25d0b3732eSbholler */ 26d0b3732eSbholler 27fad5204eSbostrovs /* 28fad5204eSbostrovs * Portions Copyright 2009 Advanced Micro Devices, Inc. 29fad5204eSbostrovs */ 30fad5204eSbostrovs 31d0b3732eSbholler #ifndef _PROC64_ID_H 32d0b3732eSbholler #define _PROC64_ID_H 33d0b3732eSbholler 34d0b3732eSbholler #include <sys/x86_archext.h> 35d0b3732eSbholler 36d0b3732eSbholler #ifdef __cplusplus 37d0b3732eSbholler extern "C" { 38d0b3732eSbholler #endif 39d0b3732eSbholler 40d0b3732eSbholler /* 41*533d3a49SEdward Gillett * Defines to determine what SSE instructions can be used for memops or strops 42d0b3732eSbholler */ 43d0b3732eSbholler #define NO_SSE 0x00 /* Default -- Don't use SSE instructions */ 44d0b3732eSbholler #define USE_SSE2 0x01 /* SSE2 */ 45d0b3732eSbholler #define USE_SSE3 0x02 /* SSE3 */ 46d0b3732eSbholler #define USE_SSSE3 0x04 /* Supplemental SSE3 */ 47d0b3732eSbholler #define USE_SSE4_1 0x08 /* SSE 4.1 */ 48d0b3732eSbholler #define USE_SSE4_2 0x10 /* SSE 4.2 */ 49*533d3a49SEdward Gillett #define USE_BSF 0x20 /* USE BSF class of instructions */ 50d0b3732eSbholler 51d0b3732eSbholler /* 52d0b3732eSbholler * Cache size defaults for Core 2 Duo 53d0b3732eSbholler */ 54d0b3732eSbholler #define INTEL_DFLT_L1_CACHE_SIZE (32 * 1024) 55d0b3732eSbholler #define INTEL_DFLT_L2_CACHE_SIZE (4 * 1024 * 1024) 56d0b3732eSbholler #define INTEL_DFLT_LARGEST_CACHE_SIZE (4 * 1024 * 1024) 57d0b3732eSbholler 58d0b3732eSbholler /* 59d0b3732eSbholler * Cache size defaults for AMD SledgeHammer 60d0b3732eSbholler */ 61d0b3732eSbholler #define AMD_DFLT_L1_CACHE_SIZE (64 * 1024) 62d0b3732eSbholler #define AMD_DFLT_L2_CACHE_SIZE (1024 * 1024) 63d0b3732eSbholler 64d0b3732eSbholler #ifdef _ASM 65d0b3732eSbholler .extern .memops_method 66d0b3732eSbholler #else 67d0b3732eSbholler 68d0b3732eSbholler void __libc_get_cpuid(int cpuid_function, void *out_reg, int cache_index); 69d0b3732eSbholler void __intel_set_memops_method(long sse_level); 70fad5204eSbostrovs void __set_cache_sizes(long l1_cache_size, long l2_cache_size, 71d0b3732eSbholler long largest_level_cache); 72d0b3732eSbholler 73d0b3732eSbholler #endif /* _ASM */ 74d0b3732eSbholler 75d0b3732eSbholler #ifdef __cplusplus 76d0b3732eSbholler } 77d0b3732eSbholler #endif 78d0b3732eSbholler 79d0b3732eSbholler #endif /* _PROC64_ID_H */ 80