17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate * GRUB -- GRand Unified Bootloader
3*1b8adde7SWilliam Kucharski * Copyright (C) 1999,2005,2005 Free Software Foundation, Inc.
47c478bd9Sstevel@tonic-gate *
57c478bd9Sstevel@tonic-gate * This program is free software; you can redistribute it and/or modify
67c478bd9Sstevel@tonic-gate * it under the terms of the GNU General Public License as published by
77c478bd9Sstevel@tonic-gate * the Free Software Foundation; either version 2 of the License, or
87c478bd9Sstevel@tonic-gate * (at your option) any later version.
97c478bd9Sstevel@tonic-gate *
107c478bd9Sstevel@tonic-gate * This program is distributed in the hope that it will be useful,
117c478bd9Sstevel@tonic-gate * but WITHOUT ANY WARRANTY; without even the implied warranty of
127c478bd9Sstevel@tonic-gate * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
137c478bd9Sstevel@tonic-gate * GNU General Public License for more details.
147c478bd9Sstevel@tonic-gate *
157c478bd9Sstevel@tonic-gate * You should have received a copy of the GNU General Public License
167c478bd9Sstevel@tonic-gate * along with this program; if not, write to the Free Software
177c478bd9Sstevel@tonic-gate * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
187c478bd9Sstevel@tonic-gate */
197c478bd9Sstevel@tonic-gate
207c478bd9Sstevel@tonic-gate /*
217c478bd9Sstevel@tonic-gate * <Insert copyright here : it must be BSD-like so anyone can use it>
227c478bd9Sstevel@tonic-gate *
237c478bd9Sstevel@tonic-gate * Author: Erich Boleyn <erich@uruk.org> http://www.uruk.org/~erich/
247c478bd9Sstevel@tonic-gate *
257c478bd9Sstevel@tonic-gate * Source file implementing Intel MultiProcessor Specification (MPS)
267c478bd9Sstevel@tonic-gate * version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
277c478bd9Sstevel@tonic-gate * with hooks for running correctly on a standard PC without the hardware.
287c478bd9Sstevel@tonic-gate *
297c478bd9Sstevel@tonic-gate * This file was created from information in the Intel MPS version 1.4
307c478bd9Sstevel@tonic-gate * document, order number 242016-004, which can be ordered from the
317c478bd9Sstevel@tonic-gate * Intel literature center.
327c478bd9Sstevel@tonic-gate *
337c478bd9Sstevel@tonic-gate * General limitations of this code:
347c478bd9Sstevel@tonic-gate *
357c478bd9Sstevel@tonic-gate * (1) : This code has never been tested on an MPS-compatible system with
367c478bd9Sstevel@tonic-gate * 486 CPUs, but is expected to work.
377c478bd9Sstevel@tonic-gate * (2) : Presumes "int", "long", and "unsigned" are 32 bits in size, and
387c478bd9Sstevel@tonic-gate * that 32-bit pointers and memory addressing is used uniformly.
397c478bd9Sstevel@tonic-gate */
407c478bd9Sstevel@tonic-gate
417c478bd9Sstevel@tonic-gate #define _SMP_IMPS_C
427c478bd9Sstevel@tonic-gate
437c478bd9Sstevel@tonic-gate
447c478bd9Sstevel@tonic-gate /*
457c478bd9Sstevel@tonic-gate * XXXXX The following absolutely must be defined!!!
467c478bd9Sstevel@tonic-gate *
477c478bd9Sstevel@tonic-gate * The "KERNEL_PRINT" could be made a null macro with no danger, of
487c478bd9Sstevel@tonic-gate * course, but pretty much nothing would work without the other
497c478bd9Sstevel@tonic-gate * ones defined.
507c478bd9Sstevel@tonic-gate */
517c478bd9Sstevel@tonic-gate
527c478bd9Sstevel@tonic-gate #if 0
537c478bd9Sstevel@tonic-gate #define KERNEL_PRINT(x) /* some kind of print function */
547c478bd9Sstevel@tonic-gate #define CMOS_WRITE_BYTE(x,y) /* write unsigned char "y" at CMOS loc "x" */
557c478bd9Sstevel@tonic-gate #define CMOS_READ_BYTE(x) /* read unsigned char at CMOS loc "x" */
567c478bd9Sstevel@tonic-gate #define PHYS_TO_VIRTUAL(x) /* convert physical address "x" to virtual */
577c478bd9Sstevel@tonic-gate #define VIRTUAL_TO_PHYS(x) /* convert virtual address "x" to physical */
587c478bd9Sstevel@tonic-gate #endif
597c478bd9Sstevel@tonic-gate
607c478bd9Sstevel@tonic-gate
617c478bd9Sstevel@tonic-gate /*
627c478bd9Sstevel@tonic-gate * This is the Intel MultiProcessor Spec debugging/display code.
637c478bd9Sstevel@tonic-gate */
647c478bd9Sstevel@tonic-gate
657c478bd9Sstevel@tonic-gate #define IMPS_DEBUG
667c478bd9Sstevel@tonic-gate #define KERNEL_PRINT(x) printf x
677c478bd9Sstevel@tonic-gate #define CMOS_WRITE_BYTE(x, y) cmos_write_byte(x, y)
687c478bd9Sstevel@tonic-gate #define CMOS_READ_BYTE(x) cmos_read_byte(x)
697c478bd9Sstevel@tonic-gate #define PHYS_TO_VIRTUAL(x) (x)
707c478bd9Sstevel@tonic-gate #define VIRTUAL_TO_PHYS(x) (x)
717c478bd9Sstevel@tonic-gate
727c478bd9Sstevel@tonic-gate static inline unsigned char
inb(unsigned short port)737c478bd9Sstevel@tonic-gate inb (unsigned short port)
747c478bd9Sstevel@tonic-gate {
757c478bd9Sstevel@tonic-gate unsigned char data;
767c478bd9Sstevel@tonic-gate
777c478bd9Sstevel@tonic-gate __asm __volatile ("inb %1,%0" :"=a" (data):"d" (port));
787c478bd9Sstevel@tonic-gate return data;
797c478bd9Sstevel@tonic-gate }
807c478bd9Sstevel@tonic-gate
817c478bd9Sstevel@tonic-gate static inline void
outb(unsigned short port,unsigned char val)827c478bd9Sstevel@tonic-gate outb (unsigned short port, unsigned char val)
837c478bd9Sstevel@tonic-gate {
847c478bd9Sstevel@tonic-gate __asm __volatile ("outb %0,%1"::"a" (val), "d" (port));
857c478bd9Sstevel@tonic-gate }
867c478bd9Sstevel@tonic-gate
877c478bd9Sstevel@tonic-gate
887c478bd9Sstevel@tonic-gate static inline void
cmos_write_byte(int loc,int val)897c478bd9Sstevel@tonic-gate cmos_write_byte (int loc, int val)
907c478bd9Sstevel@tonic-gate {
917c478bd9Sstevel@tonic-gate outb (0x70, loc);
927c478bd9Sstevel@tonic-gate outb (0x71, val);
937c478bd9Sstevel@tonic-gate }
947c478bd9Sstevel@tonic-gate
957c478bd9Sstevel@tonic-gate static inline unsigned
cmos_read_byte(int loc)967c478bd9Sstevel@tonic-gate cmos_read_byte (int loc)
977c478bd9Sstevel@tonic-gate {
987c478bd9Sstevel@tonic-gate outb (0x70, loc);
997c478bd9Sstevel@tonic-gate return inb (0x71);
1007c478bd9Sstevel@tonic-gate }
1017c478bd9Sstevel@tonic-gate
1027c478bd9Sstevel@tonic-gate
1037c478bd9Sstevel@tonic-gate /*
1047c478bd9Sstevel@tonic-gate * Includes here
1057c478bd9Sstevel@tonic-gate */
1067c478bd9Sstevel@tonic-gate
1077c478bd9Sstevel@tonic-gate #include "shared.h"
1087c478bd9Sstevel@tonic-gate #include "apic.h"
1097c478bd9Sstevel@tonic-gate #include "smp-imps.h"
1107c478bd9Sstevel@tonic-gate
1117c478bd9Sstevel@tonic-gate
1127c478bd9Sstevel@tonic-gate /*
1137c478bd9Sstevel@tonic-gate * Defines that are here so as not to be in the global header file.
1147c478bd9Sstevel@tonic-gate */
1157c478bd9Sstevel@tonic-gate #define EBDA_SEG_ADDR 0x40E
1167c478bd9Sstevel@tonic-gate #define BIOS_RESET_VECTOR 0x467
1177c478bd9Sstevel@tonic-gate #define LAPIC_ADDR_DEFAULT 0xFEE00000uL
1187c478bd9Sstevel@tonic-gate #define IOAPIC_ADDR_DEFAULT 0xFEC00000uL
1197c478bd9Sstevel@tonic-gate #define CMOS_RESET_CODE 0xF
1207c478bd9Sstevel@tonic-gate #define CMOS_RESET_JUMP 0xa
1217c478bd9Sstevel@tonic-gate #define CMOS_BASE_MEMORY 0x15
1227c478bd9Sstevel@tonic-gate
1237c478bd9Sstevel@tonic-gate
1247c478bd9Sstevel@tonic-gate /*
1257c478bd9Sstevel@tonic-gate * Static defines here for SMP use.
1267c478bd9Sstevel@tonic-gate */
1277c478bd9Sstevel@tonic-gate
1287c478bd9Sstevel@tonic-gate #define DEF_ENTRIES 23
1297c478bd9Sstevel@tonic-gate
1307c478bd9Sstevel@tonic-gate static int lapic_dummy = 0;
1317c478bd9Sstevel@tonic-gate static struct
1327c478bd9Sstevel@tonic-gate {
1337c478bd9Sstevel@tonic-gate imps_processor proc[2];
1347c478bd9Sstevel@tonic-gate imps_bus bus[2];
1357c478bd9Sstevel@tonic-gate imps_ioapic ioapic;
1367c478bd9Sstevel@tonic-gate imps_interrupt intin[16];
1377c478bd9Sstevel@tonic-gate imps_interrupt lintin[2];
1387c478bd9Sstevel@tonic-gate }
1397c478bd9Sstevel@tonic-gate defconfig =
1407c478bd9Sstevel@tonic-gate {
1417c478bd9Sstevel@tonic-gate {
1427c478bd9Sstevel@tonic-gate {
1437c478bd9Sstevel@tonic-gate IMPS_BCT_PROCESSOR, 0, 0, 0, 0, 0
1447c478bd9Sstevel@tonic-gate }
1457c478bd9Sstevel@tonic-gate ,
1467c478bd9Sstevel@tonic-gate {
1477c478bd9Sstevel@tonic-gate IMPS_BCT_PROCESSOR, 1, 0, 0, 0, 0
1487c478bd9Sstevel@tonic-gate }
1497c478bd9Sstevel@tonic-gate }
1507c478bd9Sstevel@tonic-gate ,
1517c478bd9Sstevel@tonic-gate {
1527c478bd9Sstevel@tonic-gate {
1537c478bd9Sstevel@tonic-gate IMPS_BCT_BUS, 0,
1547c478bd9Sstevel@tonic-gate {
1557c478bd9Sstevel@tonic-gate 'E', 'I', 'S', 'A', ' ', ' '
1567c478bd9Sstevel@tonic-gate }
1577c478bd9Sstevel@tonic-gate }
1587c478bd9Sstevel@tonic-gate ,
1597c478bd9Sstevel@tonic-gate {
1607c478bd9Sstevel@tonic-gate 255, 1,
1617c478bd9Sstevel@tonic-gate {
1627c478bd9Sstevel@tonic-gate 'P', 'C', 'I', ' ', ' ', ' '
1637c478bd9Sstevel@tonic-gate }
1647c478bd9Sstevel@tonic-gate }
1657c478bd9Sstevel@tonic-gate }
1667c478bd9Sstevel@tonic-gate ,
1677c478bd9Sstevel@tonic-gate {
1687c478bd9Sstevel@tonic-gate IMPS_BCT_IOAPIC, 0, 0, IMPS_FLAG_ENABLED, IOAPIC_ADDR_DEFAULT
1697c478bd9Sstevel@tonic-gate }
1707c478bd9Sstevel@tonic-gate ,
1717c478bd9Sstevel@tonic-gate {
1727c478bd9Sstevel@tonic-gate {
1737c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 0, 0xFF, 0
1747c478bd9Sstevel@tonic-gate }
1757c478bd9Sstevel@tonic-gate ,
1767c478bd9Sstevel@tonic-gate {
1777c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 1, 0xFF, 1
1787c478bd9Sstevel@tonic-gate }
1797c478bd9Sstevel@tonic-gate ,
1807c478bd9Sstevel@tonic-gate {
1817c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 0, 0xFF, 2
1827c478bd9Sstevel@tonic-gate }
1837c478bd9Sstevel@tonic-gate ,
1847c478bd9Sstevel@tonic-gate {
1857c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 3, 0xFF, 3
1867c478bd9Sstevel@tonic-gate }
1877c478bd9Sstevel@tonic-gate ,
1887c478bd9Sstevel@tonic-gate {
1897c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 4, 0xFF, 4
1907c478bd9Sstevel@tonic-gate }
1917c478bd9Sstevel@tonic-gate ,
1927c478bd9Sstevel@tonic-gate {
1937c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 5, 0xFF, 5
1947c478bd9Sstevel@tonic-gate }
1957c478bd9Sstevel@tonic-gate ,
1967c478bd9Sstevel@tonic-gate {
1977c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 6, 0xFF, 6
1987c478bd9Sstevel@tonic-gate }
1997c478bd9Sstevel@tonic-gate ,
2007c478bd9Sstevel@tonic-gate {
2017c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 7, 0xFF, 7
2027c478bd9Sstevel@tonic-gate }
2037c478bd9Sstevel@tonic-gate ,
2047c478bd9Sstevel@tonic-gate {
2057c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 8, 0xFF, 8
2067c478bd9Sstevel@tonic-gate }
2077c478bd9Sstevel@tonic-gate ,
2087c478bd9Sstevel@tonic-gate {
2097c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 9, 0xFF, 9
2107c478bd9Sstevel@tonic-gate }
2117c478bd9Sstevel@tonic-gate ,
2127c478bd9Sstevel@tonic-gate {
2137c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 10, 0xFF, 10
2147c478bd9Sstevel@tonic-gate }
2157c478bd9Sstevel@tonic-gate ,
2167c478bd9Sstevel@tonic-gate {
2177c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 11, 0xFF, 11
2187c478bd9Sstevel@tonic-gate }
2197c478bd9Sstevel@tonic-gate ,
2207c478bd9Sstevel@tonic-gate {
2217c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 12, 0xFF, 12
2227c478bd9Sstevel@tonic-gate }
2237c478bd9Sstevel@tonic-gate ,
2247c478bd9Sstevel@tonic-gate {
2257c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 13, 0xFF, 13
2267c478bd9Sstevel@tonic-gate }
2277c478bd9Sstevel@tonic-gate ,
2287c478bd9Sstevel@tonic-gate {
2297c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 14, 0xFF, 14
2307c478bd9Sstevel@tonic-gate }
2317c478bd9Sstevel@tonic-gate ,
2327c478bd9Sstevel@tonic-gate {
2337c478bd9Sstevel@tonic-gate IMPS_BCT_IO_INTERRUPT, IMPS_INT_INT, 0, 0, 15, 0xFF, 15
2347c478bd9Sstevel@tonic-gate }
2357c478bd9Sstevel@tonic-gate }
2367c478bd9Sstevel@tonic-gate ,
2377c478bd9Sstevel@tonic-gate {
2387c478bd9Sstevel@tonic-gate {
2397c478bd9Sstevel@tonic-gate IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_EXTINT, 0, 0, 15, 0xFF, 0
2407c478bd9Sstevel@tonic-gate }
2417c478bd9Sstevel@tonic-gate ,
2427c478bd9Sstevel@tonic-gate {
2437c478bd9Sstevel@tonic-gate IMPS_BCT_LOCAL_INTERRUPT, IMPS_INT_NMI, 0, 0, 15, 0xFF, 1
2447c478bd9Sstevel@tonic-gate }
2457c478bd9Sstevel@tonic-gate }
2467c478bd9Sstevel@tonic-gate };
2477c478bd9Sstevel@tonic-gate
2487c478bd9Sstevel@tonic-gate /*
2497c478bd9Sstevel@tonic-gate * Exported globals here.
2507c478bd9Sstevel@tonic-gate */
2517c478bd9Sstevel@tonic-gate
252*1b8adde7SWilliam Kucharski /*
253*1b8adde7SWilliam Kucharski * "imps_any_new_apics" is non-zero if any of the APICS (local or I/O)
254*1b8adde7SWilliam Kucharski * are *not* an 82489DX. This is useful to determine if more than 15
255*1b8adde7SWilliam Kucharski * CPUs can be supported (true if zero).
256*1b8adde7SWilliam Kucharski */
2577c478bd9Sstevel@tonic-gate static int imps_any_new_apics = 0;
2587c478bd9Sstevel@tonic-gate #if 0
2597c478bd9Sstevel@tonic-gate volatile int imps_release_cpus = 0;
2607c478bd9Sstevel@tonic-gate #endif
261*1b8adde7SWilliam Kucharski /*
262*1b8adde7SWilliam Kucharski * "imps_enabled" is non-zero if the probe sequence found IMPS
263*1b8adde7SWilliam Kucharski * information and was successful.
264*1b8adde7SWilliam Kucharski */
2657c478bd9Sstevel@tonic-gate static int imps_enabled = 0;
266*1b8adde7SWilliam Kucharski /*
267*1b8adde7SWilliam Kucharski * This represents the number of CPUs found.
268*1b8adde7SWilliam Kucharski */
2697c478bd9Sstevel@tonic-gate static int imps_num_cpus = 1;
270*1b8adde7SWilliam Kucharski /*
271*1b8adde7SWilliam Kucharski * This contains the local APIC hardware address.
272*1b8adde7SWilliam Kucharski */
2737c478bd9Sstevel@tonic-gate static unsigned imps_lapic_addr = ((unsigned) (&lapic_dummy)) - LAPIC_ID;
274*1b8adde7SWilliam Kucharski /*
275*1b8adde7SWilliam Kucharski * These map from virtual cpu numbers to APIC id's and back.
276*1b8adde7SWilliam Kucharski */
2777c478bd9Sstevel@tonic-gate static unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
2787c478bd9Sstevel@tonic-gate static unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
2797c478bd9Sstevel@tonic-gate
2807c478bd9Sstevel@tonic-gate
2817c478bd9Sstevel@tonic-gate /*
2827c478bd9Sstevel@tonic-gate * MPS checksum function
2837c478bd9Sstevel@tonic-gate *
2847c478bd9Sstevel@tonic-gate * Function finished.
2857c478bd9Sstevel@tonic-gate */
2867c478bd9Sstevel@tonic-gate
2877c478bd9Sstevel@tonic-gate static int
get_checksum(unsigned start,int length)2887c478bd9Sstevel@tonic-gate get_checksum (unsigned start, int length)
2897c478bd9Sstevel@tonic-gate {
2907c478bd9Sstevel@tonic-gate unsigned sum = 0;
2917c478bd9Sstevel@tonic-gate
2927c478bd9Sstevel@tonic-gate while (length-- > 0)
2937c478bd9Sstevel@tonic-gate {
2947c478bd9Sstevel@tonic-gate sum += *((unsigned char *) (start++));
2957c478bd9Sstevel@tonic-gate }
2967c478bd9Sstevel@tonic-gate
2977c478bd9Sstevel@tonic-gate return (sum & 0xFF);
2987c478bd9Sstevel@tonic-gate }
2997c478bd9Sstevel@tonic-gate
3007c478bd9Sstevel@tonic-gate
3017c478bd9Sstevel@tonic-gate /*
3027c478bd9Sstevel@tonic-gate * Primary function for booting individual CPUs.
3037c478bd9Sstevel@tonic-gate *
3047c478bd9Sstevel@tonic-gate * This must be modified to perform whatever OS-specific initialization
3057c478bd9Sstevel@tonic-gate * that is required.
3067c478bd9Sstevel@tonic-gate */
3077c478bd9Sstevel@tonic-gate
3087c478bd9Sstevel@tonic-gate static int
boot_cpu(imps_processor * proc)3097c478bd9Sstevel@tonic-gate boot_cpu (imps_processor * proc)
3107c478bd9Sstevel@tonic-gate {
3117c478bd9Sstevel@tonic-gate unsigned bootaddr, accept_status;
3127c478bd9Sstevel@tonic-gate unsigned bios_reset_vector = PHYS_TO_VIRTUAL (BIOS_RESET_VECTOR);
3137c478bd9Sstevel@tonic-gate
3147c478bd9Sstevel@tonic-gate /* %%%%% ESB */
3157c478bd9Sstevel@tonic-gate extern char patch_code[];
3167c478bd9Sstevel@tonic-gate bootaddr = 256 * 1024;
3177c478bd9Sstevel@tonic-gate memmove ((char *) bootaddr, patch_code, 32);
3187c478bd9Sstevel@tonic-gate
3197c478bd9Sstevel@tonic-gate /*
3207c478bd9Sstevel@tonic-gate * Generic CPU startup sequence starts here.
3217c478bd9Sstevel@tonic-gate */
3227c478bd9Sstevel@tonic-gate
3237c478bd9Sstevel@tonic-gate /* set BIOS reset vector */
3247c478bd9Sstevel@tonic-gate CMOS_WRITE_BYTE (CMOS_RESET_CODE, CMOS_RESET_JUMP);
3257c478bd9Sstevel@tonic-gate *((volatile unsigned *) bios_reset_vector) = bootaddr << 12;
3267c478bd9Sstevel@tonic-gate
3277c478bd9Sstevel@tonic-gate /* clear the error register */
3287c478bd9Sstevel@tonic-gate if (proc->apic_ver & 0x10)
3297c478bd9Sstevel@tonic-gate {
3307c478bd9Sstevel@tonic-gate IMPS_LAPIC_WRITE (LAPIC_ESR, 0);
3317c478bd9Sstevel@tonic-gate accept_status = IMPS_LAPIC_READ (LAPIC_ESR);
3327c478bd9Sstevel@tonic-gate }
3337c478bd9Sstevel@tonic-gate
3347c478bd9Sstevel@tonic-gate #if 0
3357c478bd9Sstevel@tonic-gate /* assert INIT IPI */
3367c478bd9Sstevel@tonic-gate cfg = IMPS_LAPIC_READ (LAPIC_ICR + 1);
3377c478bd9Sstevel@tonic-gate cfg &= LAPIC_DEST_MASK;
3387c478bd9Sstevel@tonic-gate IMPS_LAPIC_WRITE (LAPIC_ICR + 1, cfg);
3397c478bd9Sstevel@tonic-gate cfg = IMPS_LAPIC_READ (LAPIC_ACR);
3407c478bd9Sstevel@tonic-gate cfg &=;
3417c478bd9Sstevel@tonic-gate
3427c478bd9Sstevel@tonic-gate /* %%%%% ESB finish adding startup sequence */
3437c478bd9Sstevel@tonic-gate #endif
3447c478bd9Sstevel@tonic-gate
3457c478bd9Sstevel@tonic-gate /* clean up BIOS reset vector */
3467c478bd9Sstevel@tonic-gate CMOS_WRITE_BYTE (CMOS_RESET_CODE, 0);
3477c478bd9Sstevel@tonic-gate *((volatile unsigned *) bios_reset_vector) = 0;
3487c478bd9Sstevel@tonic-gate
3497c478bd9Sstevel@tonic-gate /*
3507c478bd9Sstevel@tonic-gate * Generic CPU startup sequence ends here.
3517c478bd9Sstevel@tonic-gate */
3527c478bd9Sstevel@tonic-gate
3537c478bd9Sstevel@tonic-gate KERNEL_PRINT (("\n"));
3547c478bd9Sstevel@tonic-gate
3557c478bd9Sstevel@tonic-gate return 1;
3567c478bd9Sstevel@tonic-gate
3577c478bd9Sstevel@tonic-gate /* XXXXX add OS-specific initialization here! */
3587c478bd9Sstevel@tonic-gate }
3597c478bd9Sstevel@tonic-gate
3607c478bd9Sstevel@tonic-gate
3617c478bd9Sstevel@tonic-gate /*
3627c478bd9Sstevel@tonic-gate * read bios stuff and fill tables
3637c478bd9Sstevel@tonic-gate */
3647c478bd9Sstevel@tonic-gate
3657c478bd9Sstevel@tonic-gate static void
add_processor(imps_processor * proc)3667c478bd9Sstevel@tonic-gate add_processor (imps_processor * proc)
3677c478bd9Sstevel@tonic-gate {
3687c478bd9Sstevel@tonic-gate int apicid = proc->apic_id;
3697c478bd9Sstevel@tonic-gate
3707c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Processor [APIC id %d ver %d]: ",
3717c478bd9Sstevel@tonic-gate apicid, proc->apic_ver));
3727c478bd9Sstevel@tonic-gate if (!(proc->flags & IMPS_FLAG_ENABLED))
3737c478bd9Sstevel@tonic-gate {
3747c478bd9Sstevel@tonic-gate KERNEL_PRINT (("DISABLED\n"));
3757c478bd9Sstevel@tonic-gate return;
3767c478bd9Sstevel@tonic-gate }
3777c478bd9Sstevel@tonic-gate if (proc->apic_ver > 0xF)
3787c478bd9Sstevel@tonic-gate {
3797c478bd9Sstevel@tonic-gate imps_any_new_apics = 1;
3807c478bd9Sstevel@tonic-gate }
3817c478bd9Sstevel@tonic-gate if (proc->flags & (IMPS_CPUFLAG_BOOT))
3827c478bd9Sstevel@tonic-gate {
3837c478bd9Sstevel@tonic-gate KERNEL_PRINT (("#0 Bootstrap Processor (BSP)\n"));
3847c478bd9Sstevel@tonic-gate return;
3857c478bd9Sstevel@tonic-gate }
3867c478bd9Sstevel@tonic-gate imps_cpu_apic_map[imps_num_cpus] = apicid;
3877c478bd9Sstevel@tonic-gate imps_apic_cpu_map[apicid] = imps_num_cpus;
3887c478bd9Sstevel@tonic-gate if (boot_cpu (proc))
3897c478bd9Sstevel@tonic-gate {
3907c478bd9Sstevel@tonic-gate
3917c478bd9Sstevel@tonic-gate /* XXXXX add OS-specific setup for secondary CPUs here */
3927c478bd9Sstevel@tonic-gate
3937c478bd9Sstevel@tonic-gate imps_num_cpus++;
3947c478bd9Sstevel@tonic-gate }
3957c478bd9Sstevel@tonic-gate }
3967c478bd9Sstevel@tonic-gate
3977c478bd9Sstevel@tonic-gate
3987c478bd9Sstevel@tonic-gate static void
add_bus(imps_bus * bus)3997c478bd9Sstevel@tonic-gate add_bus (imps_bus * bus)
4007c478bd9Sstevel@tonic-gate {
4017c478bd9Sstevel@tonic-gate char str[8];
4027c478bd9Sstevel@tonic-gate
4037c478bd9Sstevel@tonic-gate memmove (str, bus->bus_type, 6);
4047c478bd9Sstevel@tonic-gate str[6] = 0;
4057c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Bus id %d is %s\n", bus->id, str));
4067c478bd9Sstevel@tonic-gate
4077c478bd9Sstevel@tonic-gate /* XXXXX add OS-specific code here */
4087c478bd9Sstevel@tonic-gate }
4097c478bd9Sstevel@tonic-gate
4107c478bd9Sstevel@tonic-gate
4117c478bd9Sstevel@tonic-gate static void
add_ioapic(imps_ioapic * ioapic)4127c478bd9Sstevel@tonic-gate add_ioapic (imps_ioapic * ioapic)
4137c478bd9Sstevel@tonic-gate {
4147c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" I/O APIC id %d ver %d, address: 0x%x ",
4157c478bd9Sstevel@tonic-gate ioapic->id, ioapic->ver, ioapic->addr));
4167c478bd9Sstevel@tonic-gate if (!(ioapic->flags & IMPS_FLAG_ENABLED))
4177c478bd9Sstevel@tonic-gate {
4187c478bd9Sstevel@tonic-gate KERNEL_PRINT (("DISABLED\n"));
4197c478bd9Sstevel@tonic-gate return;
4207c478bd9Sstevel@tonic-gate }
4217c478bd9Sstevel@tonic-gate KERNEL_PRINT (("\n"));
4227c478bd9Sstevel@tonic-gate
4237c478bd9Sstevel@tonic-gate /* XXXXX add OS-specific code here */
4247c478bd9Sstevel@tonic-gate }
4257c478bd9Sstevel@tonic-gate
4267c478bd9Sstevel@tonic-gate
4277c478bd9Sstevel@tonic-gate static void
imps_read_config_table(unsigned start,int count)4287c478bd9Sstevel@tonic-gate imps_read_config_table (unsigned start, int count)
4297c478bd9Sstevel@tonic-gate {
4307c478bd9Sstevel@tonic-gate while (count-- > 0)
4317c478bd9Sstevel@tonic-gate {
4327c478bd9Sstevel@tonic-gate switch (*((unsigned char *) start))
4337c478bd9Sstevel@tonic-gate {
4347c478bd9Sstevel@tonic-gate case IMPS_BCT_PROCESSOR:
4357c478bd9Sstevel@tonic-gate add_processor ((imps_processor *) start);
4367c478bd9Sstevel@tonic-gate start += 12; /* 20 total */
4377c478bd9Sstevel@tonic-gate break;
4387c478bd9Sstevel@tonic-gate case IMPS_BCT_BUS:
4397c478bd9Sstevel@tonic-gate add_bus ((imps_bus *) start);
4407c478bd9Sstevel@tonic-gate break;
4417c478bd9Sstevel@tonic-gate case IMPS_BCT_IOAPIC:
4427c478bd9Sstevel@tonic-gate add_ioapic ((imps_ioapic *) start);
4437c478bd9Sstevel@tonic-gate break;
4447c478bd9Sstevel@tonic-gate #if 0 /* XXXXX uncomment this if "add_io_interrupt" is implemented */
4457c478bd9Sstevel@tonic-gate case IMPS_BCT_IO_INTERRUPT:
4467c478bd9Sstevel@tonic-gate add_io_interrupt ((imps_interrupt *) start);
4477c478bd9Sstevel@tonic-gate break;
4487c478bd9Sstevel@tonic-gate #endif
4497c478bd9Sstevel@tonic-gate #if 0 /* XXXXX uncomment this if "add_local_interrupt" is implemented */
4507c478bd9Sstevel@tonic-gate case IMPS_BCT_LOCAL_INTERRUPT:
4517c478bd9Sstevel@tonic-gate add_local_interupt ((imps_interrupt *) start);
4527c478bd9Sstevel@tonic-gate break;
4537c478bd9Sstevel@tonic-gate #endif
4547c478bd9Sstevel@tonic-gate default:
4557c478bd9Sstevel@tonic-gate break;
4567c478bd9Sstevel@tonic-gate }
4577c478bd9Sstevel@tonic-gate start += 8;
4587c478bd9Sstevel@tonic-gate }
4597c478bd9Sstevel@tonic-gate }
4607c478bd9Sstevel@tonic-gate
4617c478bd9Sstevel@tonic-gate
4627c478bd9Sstevel@tonic-gate static int
imps_bad_bios(imps_fps * fps_ptr)4637c478bd9Sstevel@tonic-gate imps_bad_bios (imps_fps * fps_ptr)
4647c478bd9Sstevel@tonic-gate {
4657c478bd9Sstevel@tonic-gate int sum;
4667c478bd9Sstevel@tonic-gate imps_cth *local_cth_ptr
4677c478bd9Sstevel@tonic-gate = (imps_cth *) PHYS_TO_VIRTUAL (fps_ptr->cth_ptr);
4687c478bd9Sstevel@tonic-gate
4697c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] > IMPS_FPS_DEFAULT_MAX)
4707c478bd9Sstevel@tonic-gate {
4717c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Invalid MP System Configuration type %d\n",
4727c478bd9Sstevel@tonic-gate fps_ptr->feature_info[0]));
4737c478bd9Sstevel@tonic-gate return 1;
4747c478bd9Sstevel@tonic-gate }
4757c478bd9Sstevel@tonic-gate
4767c478bd9Sstevel@tonic-gate if (fps_ptr->cth_ptr)
4777c478bd9Sstevel@tonic-gate {
4787c478bd9Sstevel@tonic-gate sum = get_checksum ((unsigned) local_cth_ptr,
4797c478bd9Sstevel@tonic-gate local_cth_ptr->base_length);
4807c478bd9Sstevel@tonic-gate if (local_cth_ptr->sig != IMPS_CTH_SIGNATURE || sum)
4817c478bd9Sstevel@tonic-gate {
4827c478bd9Sstevel@tonic-gate KERNEL_PRINT
4837c478bd9Sstevel@tonic-gate ((" Bad MP Config Table sig 0x%x and/or checksum 0x%x\n",
4847c478bd9Sstevel@tonic-gate (unsigned) (fps_ptr->cth_ptr), sum));
4857c478bd9Sstevel@tonic-gate return 1;
4867c478bd9Sstevel@tonic-gate }
4877c478bd9Sstevel@tonic-gate if (local_cth_ptr->spec_rev != fps_ptr->spec_rev)
4887c478bd9Sstevel@tonic-gate {
4897c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Bad MP Config Table sub-revision # %d\n", local_cth_ptr->spec_rev));
4907c478bd9Sstevel@tonic-gate return 1;
4917c478bd9Sstevel@tonic-gate }
4927c478bd9Sstevel@tonic-gate if (local_cth_ptr->extended_length)
4937c478bd9Sstevel@tonic-gate {
4947c478bd9Sstevel@tonic-gate sum = (get_checksum (((unsigned) local_cth_ptr)
4957c478bd9Sstevel@tonic-gate + local_cth_ptr->base_length,
4967c478bd9Sstevel@tonic-gate local_cth_ptr->extended_length)
4977c478bd9Sstevel@tonic-gate + local_cth_ptr->extended_checksum) & 0xFF;
4987c478bd9Sstevel@tonic-gate if (sum)
4997c478bd9Sstevel@tonic-gate {
5007c478bd9Sstevel@tonic-gate KERNEL_PRINT
5017c478bd9Sstevel@tonic-gate ((" Bad Extended MP Config Table checksum 0x%x\n", sum));
5027c478bd9Sstevel@tonic-gate return 1;
5037c478bd9Sstevel@tonic-gate }
5047c478bd9Sstevel@tonic-gate }
5057c478bd9Sstevel@tonic-gate }
5067c478bd9Sstevel@tonic-gate else if (!fps_ptr->feature_info[0])
5077c478bd9Sstevel@tonic-gate {
5087c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Missing configuration information\n"));
5097c478bd9Sstevel@tonic-gate return 1;
5107c478bd9Sstevel@tonic-gate }
5117c478bd9Sstevel@tonic-gate
5127c478bd9Sstevel@tonic-gate return 0;
5137c478bd9Sstevel@tonic-gate }
5147c478bd9Sstevel@tonic-gate
5157c478bd9Sstevel@tonic-gate
5167c478bd9Sstevel@tonic-gate static void
imps_read_bios(imps_fps * fps_ptr)5177c478bd9Sstevel@tonic-gate imps_read_bios (imps_fps * fps_ptr)
5187c478bd9Sstevel@tonic-gate {
5197c478bd9Sstevel@tonic-gate int apicid;
5207c478bd9Sstevel@tonic-gate unsigned cth_start, cth_count;
5217c478bd9Sstevel@tonic-gate imps_cth *local_cth_ptr
5227c478bd9Sstevel@tonic-gate = (imps_cth *) PHYS_TO_VIRTUAL (fps_ptr->cth_ptr);
5237c478bd9Sstevel@tonic-gate char *str_ptr;
5247c478bd9Sstevel@tonic-gate
5257c478bd9Sstevel@tonic-gate KERNEL_PRINT (("Intel MultiProcessor Spec 1.%d BIOS support detected\n",
5267c478bd9Sstevel@tonic-gate fps_ptr->spec_rev));
5277c478bd9Sstevel@tonic-gate
5287c478bd9Sstevel@tonic-gate /*
5297c478bd9Sstevel@tonic-gate * Do all checking of errors which would definitely
5307c478bd9Sstevel@tonic-gate * lead to failure of the SMP boot here.
5317c478bd9Sstevel@tonic-gate */
5327c478bd9Sstevel@tonic-gate
5337c478bd9Sstevel@tonic-gate if (imps_bad_bios (fps_ptr))
5347c478bd9Sstevel@tonic-gate {
5357c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" Disabling MPS support\n"));
5367c478bd9Sstevel@tonic-gate return;
5377c478bd9Sstevel@tonic-gate }
5387c478bd9Sstevel@tonic-gate
5397c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[1] & IMPS_FPS_IMCRP_BIT)
5407c478bd9Sstevel@tonic-gate {
5417c478bd9Sstevel@tonic-gate str_ptr = "IMCR and PIC";
5427c478bd9Sstevel@tonic-gate }
5437c478bd9Sstevel@tonic-gate else
5447c478bd9Sstevel@tonic-gate {
5457c478bd9Sstevel@tonic-gate str_ptr = "Virtual Wire";
5467c478bd9Sstevel@tonic-gate }
5477c478bd9Sstevel@tonic-gate if (fps_ptr->cth_ptr)
5487c478bd9Sstevel@tonic-gate {
5497c478bd9Sstevel@tonic-gate imps_lapic_addr = local_cth_ptr->lapic_addr;
5507c478bd9Sstevel@tonic-gate }
5517c478bd9Sstevel@tonic-gate else
5527c478bd9Sstevel@tonic-gate {
5537c478bd9Sstevel@tonic-gate imps_lapic_addr = LAPIC_ADDR_DEFAULT;
5547c478bd9Sstevel@tonic-gate }
5557c478bd9Sstevel@tonic-gate KERNEL_PRINT
5567c478bd9Sstevel@tonic-gate ((" APIC config: \"%s mode\" Local APIC address: 0x%x\n",
5577c478bd9Sstevel@tonic-gate str_ptr, imps_lapic_addr));
5587c478bd9Sstevel@tonic-gate imps_lapic_addr = PHYS_TO_VIRTUAL (imps_lapic_addr);
5597c478bd9Sstevel@tonic-gate
5607c478bd9Sstevel@tonic-gate /*
5617c478bd9Sstevel@tonic-gate * Setup primary CPU.
5627c478bd9Sstevel@tonic-gate */
5637c478bd9Sstevel@tonic-gate apicid = IMPS_LAPIC_READ (LAPIC_SPIV);
5647c478bd9Sstevel@tonic-gate IMPS_LAPIC_WRITE (LAPIC_SPIV, apicid | LAPIC_SPIV_ENABLE_APIC);
5657c478bd9Sstevel@tonic-gate imps_any_new_apics = IMPS_LAPIC_READ (LAPIC_VER) & 0xF0;
5667c478bd9Sstevel@tonic-gate apicid = IMPS_APIC_ID (IMPS_LAPIC_READ (LAPIC_ID));
5677c478bd9Sstevel@tonic-gate imps_cpu_apic_map[0] = apicid;
5687c478bd9Sstevel@tonic-gate imps_apic_cpu_map[apicid] = 0;
5697c478bd9Sstevel@tonic-gate
5707c478bd9Sstevel@tonic-gate if (fps_ptr->cth_ptr)
5717c478bd9Sstevel@tonic-gate {
5727c478bd9Sstevel@tonic-gate char str1[16], str2[16];
5737c478bd9Sstevel@tonic-gate memcpy (str1, local_cth_ptr->oem_id, 8);
5747c478bd9Sstevel@tonic-gate str1[8] = 0;
5757c478bd9Sstevel@tonic-gate memcpy (str2, local_cth_ptr->prod_id, 12);
5767c478bd9Sstevel@tonic-gate str2[12] = 0;
5777c478bd9Sstevel@tonic-gate KERNEL_PRINT ((" OEM id: %s Product id: %s\n", str1, str2));
5787c478bd9Sstevel@tonic-gate cth_start = ((unsigned) local_cth_ptr) + sizeof (imps_cth);
5797c478bd9Sstevel@tonic-gate cth_count = local_cth_ptr->entry_count;
5807c478bd9Sstevel@tonic-gate }
5817c478bd9Sstevel@tonic-gate else
5827c478bd9Sstevel@tonic-gate {
5837c478bd9Sstevel@tonic-gate *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_ID;
5847c478bd9Sstevel@tonic-gate defconfig.ioapic.id
5857c478bd9Sstevel@tonic-gate = IMPS_APIC_ID (*((volatile unsigned *)
5867c478bd9Sstevel@tonic-gate (IOAPIC_ADDR_DEFAULT + IOAPIC_RW)));
5877c478bd9Sstevel@tonic-gate *((volatile unsigned *) IOAPIC_ADDR_DEFAULT) = IOAPIC_VER;
5887c478bd9Sstevel@tonic-gate defconfig.ioapic.ver
5897c478bd9Sstevel@tonic-gate = APIC_VERSION (*((volatile unsigned *)
5907c478bd9Sstevel@tonic-gate (IOAPIC_ADDR_DEFAULT + IOAPIC_RW)));
5917c478bd9Sstevel@tonic-gate defconfig.proc[apicid].flags
5927c478bd9Sstevel@tonic-gate = IMPS_FLAG_ENABLED | IMPS_CPUFLAG_BOOT;
5937c478bd9Sstevel@tonic-gate defconfig.proc[!apicid].flags = IMPS_FLAG_ENABLED;
5947c478bd9Sstevel@tonic-gate imps_num_cpus = 2;
5957c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] == 1
5967c478bd9Sstevel@tonic-gate || fps_ptr->feature_info[0] == 5)
5977c478bd9Sstevel@tonic-gate {
5987c478bd9Sstevel@tonic-gate memcpy (defconfig.bus[0].bus_type, "ISA ", 6);
5997c478bd9Sstevel@tonic-gate }
6007c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] == 4
6017c478bd9Sstevel@tonic-gate || fps_ptr->feature_info[0] == 7)
6027c478bd9Sstevel@tonic-gate {
6037c478bd9Sstevel@tonic-gate memcpy (defconfig.bus[0].bus_type, "MCA ", 6);
6047c478bd9Sstevel@tonic-gate }
6057c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] > 4)
6067c478bd9Sstevel@tonic-gate {
6077c478bd9Sstevel@tonic-gate defconfig.proc[0].apic_ver = 0x10;
6087c478bd9Sstevel@tonic-gate defconfig.proc[1].apic_ver = 0x10;
6097c478bd9Sstevel@tonic-gate defconfig.bus[1].type = IMPS_BCT_BUS;
6107c478bd9Sstevel@tonic-gate }
6117c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] == 2)
6127c478bd9Sstevel@tonic-gate {
6137c478bd9Sstevel@tonic-gate defconfig.intin[2].type = 255;
6147c478bd9Sstevel@tonic-gate defconfig.intin[13].type = 255;
6157c478bd9Sstevel@tonic-gate }
6167c478bd9Sstevel@tonic-gate if (fps_ptr->feature_info[0] == 7)
6177c478bd9Sstevel@tonic-gate {
6187c478bd9Sstevel@tonic-gate defconfig.intin[0].type = 255;
6197c478bd9Sstevel@tonic-gate }
6207c478bd9Sstevel@tonic-gate cth_start = (unsigned) &defconfig;
6217c478bd9Sstevel@tonic-gate cth_count = DEF_ENTRIES;
6227c478bd9Sstevel@tonic-gate }
6237c478bd9Sstevel@tonic-gate imps_read_config_table (cth_start, cth_count);
6247c478bd9Sstevel@tonic-gate
6257c478bd9Sstevel@tonic-gate /* %%%%% ESB read extended entries here */
6267c478bd9Sstevel@tonic-gate
6277c478bd9Sstevel@tonic-gate imps_enabled = 1;
6287c478bd9Sstevel@tonic-gate }
6297c478bd9Sstevel@tonic-gate
6307c478bd9Sstevel@tonic-gate
6317c478bd9Sstevel@tonic-gate /*
6327c478bd9Sstevel@tonic-gate * Given a region to check, this actually looks for the "MP Floating
6337c478bd9Sstevel@tonic-gate * Pointer Structure". The return value indicates if the correct
6347c478bd9Sstevel@tonic-gate * signature and checksum for a floating pointer structure of the
6357c478bd9Sstevel@tonic-gate * appropriate spec revision was found. If so, then do not search
6367c478bd9Sstevel@tonic-gate * further.
6377c478bd9Sstevel@tonic-gate *
6387c478bd9Sstevel@tonic-gate * NOTE: The memory scan will always be in the bottom 1 MB.
6397c478bd9Sstevel@tonic-gate *
6407c478bd9Sstevel@tonic-gate * This function presumes that "start" will always be aligned to a 16-bit
6417c478bd9Sstevel@tonic-gate * boundary.
6427c478bd9Sstevel@tonic-gate *
6437c478bd9Sstevel@tonic-gate * Function finished.
6447c478bd9Sstevel@tonic-gate */
6457c478bd9Sstevel@tonic-gate
6467c478bd9Sstevel@tonic-gate static int
imps_scan(unsigned start,unsigned length)6477c478bd9Sstevel@tonic-gate imps_scan (unsigned start, unsigned length)
6487c478bd9Sstevel@tonic-gate {
6497c478bd9Sstevel@tonic-gate IMPS_DEBUG_PRINT (("Scanning from 0x%x for %d bytes\n",
6507c478bd9Sstevel@tonic-gate start, length));
6517c478bd9Sstevel@tonic-gate
6527c478bd9Sstevel@tonic-gate while (length > 0)
6537c478bd9Sstevel@tonic-gate {
6547c478bd9Sstevel@tonic-gate imps_fps *fps_ptr = (imps_fps *) PHYS_TO_VIRTUAL (start);
6557c478bd9Sstevel@tonic-gate
6567c478bd9Sstevel@tonic-gate if (fps_ptr->sig == IMPS_FPS_SIGNATURE
6577c478bd9Sstevel@tonic-gate && fps_ptr->length == 1
6587c478bd9Sstevel@tonic-gate && (fps_ptr->spec_rev == 1 || fps_ptr->spec_rev == 4)
6597c478bd9Sstevel@tonic-gate && !get_checksum (start, 16))
6607c478bd9Sstevel@tonic-gate {
6617c478bd9Sstevel@tonic-gate IMPS_DEBUG_PRINT (("Found MP Floating Structure Pointer at %x\n", start));
6627c478bd9Sstevel@tonic-gate imps_read_bios (fps_ptr);
6637c478bd9Sstevel@tonic-gate return 1;
6647c478bd9Sstevel@tonic-gate }
6657c478bd9Sstevel@tonic-gate
6667c478bd9Sstevel@tonic-gate length -= 16;
6677c478bd9Sstevel@tonic-gate start += 16;
6687c478bd9Sstevel@tonic-gate }
6697c478bd9Sstevel@tonic-gate
6707c478bd9Sstevel@tonic-gate return 0;
6717c478bd9Sstevel@tonic-gate }
6727c478bd9Sstevel@tonic-gate
6737c478bd9Sstevel@tonic-gate
6747c478bd9Sstevel@tonic-gate /*
6757c478bd9Sstevel@tonic-gate * This is the primary function for probing for MPS compatible hardware
6767c478bd9Sstevel@tonic-gate * and BIOS information. Call this during the early stages of OS startup,
6777c478bd9Sstevel@tonic-gate * before memory can be messed up.
6787c478bd9Sstevel@tonic-gate *
6797c478bd9Sstevel@tonic-gate * The probe looks for the "MP Floating Pointer Structure" at locations
6807c478bd9Sstevel@tonic-gate * listed at the top of page 4-2 of the spec.
6817c478bd9Sstevel@tonic-gate *
6827c478bd9Sstevel@tonic-gate * Environment requirements from the OS to run:
6837c478bd9Sstevel@tonic-gate *
6847c478bd9Sstevel@tonic-gate * (1) : A non-linear virtual to physical memory mapping is probably OK,
6857c478bd9Sstevel@tonic-gate * as (I think) the structures all fall within page boundaries,
6867c478bd9Sstevel@tonic-gate * but a linear mapping is recommended. Currently assumes that
6877c478bd9Sstevel@tonic-gate * the mapping will remain identical over time (which should be
6887c478bd9Sstevel@tonic-gate * OK since it only accesses memory which shouldn't be munged
6897c478bd9Sstevel@tonic-gate * by the OS anyway).
6907c478bd9Sstevel@tonic-gate * (2) : The OS only consumes memory which the BIOS says is OK to use,
6917c478bd9Sstevel@tonic-gate * and not any of the BIOS standard areas (the areas 0x400 to
6927c478bd9Sstevel@tonic-gate * 0x600, the EBDA, 0xE0000 to 0xFFFFF, and unreported physical
6937c478bd9Sstevel@tonic-gate * RAM). Sometimes a small amount of physical RAM is not
6947c478bd9Sstevel@tonic-gate * reported by the BIOS, to be used to store MPS and other
6957c478bd9Sstevel@tonic-gate * information.
6967c478bd9Sstevel@tonic-gate * (3) : It must be possible to read the CMOS.
6977c478bd9Sstevel@tonic-gate * (4) : There must be between 512K and 640K of lower memory (this is a
6987c478bd9Sstevel@tonic-gate * sanity check).
6997c478bd9Sstevel@tonic-gate *
7007c478bd9Sstevel@tonic-gate * Function finished.
7017c478bd9Sstevel@tonic-gate */
7027c478bd9Sstevel@tonic-gate
7037c478bd9Sstevel@tonic-gate int
imps_probe(void)7047c478bd9Sstevel@tonic-gate imps_probe (void)
7057c478bd9Sstevel@tonic-gate {
7067c478bd9Sstevel@tonic-gate /*
7077c478bd9Sstevel@tonic-gate * Determine possible address of the EBDA
7087c478bd9Sstevel@tonic-gate */
7097c478bd9Sstevel@tonic-gate unsigned ebda_addr = *((unsigned short *)
7107c478bd9Sstevel@tonic-gate PHYS_TO_VIRTUAL (EBDA_SEG_ADDR)) << 4;
7117c478bd9Sstevel@tonic-gate
7127c478bd9Sstevel@tonic-gate /*
7137c478bd9Sstevel@tonic-gate * Determine amount of installed lower memory (not *available*
7147c478bd9Sstevel@tonic-gate * lower memory).
7157c478bd9Sstevel@tonic-gate *
7167c478bd9Sstevel@tonic-gate * NOTE: This should work reliably as long as we verify the
7177c478bd9Sstevel@tonic-gate * machine is at least a system that could possibly have
7187c478bd9Sstevel@tonic-gate * MPS compatibility to begin with.
7197c478bd9Sstevel@tonic-gate */
7207c478bd9Sstevel@tonic-gate unsigned mem_lower = ((CMOS_READ_BYTE (CMOS_BASE_MEMORY + 1) << 8)
7217c478bd9Sstevel@tonic-gate | CMOS_READ_BYTE (CMOS_BASE_MEMORY)) << 10;
7227c478bd9Sstevel@tonic-gate
7237c478bd9Sstevel@tonic-gate #ifdef IMPS_DEBUG
7247c478bd9Sstevel@tonic-gate imps_enabled = 0;
7257c478bd9Sstevel@tonic-gate imps_num_cpus = 1;
7267c478bd9Sstevel@tonic-gate #endif
7277c478bd9Sstevel@tonic-gate
7287c478bd9Sstevel@tonic-gate /*
7297c478bd9Sstevel@tonic-gate * Sanity check : if this isn't reasonable, it is almost impossibly
7307c478bd9Sstevel@tonic-gate * unlikely to be an MPS compatible machine, so return failure.
7317c478bd9Sstevel@tonic-gate */
7327c478bd9Sstevel@tonic-gate if (mem_lower < 512 * 1024 || mem_lower > 640 * 1024)
7337c478bd9Sstevel@tonic-gate {
7347c478bd9Sstevel@tonic-gate return 0;
7357c478bd9Sstevel@tonic-gate }
7367c478bd9Sstevel@tonic-gate
7377c478bd9Sstevel@tonic-gate if (ebda_addr > mem_lower - 1024
7387c478bd9Sstevel@tonic-gate || ebda_addr + *((unsigned char *) PHYS_TO_VIRTUAL (ebda_addr))
7397c478bd9Sstevel@tonic-gate * 1024 > mem_lower)
7407c478bd9Sstevel@tonic-gate {
7417c478bd9Sstevel@tonic-gate ebda_addr = 0;
7427c478bd9Sstevel@tonic-gate }
7437c478bd9Sstevel@tonic-gate
7447c478bd9Sstevel@tonic-gate if (((ebda_addr && imps_scan (ebda_addr, 1024))
7457c478bd9Sstevel@tonic-gate || (!ebda_addr && imps_scan (mem_lower - 1024, 1024))
7467c478bd9Sstevel@tonic-gate || imps_scan (0xF0000, 0x10000)) && imps_enabled)
7477c478bd9Sstevel@tonic-gate {
7487c478bd9Sstevel@tonic-gate return 1;
7497c478bd9Sstevel@tonic-gate }
7507c478bd9Sstevel@tonic-gate
7517c478bd9Sstevel@tonic-gate /*
7527c478bd9Sstevel@tonic-gate * If no BIOS info on MPS hardware is found, then return failure.
7537c478bd9Sstevel@tonic-gate */
7547c478bd9Sstevel@tonic-gate
7557c478bd9Sstevel@tonic-gate return 0;
7567c478bd9Sstevel@tonic-gate }
757