17c478bd9Sstevel@tonic-gate /* -*- Mode:C; c-basic-offset:4; -*- */
27c478bd9Sstevel@tonic-gate
37c478bd9Sstevel@tonic-gate /*
47c478bd9Sstevel@tonic-gate natsemi.c: An Etherboot driver for the NatSemi DP8381x series.
57c478bd9Sstevel@tonic-gate
67c478bd9Sstevel@tonic-gate Copyright (C) 2001 Entity Cyber, Inc.
77c478bd9Sstevel@tonic-gate
87c478bd9Sstevel@tonic-gate This development of this Etherboot driver was funded by
97c478bd9Sstevel@tonic-gate
107c478bd9Sstevel@tonic-gate Sicom Systems: http://www.sicompos.com/
117c478bd9Sstevel@tonic-gate
127c478bd9Sstevel@tonic-gate Author: Marty Connor (mdc@thinguin.org)
137c478bd9Sstevel@tonic-gate Adapted from a Linux driver which was written by Donald Becker
147c478bd9Sstevel@tonic-gate
157c478bd9Sstevel@tonic-gate This software may be used and distributed according to the terms
167c478bd9Sstevel@tonic-gate of the GNU Public License (GPL), incorporated herein by reference.
177c478bd9Sstevel@tonic-gate
187c478bd9Sstevel@tonic-gate Original Copyright Notice:
197c478bd9Sstevel@tonic-gate
207c478bd9Sstevel@tonic-gate Written/copyright 1999-2001 by Donald Becker.
217c478bd9Sstevel@tonic-gate
227c478bd9Sstevel@tonic-gate This software may be used and distributed according to the terms of
237c478bd9Sstevel@tonic-gate the GNU General Public License (GPL), incorporated herein by reference.
247c478bd9Sstevel@tonic-gate Drivers based on or derived from this code fall under the GPL and must
257c478bd9Sstevel@tonic-gate retain the authorship, copyright and license notice. This file is not
267c478bd9Sstevel@tonic-gate a complete program and may only be used when the entire operating
277c478bd9Sstevel@tonic-gate system is licensed under the GPL. License for under other terms may be
287c478bd9Sstevel@tonic-gate available. Contact the original author for details.
297c478bd9Sstevel@tonic-gate
307c478bd9Sstevel@tonic-gate The original author may be reached as becker@scyld.com, or at
317c478bd9Sstevel@tonic-gate Scyld Computing Corporation
327c478bd9Sstevel@tonic-gate 410 Severn Ave., Suite 210
337c478bd9Sstevel@tonic-gate Annapolis MD 21403
347c478bd9Sstevel@tonic-gate
357c478bd9Sstevel@tonic-gate Support information and updates available at
367c478bd9Sstevel@tonic-gate http://www.scyld.com/network/netsemi.html
377c478bd9Sstevel@tonic-gate
387c478bd9Sstevel@tonic-gate References:
397c478bd9Sstevel@tonic-gate
407c478bd9Sstevel@tonic-gate http://www.scyld.com/expert/100mbps.html
417c478bd9Sstevel@tonic-gate http://www.scyld.com/expert/NWay.html
427c478bd9Sstevel@tonic-gate Datasheet is available from:
437c478bd9Sstevel@tonic-gate http://www.national.com/pf/DP/DP83815.html
447c478bd9Sstevel@tonic-gate
457c478bd9Sstevel@tonic-gate */
467c478bd9Sstevel@tonic-gate
477c478bd9Sstevel@tonic-gate /* Revision History */
487c478bd9Sstevel@tonic-gate
497c478bd9Sstevel@tonic-gate /*
507c478bd9Sstevel@tonic-gate 13 Dec 2003 timlegge 1.1 Enabled Multicast Support
517c478bd9Sstevel@tonic-gate 29 May 2001 mdc 1.0
527c478bd9Sstevel@tonic-gate Initial Release. Tested with Netgear FA311 and FA312 boards
537c478bd9Sstevel@tonic-gate */
547c478bd9Sstevel@tonic-gate /* Includes */
557c478bd9Sstevel@tonic-gate
567c478bd9Sstevel@tonic-gate #include "etherboot.h"
577c478bd9Sstevel@tonic-gate #include "nic.h"
587c478bd9Sstevel@tonic-gate #include "pci.h"
597c478bd9Sstevel@tonic-gate
607c478bd9Sstevel@tonic-gate /* defines */
617c478bd9Sstevel@tonic-gate
627c478bd9Sstevel@tonic-gate #define OWN 0x80000000
637c478bd9Sstevel@tonic-gate #define DSIZE 0x00000FFF
647c478bd9Sstevel@tonic-gate #define CRC_SIZE 4
657c478bd9Sstevel@tonic-gate
667c478bd9Sstevel@tonic-gate /* Time in ticks before concluding the transmitter is hung. */
677c478bd9Sstevel@tonic-gate #define TX_TIMEOUT (4*TICKS_PER_SEC)
687c478bd9Sstevel@tonic-gate
697c478bd9Sstevel@tonic-gate #define TX_BUF_SIZE 1536
707c478bd9Sstevel@tonic-gate #define RX_BUF_SIZE 1536
717c478bd9Sstevel@tonic-gate
727c478bd9Sstevel@tonic-gate #define NUM_RX_DESC 4 /* Number of Rx descriptor registers. */
737c478bd9Sstevel@tonic-gate
747c478bd9Sstevel@tonic-gate typedef uint8_t u8;
757c478bd9Sstevel@tonic-gate typedef int8_t s8;
767c478bd9Sstevel@tonic-gate typedef uint16_t u16;
777c478bd9Sstevel@tonic-gate typedef int16_t s16;
787c478bd9Sstevel@tonic-gate typedef uint32_t u32;
797c478bd9Sstevel@tonic-gate typedef int32_t s32;
807c478bd9Sstevel@tonic-gate
817c478bd9Sstevel@tonic-gate /* helpful macroes if on a big_endian machine for changing byte order.
827c478bd9Sstevel@tonic-gate not strictly needed on Intel */
837c478bd9Sstevel@tonic-gate #define get_unaligned(ptr) (*(ptr))
847c478bd9Sstevel@tonic-gate #define put_unaligned(val, ptr) ((void)( *(ptr) = (val) ))
857c478bd9Sstevel@tonic-gate #define get_u16(ptr) (*(u16 *)(ptr))
867c478bd9Sstevel@tonic-gate #define virt_to_le32desc(addr) virt_to_bus(addr)
877c478bd9Sstevel@tonic-gate
887c478bd9Sstevel@tonic-gate enum pcistuff {
897c478bd9Sstevel@tonic-gate PCI_USES_IO = 0x01,
907c478bd9Sstevel@tonic-gate PCI_USES_MEM = 0x02,
917c478bd9Sstevel@tonic-gate PCI_USES_MASTER = 0x04,
927c478bd9Sstevel@tonic-gate PCI_ADDR0 = 0x08,
937c478bd9Sstevel@tonic-gate PCI_ADDR1 = 0x10,
947c478bd9Sstevel@tonic-gate };
957c478bd9Sstevel@tonic-gate
967c478bd9Sstevel@tonic-gate /* MMIO operations required */
977c478bd9Sstevel@tonic-gate #define PCI_IOTYPE (PCI_USES_MASTER | PCI_USES_MEM | PCI_ADDR1)
987c478bd9Sstevel@tonic-gate
997c478bd9Sstevel@tonic-gate /* Offsets to the device registers.
1007c478bd9Sstevel@tonic-gate Unlike software-only systems, device drivers interact with complex hardware.
1017c478bd9Sstevel@tonic-gate It's not useful to define symbolic names for every register bit in the
1027c478bd9Sstevel@tonic-gate device.
1037c478bd9Sstevel@tonic-gate */
1047c478bd9Sstevel@tonic-gate enum register_offsets {
1057c478bd9Sstevel@tonic-gate ChipCmd = 0x00,
1067c478bd9Sstevel@tonic-gate ChipConfig = 0x04,
1077c478bd9Sstevel@tonic-gate EECtrl = 0x08,
1087c478bd9Sstevel@tonic-gate PCIBusCfg = 0x0C,
1097c478bd9Sstevel@tonic-gate IntrStatus = 0x10,
1107c478bd9Sstevel@tonic-gate IntrMask = 0x14,
1117c478bd9Sstevel@tonic-gate IntrEnable = 0x18,
1127c478bd9Sstevel@tonic-gate TxRingPtr = 0x20,
1137c478bd9Sstevel@tonic-gate TxConfig = 0x24,
1147c478bd9Sstevel@tonic-gate RxRingPtr = 0x30,
1157c478bd9Sstevel@tonic-gate RxConfig = 0x34,
1167c478bd9Sstevel@tonic-gate ClkRun = 0x3C,
1177c478bd9Sstevel@tonic-gate WOLCmd = 0x40,
1187c478bd9Sstevel@tonic-gate PauseCmd = 0x44,
1197c478bd9Sstevel@tonic-gate RxFilterAddr = 0x48,
1207c478bd9Sstevel@tonic-gate RxFilterData = 0x4C,
1217c478bd9Sstevel@tonic-gate BootRomAddr = 0x50,
1227c478bd9Sstevel@tonic-gate BootRomData = 0x54,
1237c478bd9Sstevel@tonic-gate SiliconRev = 0x58,
1247c478bd9Sstevel@tonic-gate StatsCtrl = 0x5C,
1257c478bd9Sstevel@tonic-gate StatsData = 0x60,
1267c478bd9Sstevel@tonic-gate RxPktErrs = 0x60,
1277c478bd9Sstevel@tonic-gate RxMissed = 0x68,
1287c478bd9Sstevel@tonic-gate RxCRCErrs = 0x64,
1297c478bd9Sstevel@tonic-gate PCIPM = 0x44,
1307c478bd9Sstevel@tonic-gate PhyStatus = 0xC0,
1317c478bd9Sstevel@tonic-gate MIntrCtrl = 0xC4,
1327c478bd9Sstevel@tonic-gate MIntrStatus = 0xC8,
1337c478bd9Sstevel@tonic-gate
1347c478bd9Sstevel@tonic-gate /* These are from the spec, around page 78... on a separate table. */
1357c478bd9Sstevel@tonic-gate PGSEL = 0xCC,
1367c478bd9Sstevel@tonic-gate PMDCSR = 0xE4,
1377c478bd9Sstevel@tonic-gate TSTDAT = 0xFC,
1387c478bd9Sstevel@tonic-gate DSPCFG = 0xF4,
1397c478bd9Sstevel@tonic-gate SDCFG = 0x8C
1407c478bd9Sstevel@tonic-gate };
1417c478bd9Sstevel@tonic-gate
1427c478bd9Sstevel@tonic-gate /* Bit in ChipCmd. */
1437c478bd9Sstevel@tonic-gate enum ChipCmdBits {
1447c478bd9Sstevel@tonic-gate ChipReset = 0x100,
1457c478bd9Sstevel@tonic-gate RxReset = 0x20,
1467c478bd9Sstevel@tonic-gate TxReset = 0x10,
1477c478bd9Sstevel@tonic-gate RxOff = 0x08,
1487c478bd9Sstevel@tonic-gate RxOn = 0x04,
1497c478bd9Sstevel@tonic-gate TxOff = 0x02,
1507c478bd9Sstevel@tonic-gate TxOn = 0x01
1517c478bd9Sstevel@tonic-gate };
1527c478bd9Sstevel@tonic-gate
1537c478bd9Sstevel@tonic-gate /* Bits in the RxMode register. */
1547c478bd9Sstevel@tonic-gate enum rx_mode_bits {
1557c478bd9Sstevel@tonic-gate AcceptErr = 0x20,
1567c478bd9Sstevel@tonic-gate AcceptRunt = 0x10,
1577c478bd9Sstevel@tonic-gate AcceptBroadcast = 0xC0000000,
1587c478bd9Sstevel@tonic-gate AcceptMulticast = 0x00200000,
1597c478bd9Sstevel@tonic-gate AcceptAllMulticast = 0x20000000,
1607c478bd9Sstevel@tonic-gate AcceptAllPhys = 0x10000000,
1617c478bd9Sstevel@tonic-gate AcceptMyPhys = 0x08000000,
1627c478bd9Sstevel@tonic-gate RxFilterEnable = 0x80000000
1637c478bd9Sstevel@tonic-gate };
1647c478bd9Sstevel@tonic-gate
1657c478bd9Sstevel@tonic-gate typedef struct _BufferDesc {
1667c478bd9Sstevel@tonic-gate u32 link;
1677c478bd9Sstevel@tonic-gate volatile u32 cmdsts;
1687c478bd9Sstevel@tonic-gate u32 bufptr;
1697c478bd9Sstevel@tonic-gate u32 software_use;
1707c478bd9Sstevel@tonic-gate } BufferDesc;
1717c478bd9Sstevel@tonic-gate
1727c478bd9Sstevel@tonic-gate /* Bits in network_desc.status */
1737c478bd9Sstevel@tonic-gate enum desc_status_bits {
1747c478bd9Sstevel@tonic-gate DescOwn = 0x80000000,
1757c478bd9Sstevel@tonic-gate DescMore = 0x40000000,
1767c478bd9Sstevel@tonic-gate DescIntr = 0x20000000,
1777c478bd9Sstevel@tonic-gate DescNoCRC = 0x10000000,
1787c478bd9Sstevel@tonic-gate DescPktOK = 0x08000000,
1797c478bd9Sstevel@tonic-gate RxTooLong = 0x00400000
1807c478bd9Sstevel@tonic-gate };
1817c478bd9Sstevel@tonic-gate
1827c478bd9Sstevel@tonic-gate /* Globals */
1837c478bd9Sstevel@tonic-gate
1847c478bd9Sstevel@tonic-gate static int natsemi_debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
1857c478bd9Sstevel@tonic-gate
1867c478bd9Sstevel@tonic-gate const char *nic_name;
1877c478bd9Sstevel@tonic-gate
1887c478bd9Sstevel@tonic-gate static u32 SavedClkRun;
1897c478bd9Sstevel@tonic-gate
1907c478bd9Sstevel@tonic-gate
1917c478bd9Sstevel@tonic-gate static unsigned short vendor, dev_id;
1927c478bd9Sstevel@tonic-gate static unsigned long ioaddr;
1937c478bd9Sstevel@tonic-gate
1947c478bd9Sstevel@tonic-gate static unsigned int cur_rx;
1957c478bd9Sstevel@tonic-gate
1967c478bd9Sstevel@tonic-gate static unsigned int advertising;
1977c478bd9Sstevel@tonic-gate
1987c478bd9Sstevel@tonic-gate static unsigned int rx_config;
1997c478bd9Sstevel@tonic-gate static unsigned int tx_config;
2007c478bd9Sstevel@tonic-gate
2017c478bd9Sstevel@tonic-gate /* Note: transmit and receive buffers and descriptors must be
2027c478bd9Sstevel@tonic-gate longword aligned
2037c478bd9Sstevel@tonic-gate */
2047c478bd9Sstevel@tonic-gate
2057c478bd9Sstevel@tonic-gate static BufferDesc txd __attribute__ ((aligned(4)));
2067c478bd9Sstevel@tonic-gate static BufferDesc rxd[NUM_RX_DESC] __attribute__ ((aligned(4)));
2077c478bd9Sstevel@tonic-gate
2087c478bd9Sstevel@tonic-gate static unsigned char txb[TX_BUF_SIZE] __attribute__ ((aligned(4)));
2097c478bd9Sstevel@tonic-gate static unsigned char rxb[NUM_RX_DESC * RX_BUF_SIZE] __attribute__ ((aligned(4)));
2107c478bd9Sstevel@tonic-gate
2117c478bd9Sstevel@tonic-gate /* Function Prototypes */
2127c478bd9Sstevel@tonic-gate
2137c478bd9Sstevel@tonic-gate static int natsemi_probe(struct dev *dev, struct pci_device *pci);
2147c478bd9Sstevel@tonic-gate static int eeprom_read(long addr, int location);
2157c478bd9Sstevel@tonic-gate static int mdio_read(int phy_id, int location);
2167c478bd9Sstevel@tonic-gate static void natsemi_init(struct nic *nic);
2177c478bd9Sstevel@tonic-gate static void natsemi_reset(struct nic *nic);
2187c478bd9Sstevel@tonic-gate static void natsemi_init_rxfilter(struct nic *nic);
2197c478bd9Sstevel@tonic-gate static void natsemi_init_txd(struct nic *nic);
2207c478bd9Sstevel@tonic-gate static void natsemi_init_rxd(struct nic *nic);
2217c478bd9Sstevel@tonic-gate static void natsemi_set_rx_mode(struct nic *nic);
2227c478bd9Sstevel@tonic-gate static void natsemi_check_duplex(struct nic *nic);
2237c478bd9Sstevel@tonic-gate static void natsemi_transmit(struct nic *nic, const char *d, unsigned int t, unsigned int s, const char *p);
2247c478bd9Sstevel@tonic-gate static int natsemi_poll(struct nic *nic, int retrieve);
2257c478bd9Sstevel@tonic-gate static void natsemi_disable(struct dev *dev);
2267c478bd9Sstevel@tonic-gate static void natsemi_irq(struct nic *nic, irq_action_t action);
2277c478bd9Sstevel@tonic-gate
2287c478bd9Sstevel@tonic-gate /*
2297c478bd9Sstevel@tonic-gate * Function: natsemi_probe
2307c478bd9Sstevel@tonic-gate *
2317c478bd9Sstevel@tonic-gate * Description: Retrieves the MAC address of the card, and sets up some
2327c478bd9Sstevel@tonic-gate * globals required by other routines, and initializes the NIC, making it
2337c478bd9Sstevel@tonic-gate * ready to send and receive packets.
2347c478bd9Sstevel@tonic-gate *
2357c478bd9Sstevel@tonic-gate * Side effects:
2367c478bd9Sstevel@tonic-gate * leaves the ioaddress of the natsemi chip in the variable ioaddr.
2377c478bd9Sstevel@tonic-gate * leaves the natsemi initialized, and ready to recieve packets.
2387c478bd9Sstevel@tonic-gate *
2397c478bd9Sstevel@tonic-gate * Returns: struct nic *: pointer to NIC data structure
2407c478bd9Sstevel@tonic-gate */
2417c478bd9Sstevel@tonic-gate
2427c478bd9Sstevel@tonic-gate static int
natsemi_probe(struct dev * dev,struct pci_device * pci)2437c478bd9Sstevel@tonic-gate natsemi_probe(struct dev *dev, struct pci_device *pci)
2447c478bd9Sstevel@tonic-gate {
2457c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *)dev;
2467c478bd9Sstevel@tonic-gate int i;
2477c478bd9Sstevel@tonic-gate int prev_eedata;
2487c478bd9Sstevel@tonic-gate u32 tmp;
2497c478bd9Sstevel@tonic-gate
2507c478bd9Sstevel@tonic-gate if (pci->ioaddr == 0)
2517c478bd9Sstevel@tonic-gate return 0;
2527c478bd9Sstevel@tonic-gate
2537c478bd9Sstevel@tonic-gate adjust_pci_device(pci);
2547c478bd9Sstevel@tonic-gate
2557c478bd9Sstevel@tonic-gate /* initialize some commonly used globals */
2567c478bd9Sstevel@tonic-gate
2577c478bd9Sstevel@tonic-gate nic->irqno = 0;
2587c478bd9Sstevel@tonic-gate nic->ioaddr = pci->ioaddr & ~3;
2597c478bd9Sstevel@tonic-gate
2607c478bd9Sstevel@tonic-gate ioaddr = pci->ioaddr & ~3;
2617c478bd9Sstevel@tonic-gate vendor = pci->vendor;
2627c478bd9Sstevel@tonic-gate dev_id = pci->dev_id;
2637c478bd9Sstevel@tonic-gate nic_name = pci->name;
2647c478bd9Sstevel@tonic-gate
2657c478bd9Sstevel@tonic-gate /* natsemi has a non-standard PM control register
2667c478bd9Sstevel@tonic-gate * in PCI config space. Some boards apparently need
2677c478bd9Sstevel@tonic-gate * to be brought to D0 in this manner.
2687c478bd9Sstevel@tonic-gate */
2697c478bd9Sstevel@tonic-gate pcibios_read_config_dword(pci->bus, pci->devfn, PCIPM, &tmp);
2707c478bd9Sstevel@tonic-gate if (tmp & (0x03|0x100)) {
2717c478bd9Sstevel@tonic-gate /* D0 state, disable PME assertion */
2727c478bd9Sstevel@tonic-gate u32 newtmp = tmp & ~(0x03|0x100);
2737c478bd9Sstevel@tonic-gate pcibios_write_config_dword(pci->bus, pci->devfn, PCIPM, newtmp);
2747c478bd9Sstevel@tonic-gate }
2757c478bd9Sstevel@tonic-gate
2767c478bd9Sstevel@tonic-gate /* get MAC address */
2777c478bd9Sstevel@tonic-gate
2787c478bd9Sstevel@tonic-gate prev_eedata = eeprom_read(ioaddr, 6);
2797c478bd9Sstevel@tonic-gate for (i = 0; i < 3; i++) {
2807c478bd9Sstevel@tonic-gate int eedata = eeprom_read(ioaddr, i + 7);
2817c478bd9Sstevel@tonic-gate nic->node_addr[i*2] = (eedata << 1) + (prev_eedata >> 15);
2827c478bd9Sstevel@tonic-gate nic->node_addr[i*2+1] = eedata >> 7;
2837c478bd9Sstevel@tonic-gate prev_eedata = eedata;
2847c478bd9Sstevel@tonic-gate }
2857c478bd9Sstevel@tonic-gate
2867c478bd9Sstevel@tonic-gate printf("\nnatsemi_probe: MAC addr %! at ioaddr %#hX\n",
2877c478bd9Sstevel@tonic-gate nic->node_addr, ioaddr);
2887c478bd9Sstevel@tonic-gate printf("natsemi_probe: Vendor:%#hX Device:%#hX\n", vendor, dev_id);
2897c478bd9Sstevel@tonic-gate
2907c478bd9Sstevel@tonic-gate /* Reset the chip to erase any previous misconfiguration. */
2917c478bd9Sstevel@tonic-gate outl(ChipReset, ioaddr + ChipCmd);
2927c478bd9Sstevel@tonic-gate
2937c478bd9Sstevel@tonic-gate advertising = mdio_read(1, 4);
2947c478bd9Sstevel@tonic-gate {
2957c478bd9Sstevel@tonic-gate u32 chip_config = inl(ioaddr + ChipConfig);
2967c478bd9Sstevel@tonic-gate printf("%s: Transceiver default autoneg. %s "
2977c478bd9Sstevel@tonic-gate "10%s %s duplex.\n",
2987c478bd9Sstevel@tonic-gate nic_name,
2997c478bd9Sstevel@tonic-gate chip_config & 0x2000 ? "enabled, advertise" : "disabled, force",
3007c478bd9Sstevel@tonic-gate chip_config & 0x4000 ? "0" : "",
3017c478bd9Sstevel@tonic-gate chip_config & 0x8000 ? "full" : "half");
3027c478bd9Sstevel@tonic-gate }
3037c478bd9Sstevel@tonic-gate printf("%s: Transceiver status %hX advertising %hX\n",
3047c478bd9Sstevel@tonic-gate nic_name, (int)inl(ioaddr + 0x84), advertising);
3057c478bd9Sstevel@tonic-gate
3067c478bd9Sstevel@tonic-gate /* Disable PME:
3077c478bd9Sstevel@tonic-gate * The PME bit is initialized from the EEPROM contents.
3087c478bd9Sstevel@tonic-gate * PCI cards probably have PME disabled, but motherboard
3097c478bd9Sstevel@tonic-gate * implementations may have PME set to enable WakeOnLan.
3107c478bd9Sstevel@tonic-gate * With PME set the chip will scan incoming packets but
3117c478bd9Sstevel@tonic-gate * nothing will be written to memory. */
3127c478bd9Sstevel@tonic-gate SavedClkRun = inl(ioaddr + ClkRun);
3137c478bd9Sstevel@tonic-gate outl(SavedClkRun & ~0x100, ioaddr + ClkRun);
3147c478bd9Sstevel@tonic-gate
3157c478bd9Sstevel@tonic-gate /* initialize device */
3167c478bd9Sstevel@tonic-gate natsemi_init(nic);
3177c478bd9Sstevel@tonic-gate
3187c478bd9Sstevel@tonic-gate dev->disable = natsemi_disable;
3197c478bd9Sstevel@tonic-gate nic->poll = natsemi_poll;
3207c478bd9Sstevel@tonic-gate nic->transmit = natsemi_transmit;
3217c478bd9Sstevel@tonic-gate nic->irq = natsemi_irq;
3227c478bd9Sstevel@tonic-gate
3237c478bd9Sstevel@tonic-gate return 1;
3247c478bd9Sstevel@tonic-gate }
3257c478bd9Sstevel@tonic-gate
3267c478bd9Sstevel@tonic-gate /* Read the EEPROM and MII Management Data I/O (MDIO) interfaces.
3277c478bd9Sstevel@tonic-gate The EEPROM code is for the common 93c06/46 EEPROMs with 6 bit addresses.
3287c478bd9Sstevel@tonic-gate */
3297c478bd9Sstevel@tonic-gate
3307c478bd9Sstevel@tonic-gate /* Delay between EEPROM clock transitions.
3317c478bd9Sstevel@tonic-gate No extra delay is needed with 33Mhz PCI, but future 66Mhz access may need
3327c478bd9Sstevel@tonic-gate a delay. */
3337c478bd9Sstevel@tonic-gate #define eeprom_delay(ee_addr) inl(ee_addr)
3347c478bd9Sstevel@tonic-gate
3357c478bd9Sstevel@tonic-gate enum EEPROM_Ctrl_Bits {
3367c478bd9Sstevel@tonic-gate EE_ShiftClk = 0x04,
3377c478bd9Sstevel@tonic-gate EE_DataIn = 0x01,
3387c478bd9Sstevel@tonic-gate EE_ChipSelect = 0x08,
3397c478bd9Sstevel@tonic-gate EE_DataOut = 0x02
3407c478bd9Sstevel@tonic-gate };
3417c478bd9Sstevel@tonic-gate
3427c478bd9Sstevel@tonic-gate #define EE_Write0 (EE_ChipSelect)
3437c478bd9Sstevel@tonic-gate #define EE_Write1 (EE_ChipSelect | EE_DataIn)
3447c478bd9Sstevel@tonic-gate
3457c478bd9Sstevel@tonic-gate /* The EEPROM commands include the alway-set leading bit. */
3467c478bd9Sstevel@tonic-gate enum EEPROM_Cmds {
3477c478bd9Sstevel@tonic-gate EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6),
3487c478bd9Sstevel@tonic-gate };
3497c478bd9Sstevel@tonic-gate
eeprom_read(long addr,int location)3507c478bd9Sstevel@tonic-gate static int eeprom_read(long addr, int location)
3517c478bd9Sstevel@tonic-gate {
3527c478bd9Sstevel@tonic-gate int i;
3537c478bd9Sstevel@tonic-gate int retval = 0;
3547c478bd9Sstevel@tonic-gate int ee_addr = addr + EECtrl;
3557c478bd9Sstevel@tonic-gate int read_cmd = location | EE_ReadCmd;
3567c478bd9Sstevel@tonic-gate outl(EE_Write0, ee_addr);
3577c478bd9Sstevel@tonic-gate
3587c478bd9Sstevel@tonic-gate /* Shift the read command bits out. */
3597c478bd9Sstevel@tonic-gate for (i = 10; i >= 0; i--) {
3607c478bd9Sstevel@tonic-gate short dataval = (read_cmd & (1 << i)) ? EE_Write1 : EE_Write0;
3617c478bd9Sstevel@tonic-gate outl(dataval, ee_addr);
3627c478bd9Sstevel@tonic-gate eeprom_delay(ee_addr);
3637c478bd9Sstevel@tonic-gate outl(dataval | EE_ShiftClk, ee_addr);
3647c478bd9Sstevel@tonic-gate eeprom_delay(ee_addr);
3657c478bd9Sstevel@tonic-gate }
3667c478bd9Sstevel@tonic-gate outl(EE_ChipSelect, ee_addr);
3677c478bd9Sstevel@tonic-gate eeprom_delay(ee_addr);
3687c478bd9Sstevel@tonic-gate
3697c478bd9Sstevel@tonic-gate for (i = 0; i < 16; i++) {
3707c478bd9Sstevel@tonic-gate outl(EE_ChipSelect | EE_ShiftClk, ee_addr);
3717c478bd9Sstevel@tonic-gate eeprom_delay(ee_addr);
3727c478bd9Sstevel@tonic-gate retval |= (inl(ee_addr) & EE_DataOut) ? 1 << i : 0;
3737c478bd9Sstevel@tonic-gate outl(EE_ChipSelect, ee_addr);
3747c478bd9Sstevel@tonic-gate eeprom_delay(ee_addr);
3757c478bd9Sstevel@tonic-gate }
3767c478bd9Sstevel@tonic-gate
3777c478bd9Sstevel@tonic-gate /* Terminate the EEPROM access. */
3787c478bd9Sstevel@tonic-gate outl(EE_Write0, ee_addr);
3797c478bd9Sstevel@tonic-gate outl(0, ee_addr);
3807c478bd9Sstevel@tonic-gate
3817c478bd9Sstevel@tonic-gate return retval;
3827c478bd9Sstevel@tonic-gate }
3837c478bd9Sstevel@tonic-gate
3847c478bd9Sstevel@tonic-gate /* MII transceiver control section.
3857c478bd9Sstevel@tonic-gate The 83815 series has an internal transceiver, and we present the
3867c478bd9Sstevel@tonic-gate management registers as if they were MII connected. */
3877c478bd9Sstevel@tonic-gate
mdio_read(int phy_id,int location)3887c478bd9Sstevel@tonic-gate static int mdio_read(int phy_id, int location)
3897c478bd9Sstevel@tonic-gate {
3907c478bd9Sstevel@tonic-gate if (phy_id == 1 && location < 32)
3917c478bd9Sstevel@tonic-gate return inl(ioaddr + 0x80 + (location<<2)) & 0xffff;
3927c478bd9Sstevel@tonic-gate else
3937c478bd9Sstevel@tonic-gate return 0xffff;
3947c478bd9Sstevel@tonic-gate }
3957c478bd9Sstevel@tonic-gate
3967c478bd9Sstevel@tonic-gate /* Function: natsemi_init
3977c478bd9Sstevel@tonic-gate *
3987c478bd9Sstevel@tonic-gate * Description: resets the ethernet controller chip and configures
3997c478bd9Sstevel@tonic-gate * registers and data structures required for sending and receiving packets.
4007c478bd9Sstevel@tonic-gate *
4017c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
4027c478bd9Sstevel@tonic-gate *
4037c478bd9Sstevel@tonic-gate * returns: void.
4047c478bd9Sstevel@tonic-gate */
4057c478bd9Sstevel@tonic-gate
4067c478bd9Sstevel@tonic-gate static void
natsemi_init(struct nic * nic)4077c478bd9Sstevel@tonic-gate natsemi_init(struct nic *nic)
4087c478bd9Sstevel@tonic-gate {
4097c478bd9Sstevel@tonic-gate natsemi_reset(nic);
4107c478bd9Sstevel@tonic-gate
4117c478bd9Sstevel@tonic-gate /* Disable PME:
4127c478bd9Sstevel@tonic-gate * The PME bit is initialized from the EEPROM contents.
4137c478bd9Sstevel@tonic-gate * PCI cards probably have PME disabled, but motherboard
4147c478bd9Sstevel@tonic-gate * implementations may have PME set to enable WakeOnLan.
4157c478bd9Sstevel@tonic-gate * With PME set the chip will scan incoming packets but
4167c478bd9Sstevel@tonic-gate * nothing will be written to memory. */
4177c478bd9Sstevel@tonic-gate outl(SavedClkRun & ~0x100, ioaddr + ClkRun);
4187c478bd9Sstevel@tonic-gate
4197c478bd9Sstevel@tonic-gate natsemi_init_rxfilter(nic);
4207c478bd9Sstevel@tonic-gate
4217c478bd9Sstevel@tonic-gate natsemi_init_txd(nic);
4227c478bd9Sstevel@tonic-gate natsemi_init_rxd(nic);
4237c478bd9Sstevel@tonic-gate
4247c478bd9Sstevel@tonic-gate /* Initialize other registers. */
4257c478bd9Sstevel@tonic-gate /* Configure the PCI bus bursts and FIFO thresholds. */
4267c478bd9Sstevel@tonic-gate /* Configure for standard, in-spec Ethernet. */
4277c478bd9Sstevel@tonic-gate if (inl(ioaddr + ChipConfig) & 0x20000000) { /* Full duplex */
4287c478bd9Sstevel@tonic-gate tx_config = 0xD0801002;
4297c478bd9Sstevel@tonic-gate rx_config = 0x10000020;
4307c478bd9Sstevel@tonic-gate } else {
4317c478bd9Sstevel@tonic-gate tx_config = 0x10801002;
4327c478bd9Sstevel@tonic-gate rx_config = 0x0020;
4337c478bd9Sstevel@tonic-gate }
4347c478bd9Sstevel@tonic-gate outl(tx_config, ioaddr + TxConfig);
4357c478bd9Sstevel@tonic-gate outl(rx_config, ioaddr + RxConfig);
4367c478bd9Sstevel@tonic-gate
4377c478bd9Sstevel@tonic-gate natsemi_check_duplex(nic);
4387c478bd9Sstevel@tonic-gate natsemi_set_rx_mode(nic);
4397c478bd9Sstevel@tonic-gate
4407c478bd9Sstevel@tonic-gate outl(RxOn, ioaddr + ChipCmd);
4417c478bd9Sstevel@tonic-gate }
4427c478bd9Sstevel@tonic-gate
4437c478bd9Sstevel@tonic-gate /*
4447c478bd9Sstevel@tonic-gate * Function: natsemi_reset
4457c478bd9Sstevel@tonic-gate *
4467c478bd9Sstevel@tonic-gate * Description: soft resets the controller chip
4477c478bd9Sstevel@tonic-gate *
4487c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
4497c478bd9Sstevel@tonic-gate *
4507c478bd9Sstevel@tonic-gate * Returns: void.
4517c478bd9Sstevel@tonic-gate */
4527c478bd9Sstevel@tonic-gate static void
natsemi_reset(struct nic * nic __unused)4537c478bd9Sstevel@tonic-gate natsemi_reset(struct nic *nic __unused)
4547c478bd9Sstevel@tonic-gate {
4557c478bd9Sstevel@tonic-gate outl(ChipReset, ioaddr + ChipCmd);
4567c478bd9Sstevel@tonic-gate
4577c478bd9Sstevel@tonic-gate /* On page 78 of the spec, they recommend some settings for "optimum
4587c478bd9Sstevel@tonic-gate performance" to be done in sequence. These settings optimize some
4597c478bd9Sstevel@tonic-gate of the 100Mbit autodetection circuitry. Also, we only want to do
4607c478bd9Sstevel@tonic-gate this for rev C of the chip.
4617c478bd9Sstevel@tonic-gate */
4627c478bd9Sstevel@tonic-gate if (inl(ioaddr + SiliconRev) == 0x302) {
4637c478bd9Sstevel@tonic-gate outw(0x0001, ioaddr + PGSEL);
4647c478bd9Sstevel@tonic-gate outw(0x189C, ioaddr + PMDCSR);
4657c478bd9Sstevel@tonic-gate outw(0x0000, ioaddr + TSTDAT);
4667c478bd9Sstevel@tonic-gate outw(0x5040, ioaddr + DSPCFG);
4677c478bd9Sstevel@tonic-gate outw(0x008C, ioaddr + SDCFG);
4687c478bd9Sstevel@tonic-gate }
4697c478bd9Sstevel@tonic-gate /* Disable interrupts using the mask. */
4707c478bd9Sstevel@tonic-gate outl(0, ioaddr + IntrMask);
4717c478bd9Sstevel@tonic-gate outl(0, ioaddr + IntrEnable);
4727c478bd9Sstevel@tonic-gate }
4737c478bd9Sstevel@tonic-gate
4747c478bd9Sstevel@tonic-gate /* Function: natsemi_init_rxfilter
4757c478bd9Sstevel@tonic-gate *
4767c478bd9Sstevel@tonic-gate * Description: sets receive filter address to our MAC address
4777c478bd9Sstevel@tonic-gate *
4787c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
4797c478bd9Sstevel@tonic-gate *
4807c478bd9Sstevel@tonic-gate * returns: void.
4817c478bd9Sstevel@tonic-gate */
4827c478bd9Sstevel@tonic-gate
4837c478bd9Sstevel@tonic-gate static void
natsemi_init_rxfilter(struct nic * nic)4847c478bd9Sstevel@tonic-gate natsemi_init_rxfilter(struct nic *nic)
4857c478bd9Sstevel@tonic-gate {
4867c478bd9Sstevel@tonic-gate int i;
4877c478bd9Sstevel@tonic-gate
4887c478bd9Sstevel@tonic-gate for (i = 0; i < ETH_ALEN; i += 2) {
4897c478bd9Sstevel@tonic-gate outl(i, ioaddr + RxFilterAddr);
4907c478bd9Sstevel@tonic-gate outw(nic->node_addr[i] + (nic->node_addr[i+1] << 8), ioaddr + RxFilterData);
4917c478bd9Sstevel@tonic-gate }
4927c478bd9Sstevel@tonic-gate }
4937c478bd9Sstevel@tonic-gate
4947c478bd9Sstevel@tonic-gate /*
4957c478bd9Sstevel@tonic-gate * Function: natsemi_init_txd
4967c478bd9Sstevel@tonic-gate *
4977c478bd9Sstevel@tonic-gate * Description: initializes the Tx descriptor
4987c478bd9Sstevel@tonic-gate *
4997c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
5007c478bd9Sstevel@tonic-gate *
5017c478bd9Sstevel@tonic-gate * returns: void.
5027c478bd9Sstevel@tonic-gate */
5037c478bd9Sstevel@tonic-gate
5047c478bd9Sstevel@tonic-gate static void
natsemi_init_txd(struct nic * nic __unused)5057c478bd9Sstevel@tonic-gate natsemi_init_txd(struct nic *nic __unused)
5067c478bd9Sstevel@tonic-gate {
5077c478bd9Sstevel@tonic-gate txd.link = (u32) 0;
5087c478bd9Sstevel@tonic-gate txd.cmdsts = (u32) 0;
5097c478bd9Sstevel@tonic-gate txd.bufptr = virt_to_bus(&txb[0]);
5107c478bd9Sstevel@tonic-gate
5117c478bd9Sstevel@tonic-gate /* load Transmit Descriptor Register */
5127c478bd9Sstevel@tonic-gate outl(virt_to_bus(&txd), ioaddr + TxRingPtr);
5137c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
5147c478bd9Sstevel@tonic-gate printf("natsemi_init_txd: TX descriptor register loaded with: %X\n",
5157c478bd9Sstevel@tonic-gate inl(ioaddr + TxRingPtr));
5167c478bd9Sstevel@tonic-gate }
5177c478bd9Sstevel@tonic-gate
5187c478bd9Sstevel@tonic-gate /* Function: natsemi_init_rxd
5197c478bd9Sstevel@tonic-gate *
5207c478bd9Sstevel@tonic-gate * Description: initializes the Rx descriptor ring
5217c478bd9Sstevel@tonic-gate *
5227c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
5237c478bd9Sstevel@tonic-gate *
5247c478bd9Sstevel@tonic-gate * Returns: void.
5257c478bd9Sstevel@tonic-gate */
5267c478bd9Sstevel@tonic-gate
5277c478bd9Sstevel@tonic-gate static void
natsemi_init_rxd(struct nic * nic __unused)5287c478bd9Sstevel@tonic-gate natsemi_init_rxd(struct nic *nic __unused)
5297c478bd9Sstevel@tonic-gate {
5307c478bd9Sstevel@tonic-gate int i;
5317c478bd9Sstevel@tonic-gate
5327c478bd9Sstevel@tonic-gate cur_rx = 0;
5337c478bd9Sstevel@tonic-gate
5347c478bd9Sstevel@tonic-gate /* init RX descriptor */
5357c478bd9Sstevel@tonic-gate for (i = 0; i < NUM_RX_DESC; i++) {
5367c478bd9Sstevel@tonic-gate rxd[i].link = virt_to_bus((i+1 < NUM_RX_DESC) ? &rxd[i+1] : &rxd[0]);
5377c478bd9Sstevel@tonic-gate rxd[i].cmdsts = (u32) RX_BUF_SIZE;
5387c478bd9Sstevel@tonic-gate rxd[i].bufptr = virt_to_bus(&rxb[i*RX_BUF_SIZE]);
5397c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
5407c478bd9Sstevel@tonic-gate printf("natsemi_init_rxd: rxd[%d]=%X link=%X cmdsts=%X bufptr=%X\n",
5417c478bd9Sstevel@tonic-gate i, &rxd[i], rxd[i].link, rxd[i].cmdsts, rxd[i].bufptr);
5427c478bd9Sstevel@tonic-gate }
5437c478bd9Sstevel@tonic-gate
5447c478bd9Sstevel@tonic-gate /* load Receive Descriptor Register */
5457c478bd9Sstevel@tonic-gate outl(virt_to_bus(&rxd[0]), ioaddr + RxRingPtr);
5467c478bd9Sstevel@tonic-gate
5477c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
5487c478bd9Sstevel@tonic-gate printf("natsemi_init_rxd: RX descriptor register loaded with: %X\n",
5497c478bd9Sstevel@tonic-gate inl(ioaddr + RxRingPtr));
5507c478bd9Sstevel@tonic-gate }
5517c478bd9Sstevel@tonic-gate
5527c478bd9Sstevel@tonic-gate /* Function: natsemi_set_rx_mode
5537c478bd9Sstevel@tonic-gate *
5547c478bd9Sstevel@tonic-gate * Description:
5557c478bd9Sstevel@tonic-gate * sets the receive mode to accept all broadcast packets and packets
5567c478bd9Sstevel@tonic-gate * with our MAC address, and reject all multicast packets.
5577c478bd9Sstevel@tonic-gate *
5587c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
5597c478bd9Sstevel@tonic-gate *
5607c478bd9Sstevel@tonic-gate * Returns: void.
5617c478bd9Sstevel@tonic-gate */
5627c478bd9Sstevel@tonic-gate
natsemi_set_rx_mode(struct nic * nic __unused)5637c478bd9Sstevel@tonic-gate static void natsemi_set_rx_mode(struct nic *nic __unused)
5647c478bd9Sstevel@tonic-gate {
5657c478bd9Sstevel@tonic-gate u32 rx_mode = RxFilterEnable | AcceptBroadcast |
5667c478bd9Sstevel@tonic-gate AcceptAllMulticast | AcceptMyPhys;
5677c478bd9Sstevel@tonic-gate
5687c478bd9Sstevel@tonic-gate outl(rx_mode, ioaddr + RxFilterAddr);
5697c478bd9Sstevel@tonic-gate }
5707c478bd9Sstevel@tonic-gate
natsemi_check_duplex(struct nic * nic __unused)5717c478bd9Sstevel@tonic-gate static void natsemi_check_duplex(struct nic *nic __unused)
5727c478bd9Sstevel@tonic-gate {
5737c478bd9Sstevel@tonic-gate int duplex = inl(ioaddr + ChipConfig) & 0x20000000 ? 1 : 0;
5747c478bd9Sstevel@tonic-gate
5757c478bd9Sstevel@tonic-gate if (natsemi_debug)
5767c478bd9Sstevel@tonic-gate printf("%s: Setting %s-duplex based on negotiated link"
5777c478bd9Sstevel@tonic-gate " capability.\n", nic_name,
5787c478bd9Sstevel@tonic-gate duplex ? "full" : "half");
5797c478bd9Sstevel@tonic-gate if (duplex) {
5807c478bd9Sstevel@tonic-gate rx_config |= 0x10000000;
5817c478bd9Sstevel@tonic-gate tx_config |= 0xC0000000;
5827c478bd9Sstevel@tonic-gate } else {
5837c478bd9Sstevel@tonic-gate rx_config &= ~0x10000000;
5847c478bd9Sstevel@tonic-gate tx_config &= ~0xC0000000;
5857c478bd9Sstevel@tonic-gate }
5867c478bd9Sstevel@tonic-gate outl(tx_config, ioaddr + TxConfig);
5877c478bd9Sstevel@tonic-gate outl(rx_config, ioaddr + RxConfig);
5887c478bd9Sstevel@tonic-gate }
5897c478bd9Sstevel@tonic-gate
5907c478bd9Sstevel@tonic-gate /* Function: natsemi_transmit
5917c478bd9Sstevel@tonic-gate *
5927c478bd9Sstevel@tonic-gate * Description: transmits a packet and waits for completion or timeout.
5937c478bd9Sstevel@tonic-gate *
5947c478bd9Sstevel@tonic-gate * Arguments: char d[6]: destination ethernet address.
5957c478bd9Sstevel@tonic-gate * unsigned short t: ethernet protocol type.
5967c478bd9Sstevel@tonic-gate * unsigned short s: size of the data-part of the packet.
5977c478bd9Sstevel@tonic-gate * char *p: the data for the packet.
5987c478bd9Sstevel@tonic-gate *
5997c478bd9Sstevel@tonic-gate * Returns: void.
6007c478bd9Sstevel@tonic-gate */
6017c478bd9Sstevel@tonic-gate
6027c478bd9Sstevel@tonic-gate static void
natsemi_transmit(struct nic * nic,const char * d,unsigned int t,unsigned int s,const char * p)6037c478bd9Sstevel@tonic-gate natsemi_transmit(struct nic *nic,
6047c478bd9Sstevel@tonic-gate const char *d, /* Destination */
6057c478bd9Sstevel@tonic-gate unsigned int t, /* Type */
6067c478bd9Sstevel@tonic-gate unsigned int s, /* size */
6077c478bd9Sstevel@tonic-gate const char *p) /* Packet */
6087c478bd9Sstevel@tonic-gate {
6097c478bd9Sstevel@tonic-gate u32 to, nstype;
6107c478bd9Sstevel@tonic-gate u32 tx_status;
6117c478bd9Sstevel@tonic-gate
6127c478bd9Sstevel@tonic-gate /* Stop the transmitter */
6137c478bd9Sstevel@tonic-gate outl(TxOff, ioaddr + ChipCmd);
6147c478bd9Sstevel@tonic-gate
6157c478bd9Sstevel@tonic-gate /* load Transmit Descriptor Register */
6167c478bd9Sstevel@tonic-gate outl(virt_to_bus(&txd), ioaddr + TxRingPtr);
6177c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
6187c478bd9Sstevel@tonic-gate printf("natsemi_transmit: TX descriptor register loaded with: %X\n",
6197c478bd9Sstevel@tonic-gate inl(ioaddr + TxRingPtr));
6207c478bd9Sstevel@tonic-gate
6217c478bd9Sstevel@tonic-gate memcpy(txb, d, ETH_ALEN);
6227c478bd9Sstevel@tonic-gate memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN);
6237c478bd9Sstevel@tonic-gate nstype = htons(t);
6247c478bd9Sstevel@tonic-gate memcpy(txb + 2 * ETH_ALEN, (char*)&nstype, 2);
6257c478bd9Sstevel@tonic-gate memcpy(txb + ETH_HLEN, p, s);
6267c478bd9Sstevel@tonic-gate
6277c478bd9Sstevel@tonic-gate s += ETH_HLEN;
6287c478bd9Sstevel@tonic-gate s &= DSIZE;
6297c478bd9Sstevel@tonic-gate
6307c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
6317c478bd9Sstevel@tonic-gate printf("natsemi_transmit: sending %d bytes ethtype %hX\n", (int) s, t);
6327c478bd9Sstevel@tonic-gate
6337c478bd9Sstevel@tonic-gate /* pad to minimum packet size */
6347c478bd9Sstevel@tonic-gate while (s < ETH_ZLEN)
6357c478bd9Sstevel@tonic-gate txb[s++] = '\0';
6367c478bd9Sstevel@tonic-gate
6377c478bd9Sstevel@tonic-gate /* set the transmit buffer descriptor and enable Transmit State Machine */
6387c478bd9Sstevel@tonic-gate txd.bufptr = virt_to_bus(&txb[0]);
6397c478bd9Sstevel@tonic-gate txd.cmdsts = (u32) OWN | s;
6407c478bd9Sstevel@tonic-gate
6417c478bd9Sstevel@tonic-gate /* restart the transmitter */
6427c478bd9Sstevel@tonic-gate outl(TxOn, ioaddr + ChipCmd);
6437c478bd9Sstevel@tonic-gate
6447c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
6457c478bd9Sstevel@tonic-gate printf("natsemi_transmit: Queued Tx packet size %d.\n", (int) s);
6467c478bd9Sstevel@tonic-gate
6477c478bd9Sstevel@tonic-gate to = currticks() + TX_TIMEOUT;
6487c478bd9Sstevel@tonic-gate
6497c478bd9Sstevel@tonic-gate while ((((volatile u32) tx_status=txd.cmdsts) & OWN) && (currticks() < to))
6507c478bd9Sstevel@tonic-gate /* wait */ ;
6517c478bd9Sstevel@tonic-gate
6527c478bd9Sstevel@tonic-gate if (currticks() >= to) {
6537c478bd9Sstevel@tonic-gate printf("natsemi_transmit: TX Timeout! Tx status %X.\n", tx_status);
6547c478bd9Sstevel@tonic-gate }
6557c478bd9Sstevel@tonic-gate
6567c478bd9Sstevel@tonic-gate if (!(tx_status & 0x08000000)) {
6577c478bd9Sstevel@tonic-gate printf("natsemi_transmit: Transmit error, Tx status %X.\n", tx_status);
6587c478bd9Sstevel@tonic-gate }
6597c478bd9Sstevel@tonic-gate }
6607c478bd9Sstevel@tonic-gate
6617c478bd9Sstevel@tonic-gate /* Function: natsemi_poll
6627c478bd9Sstevel@tonic-gate *
6637c478bd9Sstevel@tonic-gate * Description: checks for a received packet and returns it if found.
6647c478bd9Sstevel@tonic-gate *
6657c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
6667c478bd9Sstevel@tonic-gate *
6677c478bd9Sstevel@tonic-gate * Returns: 1 if packet was received.
6687c478bd9Sstevel@tonic-gate * 0 if no packet was received.
6697c478bd9Sstevel@tonic-gate *
6707c478bd9Sstevel@tonic-gate * Side effects:
6717c478bd9Sstevel@tonic-gate * Returns (copies) the packet to the array nic->packet.
6727c478bd9Sstevel@tonic-gate * Returns the length of the packet in nic->packetlen.
6737c478bd9Sstevel@tonic-gate */
6747c478bd9Sstevel@tonic-gate
6757c478bd9Sstevel@tonic-gate static int
natsemi_poll(struct nic * nic,int retrieve)6767c478bd9Sstevel@tonic-gate natsemi_poll(struct nic *nic, int retrieve)
6777c478bd9Sstevel@tonic-gate {
6787c478bd9Sstevel@tonic-gate u32 rx_status = rxd[cur_rx].cmdsts;
6797c478bd9Sstevel@tonic-gate int retstat = 0;
6807c478bd9Sstevel@tonic-gate
6817c478bd9Sstevel@tonic-gate if (natsemi_debug > 2)
6827c478bd9Sstevel@tonic-gate printf("natsemi_poll: cur_rx:%d, status:%X\n", cur_rx, rx_status);
6837c478bd9Sstevel@tonic-gate
6847c478bd9Sstevel@tonic-gate if (!(rx_status & OWN))
6857c478bd9Sstevel@tonic-gate return retstat;
6867c478bd9Sstevel@tonic-gate
6877c478bd9Sstevel@tonic-gate if ( ! retrieve ) return 1;
6887c478bd9Sstevel@tonic-gate
6897c478bd9Sstevel@tonic-gate if (natsemi_debug > 1)
6907c478bd9Sstevel@tonic-gate printf("natsemi_poll: got a packet: cur_rx:%d, status:%X\n",
6917c478bd9Sstevel@tonic-gate cur_rx, rx_status);
6927c478bd9Sstevel@tonic-gate
6937c478bd9Sstevel@tonic-gate nic->packetlen = (rx_status & DSIZE) - CRC_SIZE;
6947c478bd9Sstevel@tonic-gate
6957c478bd9Sstevel@tonic-gate if ((rx_status & (DescMore|DescPktOK|RxTooLong)) != DescPktOK) {
6967c478bd9Sstevel@tonic-gate /* corrupted packet received */
6977c478bd9Sstevel@tonic-gate printf("natsemi_poll: Corrupted packet received, buffer status = %X\n",
6987c478bd9Sstevel@tonic-gate rx_status);
6997c478bd9Sstevel@tonic-gate retstat = 0;
7007c478bd9Sstevel@tonic-gate } else {
7017c478bd9Sstevel@tonic-gate /* give packet to higher level routine */
7027c478bd9Sstevel@tonic-gate memcpy(nic->packet, (rxb + cur_rx*RX_BUF_SIZE), nic->packetlen);
7037c478bd9Sstevel@tonic-gate retstat = 1;
7047c478bd9Sstevel@tonic-gate }
7057c478bd9Sstevel@tonic-gate
7067c478bd9Sstevel@tonic-gate /* return the descriptor and buffer to receive ring */
7077c478bd9Sstevel@tonic-gate rxd[cur_rx].cmdsts = RX_BUF_SIZE;
7087c478bd9Sstevel@tonic-gate rxd[cur_rx].bufptr = virt_to_bus(&rxb[cur_rx*RX_BUF_SIZE]);
7097c478bd9Sstevel@tonic-gate
7107c478bd9Sstevel@tonic-gate if (++cur_rx == NUM_RX_DESC)
7117c478bd9Sstevel@tonic-gate cur_rx = 0;
7127c478bd9Sstevel@tonic-gate
7137c478bd9Sstevel@tonic-gate /* re-enable the potentially idle receive state machine */
7147c478bd9Sstevel@tonic-gate outl(RxOn, ioaddr + ChipCmd);
7157c478bd9Sstevel@tonic-gate
7167c478bd9Sstevel@tonic-gate return retstat;
7177c478bd9Sstevel@tonic-gate }
7187c478bd9Sstevel@tonic-gate
7197c478bd9Sstevel@tonic-gate /* Function: natsemi_disable
7207c478bd9Sstevel@tonic-gate *
7217c478bd9Sstevel@tonic-gate * Description: Turns off interrupts and stops Tx and Rx engines
7227c478bd9Sstevel@tonic-gate *
7237c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
7247c478bd9Sstevel@tonic-gate *
7257c478bd9Sstevel@tonic-gate * Returns: void.
7267c478bd9Sstevel@tonic-gate */
7277c478bd9Sstevel@tonic-gate
7287c478bd9Sstevel@tonic-gate static void
natsemi_disable(struct dev * dev)7297c478bd9Sstevel@tonic-gate natsemi_disable(struct dev *dev)
7307c478bd9Sstevel@tonic-gate {
7317c478bd9Sstevel@tonic-gate struct nic *nic = (struct nic *)dev;
7327c478bd9Sstevel@tonic-gate /* merge reset and disable */
7337c478bd9Sstevel@tonic-gate natsemi_init(nic);
7347c478bd9Sstevel@tonic-gate
7357c478bd9Sstevel@tonic-gate /* Disable interrupts using the mask. */
7367c478bd9Sstevel@tonic-gate outl(0, ioaddr + IntrMask);
7377c478bd9Sstevel@tonic-gate outl(0, ioaddr + IntrEnable);
7387c478bd9Sstevel@tonic-gate
7397c478bd9Sstevel@tonic-gate /* Stop the chip's Tx and Rx processes. */
7407c478bd9Sstevel@tonic-gate outl(RxOff | TxOff, ioaddr + ChipCmd);
7417c478bd9Sstevel@tonic-gate
7427c478bd9Sstevel@tonic-gate /* Restore PME enable bit */
7437c478bd9Sstevel@tonic-gate outl(SavedClkRun, ioaddr + ClkRun);
7447c478bd9Sstevel@tonic-gate }
7457c478bd9Sstevel@tonic-gate
7467c478bd9Sstevel@tonic-gate /* Function: natsemi_irq
7477c478bd9Sstevel@tonic-gate *
7487c478bd9Sstevel@tonic-gate * Description: Enable, Disable, or Force interrupts
7497c478bd9Sstevel@tonic-gate *
7507c478bd9Sstevel@tonic-gate * Arguments: struct nic *nic: NIC data structure
7517c478bd9Sstevel@tonic-gate * irq_action_t action: requested action to perform
7527c478bd9Sstevel@tonic-gate *
7537c478bd9Sstevel@tonic-gate * Returns: void.
7547c478bd9Sstevel@tonic-gate */
7557c478bd9Sstevel@tonic-gate
7567c478bd9Sstevel@tonic-gate static void
natsemi_irq(struct nic * nic __unused,irq_action_t action __unused)7577c478bd9Sstevel@tonic-gate natsemi_irq(struct nic *nic __unused, irq_action_t action __unused)
7587c478bd9Sstevel@tonic-gate {
7597c478bd9Sstevel@tonic-gate switch ( action ) {
7607c478bd9Sstevel@tonic-gate case DISABLE :
7617c478bd9Sstevel@tonic-gate break;
7627c478bd9Sstevel@tonic-gate case ENABLE :
7637c478bd9Sstevel@tonic-gate break;
7647c478bd9Sstevel@tonic-gate case FORCE :
7657c478bd9Sstevel@tonic-gate break;
7667c478bd9Sstevel@tonic-gate }
7677c478bd9Sstevel@tonic-gate }
7687c478bd9Sstevel@tonic-gate
7697c478bd9Sstevel@tonic-gate static struct pci_id natsemi_nics[] = {
7707c478bd9Sstevel@tonic-gate PCI_ROM(0x100b, 0x0020, "dp83815", "DP83815"),
7717c478bd9Sstevel@tonic-gate };
7727c478bd9Sstevel@tonic-gate
7737c478bd9Sstevel@tonic-gate struct pci_driver natsemi_driver = {
7747c478bd9Sstevel@tonic-gate .type = NIC_DRIVER,
7757c478bd9Sstevel@tonic-gate .name = "NATSEMI",
7767c478bd9Sstevel@tonic-gate .probe = natsemi_probe,
7777c478bd9Sstevel@tonic-gate .ids = natsemi_nics,
7787c478bd9Sstevel@tonic-gate .id_count = sizeof(natsemi_nics)/sizeof(natsemi_nics[0]),
7797c478bd9Sstevel@tonic-gate .class = 0,
7807c478bd9Sstevel@tonic-gate };
781