1bf21cd93STycho Nightingale /*- 2bf21cd93STycho Nightingale * Copyright (c) 2005 Poul-Henning Kamp 3bf21cd93STycho Nightingale * All rights reserved. 4bf21cd93STycho Nightingale * 5bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without 6bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions 7bf21cd93STycho Nightingale * are met: 8bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright 9bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer. 10bf21cd93STycho Nightingale * 2. Redistributions in binary form must reproduce the above copyright 11bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer in the 12bf21cd93STycho Nightingale * documentation and/or other materials provided with the distribution. 13bf21cd93STycho Nightingale * 14bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15bf21cd93STycho Nightingale * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16bf21cd93STycho Nightingale * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17bf21cd93STycho Nightingale * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18bf21cd93STycho Nightingale * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19bf21cd93STycho Nightingale * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20bf21cd93STycho Nightingale * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21bf21cd93STycho Nightingale * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22bf21cd93STycho Nightingale * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23bf21cd93STycho Nightingale * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24bf21cd93STycho Nightingale * SUCH DAMAGE. 25bf21cd93STycho Nightingale * 26bf21cd93STycho Nightingale * $FreeBSD: head/sys/dev/acpica/acpi_hpet.h 224919 2011-08-16 21:51:29Z mav $ 27bf21cd93STycho Nightingale */ 28bf21cd93STycho Nightingale 29bf21cd93STycho Nightingale #ifndef __ACPI_HPET_H__ 30bf21cd93STycho Nightingale #define __ACPI_HPET_H__ 31bf21cd93STycho Nightingale 32bf21cd93STycho Nightingale #define HPET_MEM_WIDTH 0x400 /* Expected memory region size */ 33bf21cd93STycho Nightingale 34bf21cd93STycho Nightingale /* General registers */ 35bf21cd93STycho Nightingale #define HPET_CAPABILITIES 0x0 /* General capabilities and ID */ 36bf21cd93STycho Nightingale #define HPET_CAP_VENDOR_ID 0xffff0000 37bf21cd93STycho Nightingale #define HPET_CAP_LEG_RT 0x00008000 38bf21cd93STycho Nightingale #define HPET_CAP_COUNT_SIZE 0x00002000 /* 1 = 64-bit, 0 = 32-bit */ 39bf21cd93STycho Nightingale #define HPET_CAP_NUM_TIM 0x00001f00 40bf21cd93STycho Nightingale #define HPET_CAP_REV_ID 0x000000ff 41bf21cd93STycho Nightingale #define HPET_PERIOD 0x4 /* Period (1/hz) of timer */ 42bf21cd93STycho Nightingale #define HPET_CONFIG 0x10 /* General configuration register */ 43bf21cd93STycho Nightingale #define HPET_CNF_LEG_RT 0x00000002 44bf21cd93STycho Nightingale #define HPET_CNF_ENABLE 0x00000001 45bf21cd93STycho Nightingale #define HPET_ISR 0x20 /* General interrupt status register */ 46bf21cd93STycho Nightingale #define HPET_MAIN_COUNTER 0xf0 /* Main counter register */ 47bf21cd93STycho Nightingale 48bf21cd93STycho Nightingale /* Timer registers */ 49bf21cd93STycho Nightingale #define HPET_TIMER_CAP_CNF(x) ((x) * 0x20 + 0x100) 50bf21cd93STycho Nightingale #define HPET_TCAP_INT_ROUTE 0xffffffff00000000 51bf21cd93STycho Nightingale #define HPET_TCAP_FSB_INT_DEL 0x00008000 52bf21cd93STycho Nightingale #define HPET_TCNF_FSB_EN 0x00004000 53bf21cd93STycho Nightingale #define HPET_TCNF_INT_ROUTE 0x00003e00 54bf21cd93STycho Nightingale #define HPET_TCNF_32MODE 0x00000100 55bf21cd93STycho Nightingale #define HPET_TCNF_VAL_SET 0x00000040 56bf21cd93STycho Nightingale #define HPET_TCAP_SIZE 0x00000020 /* 1 = 64-bit, 0 = 32-bit */ 57bf21cd93STycho Nightingale #define HPET_TCAP_PER_INT 0x00000010 /* Supports periodic interrupts */ 58bf21cd93STycho Nightingale #define HPET_TCNF_TYPE 0x00000008 /* 1 = periodic, 0 = one-shot */ 59bf21cd93STycho Nightingale #define HPET_TCNF_INT_ENB 0x00000004 60bf21cd93STycho Nightingale #define HPET_TCNF_INT_TYPE 0x00000002 /* 1 = level triggered, 0 = edge */ 61bf21cd93STycho Nightingale #define HPET_TIMER_COMPARATOR(x) ((x) * 0x20 + 0x108) 62bf21cd93STycho Nightingale #define HPET_TIMER_FSB_VAL(x) ((x) * 0x20 + 0x110) 63bf21cd93STycho Nightingale #define HPET_TIMER_FSB_ADDR(x) ((x) * 0x20 + 0x114) 64bf21cd93STycho Nightingale 65bf21cd93STycho Nightingale #define HPET_MIN_CYCLES 128 /* Period considered reliable. */ 66bf21cd93STycho Nightingale 67bf21cd93STycho Nightingale #endif /* !__ACPI_HPET_H__ */ 68