14c87aefeSPatrick Mooney /*-
24c87aefeSPatrick Mooney * Copyright (c) 2003 Peter Wemm.
34c87aefeSPatrick Mooney * Copyright (c) 1991 Regents of the University of California.
44c87aefeSPatrick Mooney * All rights reserved.
54c87aefeSPatrick Mooney *
64c87aefeSPatrick Mooney * This code is derived from software contributed to Berkeley by
74c87aefeSPatrick Mooney * the Systems Programming Group of the University of Utah Computer
84c87aefeSPatrick Mooney * Science Department and William Jolitz of UUNET Technologies Inc.
94c87aefeSPatrick Mooney *
104c87aefeSPatrick Mooney * Redistribution and use in source and binary forms, with or without
114c87aefeSPatrick Mooney * modification, are permitted provided that the following conditions
124c87aefeSPatrick Mooney * are met:
134c87aefeSPatrick Mooney * 1. Redistributions of source code must retain the above copyright
144c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer.
154c87aefeSPatrick Mooney * 2. Redistributions in binary form must reproduce the above copyright
164c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer in the
174c87aefeSPatrick Mooney * documentation and/or other materials provided with the distribution.
184c87aefeSPatrick Mooney * 4. Neither the name of the University nor the names of its contributors
194c87aefeSPatrick Mooney * may be used to endorse or promote products derived from this software
204c87aefeSPatrick Mooney * without specific prior written permission.
214c87aefeSPatrick Mooney *
224c87aefeSPatrick Mooney * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
234c87aefeSPatrick Mooney * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
244c87aefeSPatrick Mooney * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
254c87aefeSPatrick Mooney * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
264c87aefeSPatrick Mooney * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
274c87aefeSPatrick Mooney * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
284c87aefeSPatrick Mooney * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
294c87aefeSPatrick Mooney * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
304c87aefeSPatrick Mooney * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
314c87aefeSPatrick Mooney * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
324c87aefeSPatrick Mooney * SUCH DAMAGE.
334c87aefeSPatrick Mooney *
344c87aefeSPatrick Mooney * Derived from hp300 version by Mike Hibler, this version by William
354c87aefeSPatrick Mooney * Jolitz uses a recursive map [a pde points to the page directory] to
364c87aefeSPatrick Mooney * map the page tables using the pagetables themselves. This is done to
374c87aefeSPatrick Mooney * reduce the impact on kernel virtual memory for lots of sparse address
384c87aefeSPatrick Mooney * space, and to reduce the cost of memory to each process.
394c87aefeSPatrick Mooney *
404c87aefeSPatrick Mooney * from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
414c87aefeSPatrick Mooney * from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
424c87aefeSPatrick Mooney * $FreeBSD$
434c87aefeSPatrick Mooney */
444c87aefeSPatrick Mooney
454c87aefeSPatrick Mooney #ifndef _MACHINE_PMAP_H_
464c87aefeSPatrick Mooney #define _MACHINE_PMAP_H_
474c87aefeSPatrick Mooney
484c87aefeSPatrick Mooney /*
494c87aefeSPatrick Mooney * Page-directory and page-table entries follow this format, with a few
504c87aefeSPatrick Mooney * of the fields not present here and there, depending on a lot of things.
514c87aefeSPatrick Mooney */
524c87aefeSPatrick Mooney /* ---- Intel Nomenclature ---- */
534c87aefeSPatrick Mooney #define X86_PG_V 0x001 /* P Valid */
544c87aefeSPatrick Mooney #define X86_PG_RW 0x002 /* R/W Read/Write */
554c87aefeSPatrick Mooney #define X86_PG_U 0x004 /* U/S User/Supervisor */
564c87aefeSPatrick Mooney #define X86_PG_NC_PWT 0x008 /* PWT Write through */
574c87aefeSPatrick Mooney #define X86_PG_NC_PCD 0x010 /* PCD Cache disable */
584c87aefeSPatrick Mooney #define X86_PG_A 0x020 /* A Accessed */
594c87aefeSPatrick Mooney #define X86_PG_M 0x040 /* D Dirty */
604c87aefeSPatrick Mooney #define X86_PG_PS 0x080 /* PS Page size (0=4k,1=2M) */
614c87aefeSPatrick Mooney #define X86_PG_PTE_PAT 0x080 /* PAT PAT index */
624c87aefeSPatrick Mooney #define X86_PG_G 0x100 /* G Global */
634c87aefeSPatrick Mooney #define X86_PG_AVAIL1 0x200 /* / Available for system */
644c87aefeSPatrick Mooney #define X86_PG_AVAIL2 0x400 /* < programmers use */
654c87aefeSPatrick Mooney #define X86_PG_AVAIL3 0x800 /* \ */
664c87aefeSPatrick Mooney #define X86_PG_PDE_PAT 0x1000 /* PAT PAT index */
674c87aefeSPatrick Mooney #define X86_PG_NX (1ul<<63) /* No-execute */
684c87aefeSPatrick Mooney #define X86_PG_AVAIL(x) (1ul << (x))
694c87aefeSPatrick Mooney
704c87aefeSPatrick Mooney /* Page level cache control fields used to determine the PAT type */
714c87aefeSPatrick Mooney #define X86_PG_PDE_CACHE (X86_PG_PDE_PAT | X86_PG_NC_PWT | X86_PG_NC_PCD)
724c87aefeSPatrick Mooney #define X86_PG_PTE_CACHE (X86_PG_PTE_PAT | X86_PG_NC_PWT | X86_PG_NC_PCD)
734c87aefeSPatrick Mooney
744c87aefeSPatrick Mooney /*
754c87aefeSPatrick Mooney * Intel extended page table (EPT) bit definitions.
764c87aefeSPatrick Mooney */
774c87aefeSPatrick Mooney #define EPT_PG_READ 0x001 /* R Read */
784c87aefeSPatrick Mooney #define EPT_PG_WRITE 0x002 /* W Write */
794c87aefeSPatrick Mooney #define EPT_PG_EXECUTE 0x004 /* X Execute */
804c87aefeSPatrick Mooney #define EPT_PG_IGNORE_PAT 0x040 /* IPAT Ignore PAT */
814c87aefeSPatrick Mooney #define EPT_PG_PS 0x080 /* PS Page size */
824c87aefeSPatrick Mooney #define EPT_PG_A 0x100 /* A Accessed */
834c87aefeSPatrick Mooney #define EPT_PG_M 0x200 /* D Dirty */
844c87aefeSPatrick Mooney #define EPT_PG_MEMORY_TYPE(x) ((x) << 3) /* MT Memory Type */
854c87aefeSPatrick Mooney
864c87aefeSPatrick Mooney /*
874c87aefeSPatrick Mooney * Define the PG_xx macros in terms of the bits on x86 PTEs.
884c87aefeSPatrick Mooney */
894c87aefeSPatrick Mooney #define PG_V X86_PG_V
904c87aefeSPatrick Mooney #define PG_RW X86_PG_RW
914c87aefeSPatrick Mooney #define PG_U X86_PG_U
924c87aefeSPatrick Mooney #define PG_NC_PWT X86_PG_NC_PWT
934c87aefeSPatrick Mooney #define PG_NC_PCD X86_PG_NC_PCD
944c87aefeSPatrick Mooney #define PG_A X86_PG_A
954c87aefeSPatrick Mooney #define PG_M X86_PG_M
964c87aefeSPatrick Mooney #define PG_PS X86_PG_PS
974c87aefeSPatrick Mooney #define PG_PTE_PAT X86_PG_PTE_PAT
984c87aefeSPatrick Mooney #define PG_G X86_PG_G
994c87aefeSPatrick Mooney #define PG_AVAIL1 X86_PG_AVAIL1
1004c87aefeSPatrick Mooney #define PG_AVAIL2 X86_PG_AVAIL2
1014c87aefeSPatrick Mooney #define PG_AVAIL3 X86_PG_AVAIL3
1024c87aefeSPatrick Mooney #define PG_PDE_PAT X86_PG_PDE_PAT
1034c87aefeSPatrick Mooney #define PG_NX X86_PG_NX
1044c87aefeSPatrick Mooney #define PG_PDE_CACHE X86_PG_PDE_CACHE
1054c87aefeSPatrick Mooney #define PG_PTE_CACHE X86_PG_PTE_CACHE
1064c87aefeSPatrick Mooney
1074c87aefeSPatrick Mooney /* Our various interpretations of the above */
1084c87aefeSPatrick Mooney #define PG_W X86_PG_AVAIL3 /* "Wired" pseudoflag */
1094c87aefeSPatrick Mooney #define PG_MANAGED X86_PG_AVAIL2
1104c87aefeSPatrick Mooney #define EPT_PG_EMUL_V X86_PG_AVAIL(52)
1114c87aefeSPatrick Mooney #define EPT_PG_EMUL_RW X86_PG_AVAIL(53)
1124c87aefeSPatrick Mooney #define PG_PROMOTED X86_PG_AVAIL(54) /* PDE only */
1134c87aefeSPatrick Mooney #define PG_FRAME (0x000ffffffffff000ul)
1144c87aefeSPatrick Mooney #define PG_PS_FRAME (0x000fffffffe00000ul)
1154c87aefeSPatrick Mooney
1164c87aefeSPatrick Mooney /*
1174c87aefeSPatrick Mooney * Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB
1184c87aefeSPatrick Mooney * (PTE) page mappings have identical settings for the following fields:
1194c87aefeSPatrick Mooney */
1204c87aefeSPatrick Mooney #define PG_PTE_PROMOTE (PG_NX | PG_MANAGED | PG_W | PG_G | PG_PTE_CACHE | \
1214c87aefeSPatrick Mooney PG_M | PG_A | PG_U | PG_RW | PG_V)
1224c87aefeSPatrick Mooney
1234c87aefeSPatrick Mooney /*
1244c87aefeSPatrick Mooney * Page Protection Exception bits
1254c87aefeSPatrick Mooney */
1264c87aefeSPatrick Mooney
1274c87aefeSPatrick Mooney #define PGEX_P 0x01 /* Protection violation vs. not present */
1284c87aefeSPatrick Mooney #define PGEX_W 0x02 /* during a Write cycle */
1294c87aefeSPatrick Mooney #define PGEX_U 0x04 /* access from User mode (UPL) */
1304c87aefeSPatrick Mooney #define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
1314c87aefeSPatrick Mooney #define PGEX_I 0x10 /* during an instruction fetch */
1324c87aefeSPatrick Mooney
1334c87aefeSPatrick Mooney /*
1344c87aefeSPatrick Mooney * undef the PG_xx macros that define bits in the regular x86 PTEs that
1354c87aefeSPatrick Mooney * have a different position in nested PTEs. This is done when compiling
1364c87aefeSPatrick Mooney * code that needs to be aware of the differences between regular x86 and
1374c87aefeSPatrick Mooney * nested PTEs.
1384c87aefeSPatrick Mooney *
1394c87aefeSPatrick Mooney * The appropriate bitmask will be calculated at runtime based on the pmap
1404c87aefeSPatrick Mooney * type.
1414c87aefeSPatrick Mooney */
1424c87aefeSPatrick Mooney #ifdef AMD64_NPT_AWARE
1434c87aefeSPatrick Mooney #undef PG_AVAIL1 /* X86_PG_AVAIL1 aliases with EPT_PG_M */
1444c87aefeSPatrick Mooney #undef PG_G
1454c87aefeSPatrick Mooney #undef PG_A
1464c87aefeSPatrick Mooney #undef PG_M
1474c87aefeSPatrick Mooney #undef PG_PDE_PAT
1484c87aefeSPatrick Mooney #undef PG_PDE_CACHE
1494c87aefeSPatrick Mooney #undef PG_PTE_PAT
1504c87aefeSPatrick Mooney #undef PG_PTE_CACHE
1514c87aefeSPatrick Mooney #undef PG_RW
1524c87aefeSPatrick Mooney #undef PG_V
1534c87aefeSPatrick Mooney #endif
1544c87aefeSPatrick Mooney
1554c87aefeSPatrick Mooney /*
1564c87aefeSPatrick Mooney * Pte related macros. This is complicated by having to deal with
1574c87aefeSPatrick Mooney * the sign extension of the 48th bit.
1584c87aefeSPatrick Mooney */
1594c87aefeSPatrick Mooney #define KVADDR(l4, l3, l2, l1) ( \
1604c87aefeSPatrick Mooney ((unsigned long)-1 << 47) | \
1614c87aefeSPatrick Mooney ((unsigned long)(l4) << PML4SHIFT) | \
1624c87aefeSPatrick Mooney ((unsigned long)(l3) << PDPSHIFT) | \
1634c87aefeSPatrick Mooney ((unsigned long)(l2) << PDRSHIFT) | \
1644c87aefeSPatrick Mooney ((unsigned long)(l1) << PAGE_SHIFT))
1654c87aefeSPatrick Mooney
1664c87aefeSPatrick Mooney #define UVADDR(l4, l3, l2, l1) ( \
1674c87aefeSPatrick Mooney ((unsigned long)(l4) << PML4SHIFT) | \
1684c87aefeSPatrick Mooney ((unsigned long)(l3) << PDPSHIFT) | \
1694c87aefeSPatrick Mooney ((unsigned long)(l2) << PDRSHIFT) | \
1704c87aefeSPatrick Mooney ((unsigned long)(l1) << PAGE_SHIFT))
1714c87aefeSPatrick Mooney
1724c87aefeSPatrick Mooney /*
1734c87aefeSPatrick Mooney * Number of kernel PML4 slots. Can be anywhere from 1 to 64 or so,
1744c87aefeSPatrick Mooney * but setting it larger than NDMPML4E makes no sense.
1754c87aefeSPatrick Mooney *
1764c87aefeSPatrick Mooney * Each slot provides .5 TB of kernel virtual space.
1774c87aefeSPatrick Mooney */
1784c87aefeSPatrick Mooney #define NKPML4E 4
1794c87aefeSPatrick Mooney
1804c87aefeSPatrick Mooney #define NUPML4E (NPML4EPG/2) /* number of userland PML4 pages */
1814c87aefeSPatrick Mooney #define NUPDPE (NUPML4E*NPDPEPG)/* number of userland PDP pages */
1824c87aefeSPatrick Mooney #define NUPDE (NUPDPE*NPDEPG) /* number of userland PD entries */
1834c87aefeSPatrick Mooney
1844c87aefeSPatrick Mooney /*
1854c87aefeSPatrick Mooney * NDMPML4E is the maximum number of PML4 entries that will be
1864c87aefeSPatrick Mooney * used to implement the direct map. It must be a power of two,
1874c87aefeSPatrick Mooney * and should generally exceed NKPML4E. The maximum possible
1884c87aefeSPatrick Mooney * value is 64; using 128 will make the direct map intrude into
1894c87aefeSPatrick Mooney * the recursive page table map.
1904c87aefeSPatrick Mooney */
1914c87aefeSPatrick Mooney #define NDMPML4E 8
1924c87aefeSPatrick Mooney
1934c87aefeSPatrick Mooney /*
1944c87aefeSPatrick Mooney * These values control the layout of virtual memory. The starting address
1954c87aefeSPatrick Mooney * of the direct map, which is controlled by DMPML4I, must be a multiple of
1964c87aefeSPatrick Mooney * its size. (See the PHYS_TO_DMAP() and DMAP_TO_PHYS() macros.)
1974c87aefeSPatrick Mooney *
1984c87aefeSPatrick Mooney * Note: KPML4I is the index of the (single) level 4 page that maps
1994c87aefeSPatrick Mooney * the KVA that holds KERNBASE, while KPML4BASE is the index of the
2004c87aefeSPatrick Mooney * first level 4 page that maps VM_MIN_KERNEL_ADDRESS. If NKPML4E
2014c87aefeSPatrick Mooney * is 1, these are the same, otherwise KPML4BASE < KPML4I and extra
2024c87aefeSPatrick Mooney * level 4 PDEs are needed to map from VM_MIN_KERNEL_ADDRESS up to
2034c87aefeSPatrick Mooney * KERNBASE.
2044c87aefeSPatrick Mooney *
2054c87aefeSPatrick Mooney * (KPML4I combines with KPDPI to choose where KERNBASE starts.
2064c87aefeSPatrick Mooney * Or, in other words, KPML4I provides bits 39..47 of KERNBASE,
2074c87aefeSPatrick Mooney * and KPDPI provides bits 30..38.)
2084c87aefeSPatrick Mooney */
2094c87aefeSPatrick Mooney #define PML4PML4I (NPML4EPG/2) /* Index of recursive pml4 mapping */
2104c87aefeSPatrick Mooney
2114c87aefeSPatrick Mooney #define KPML4BASE (NPML4EPG-NKPML4E) /* KVM at highest addresses */
2124c87aefeSPatrick Mooney #define DMPML4I rounddown(KPML4BASE-NDMPML4E, NDMPML4E) /* Below KVM */
2134c87aefeSPatrick Mooney
2144c87aefeSPatrick Mooney #define KPML4I (NPML4EPG-1)
2154c87aefeSPatrick Mooney #define KPDPI (NPDPEPG-2) /* kernbase at -2GB */
2164c87aefeSPatrick Mooney
2174c87aefeSPatrick Mooney /*
2184c87aefeSPatrick Mooney * XXX doesn't really belong here I guess...
2194c87aefeSPatrick Mooney */
2204c87aefeSPatrick Mooney #define ISA_HOLE_START 0xa0000
2214c87aefeSPatrick Mooney #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
2224c87aefeSPatrick Mooney
2234c87aefeSPatrick Mooney #define PMAP_PCID_NONE 0xffffffff
2244c87aefeSPatrick Mooney #define PMAP_PCID_KERN 0
2254c87aefeSPatrick Mooney #define PMAP_PCID_OVERMAX 0x1000
2264c87aefeSPatrick Mooney
2274c87aefeSPatrick Mooney #ifndef LOCORE
2284c87aefeSPatrick Mooney
2294c87aefeSPatrick Mooney #include <sys/queue.h>
2304c87aefeSPatrick Mooney #include <sys/_cpuset.h>
2314c87aefeSPatrick Mooney #include <sys/_lock.h>
2324c87aefeSPatrick Mooney #include <sys/_mutex.h>
2334c87aefeSPatrick Mooney
2344c87aefeSPatrick Mooney #include <vm/_vm_radix.h>
2354c87aefeSPatrick Mooney
2364c87aefeSPatrick Mooney typedef u_int64_t pd_entry_t;
2374c87aefeSPatrick Mooney typedef u_int64_t pt_entry_t;
2384c87aefeSPatrick Mooney typedef u_int64_t pdp_entry_t;
2394c87aefeSPatrick Mooney typedef u_int64_t pml4_entry_t;
2404c87aefeSPatrick Mooney
2414c87aefeSPatrick Mooney /*
2424c87aefeSPatrick Mooney * Address of current address space page table maps and directories.
2434c87aefeSPatrick Mooney */
2444c87aefeSPatrick Mooney #ifdef _KERNEL
2454c87aefeSPatrick Mooney #define addr_PTmap (KVADDR(PML4PML4I, 0, 0, 0))
2464c87aefeSPatrick Mooney #define addr_PDmap (KVADDR(PML4PML4I, PML4PML4I, 0, 0))
2474c87aefeSPatrick Mooney #define addr_PDPmap (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, 0))
2484c87aefeSPatrick Mooney #define addr_PML4map (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I))
2494c87aefeSPatrick Mooney #define addr_PML4pml4e (addr_PML4map + (PML4PML4I * sizeof(pml4_entry_t)))
2504c87aefeSPatrick Mooney #define PTmap ((pt_entry_t *)(addr_PTmap))
2514c87aefeSPatrick Mooney #define PDmap ((pd_entry_t *)(addr_PDmap))
2524c87aefeSPatrick Mooney #define PDPmap ((pd_entry_t *)(addr_PDPmap))
2534c87aefeSPatrick Mooney #define PML4map ((pd_entry_t *)(addr_PML4map))
2544c87aefeSPatrick Mooney #define PML4pml4e ((pd_entry_t *)(addr_PML4pml4e))
2554c87aefeSPatrick Mooney
2564c87aefeSPatrick Mooney extern int nkpt; /* Initial number of kernel page tables */
2574c87aefeSPatrick Mooney extern u_int64_t KPDPphys; /* physical address of kernel level 3 */
2584c87aefeSPatrick Mooney extern u_int64_t KPML4phys; /* physical address of kernel level 4 */
2594c87aefeSPatrick Mooney
2604c87aefeSPatrick Mooney /*
2614c87aefeSPatrick Mooney * virtual address to page table entry and
2624c87aefeSPatrick Mooney * to physical address.
2634c87aefeSPatrick Mooney * Note: these work recursively, thus vtopte of a pte will give
2644c87aefeSPatrick Mooney * the corresponding pde that in turn maps it.
2654c87aefeSPatrick Mooney */
2664c87aefeSPatrick Mooney pt_entry_t *vtopte(vm_offset_t);
2674c87aefeSPatrick Mooney #define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
2684c87aefeSPatrick Mooney
2694c87aefeSPatrick Mooney #define pte_load_store(ptep, pte) atomic_swap_long(ptep, pte)
2704c87aefeSPatrick Mooney #define pte_load_clear(ptep) atomic_swap_long(ptep, 0)
2714c87aefeSPatrick Mooney #define pte_store(ptep, pte) do { \
2724c87aefeSPatrick Mooney *(u_long *)(ptep) = (u_long)(pte); \
2734c87aefeSPatrick Mooney } while (0)
2744c87aefeSPatrick Mooney #define pte_clear(ptep) pte_store(ptep, 0)
2754c87aefeSPatrick Mooney
2764c87aefeSPatrick Mooney #define pde_store(pdep, pde) pte_store(pdep, pde)
2774c87aefeSPatrick Mooney
2784c87aefeSPatrick Mooney extern pt_entry_t pg_nx;
2794c87aefeSPatrick Mooney
2804c87aefeSPatrick Mooney #endif /* _KERNEL */
2814c87aefeSPatrick Mooney
2824c87aefeSPatrick Mooney /*
2834c87aefeSPatrick Mooney * Pmap stuff
2844c87aefeSPatrick Mooney */
2854c87aefeSPatrick Mooney struct pv_entry;
2864c87aefeSPatrick Mooney struct pv_chunk;
2874c87aefeSPatrick Mooney
2884c87aefeSPatrick Mooney /*
2894c87aefeSPatrick Mooney * Locks
2904c87aefeSPatrick Mooney * (p) PV list lock
2914c87aefeSPatrick Mooney */
2924c87aefeSPatrick Mooney struct md_page {
2934c87aefeSPatrick Mooney TAILQ_HEAD(, pv_entry) pv_list; /* (p) */
2944c87aefeSPatrick Mooney int pv_gen; /* (p) */
2954c87aefeSPatrick Mooney int pat_mode;
2964c87aefeSPatrick Mooney };
2974c87aefeSPatrick Mooney
2984c87aefeSPatrick Mooney enum pmap_type {
2994c87aefeSPatrick Mooney PT_X86, /* regular x86 page tables */
3004c87aefeSPatrick Mooney PT_EPT, /* Intel's nested page tables */
3014c87aefeSPatrick Mooney PT_RVI, /* AMD's nested page tables */
3024c87aefeSPatrick Mooney };
3034c87aefeSPatrick Mooney
3044c87aefeSPatrick Mooney struct pmap_pcids {
3054c87aefeSPatrick Mooney uint32_t pm_pcid;
3064c87aefeSPatrick Mooney uint32_t pm_gen;
3074c87aefeSPatrick Mooney };
3084c87aefeSPatrick Mooney
3094c87aefeSPatrick Mooney /*
3104c87aefeSPatrick Mooney * The kernel virtual address (KVA) of the level 4 page table page is always
3114c87aefeSPatrick Mooney * within the direct map (DMAP) region.
3124c87aefeSPatrick Mooney */
3134c87aefeSPatrick Mooney struct pmap {
3144c87aefeSPatrick Mooney struct mtx pm_mtx;
3154c87aefeSPatrick Mooney pml4_entry_t *pm_pml4; /* KVA of level 4 page table */
3164c87aefeSPatrick Mooney uint64_t pm_cr3;
3174c87aefeSPatrick Mooney TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
3184c87aefeSPatrick Mooney cpuset_t pm_active; /* active on cpus */
3194c87aefeSPatrick Mooney enum pmap_type pm_type; /* regular or nested tables */
3204c87aefeSPatrick Mooney struct pmap_statistics pm_stats; /* pmap statistics */
3214c87aefeSPatrick Mooney struct vm_radix pm_root; /* spare page table pages */
3224c87aefeSPatrick Mooney long pm_eptgen; /* EPT pmap generation id */
3234c87aefeSPatrick Mooney int pm_flags;
3244c87aefeSPatrick Mooney struct pmap_pcids pm_pcids[MAXCPU];
3254c87aefeSPatrick Mooney };
3264c87aefeSPatrick Mooney
3274c87aefeSPatrick Mooney /* flags */
3284c87aefeSPatrick Mooney #define PMAP_NESTED_IPIMASK 0xff
3294c87aefeSPatrick Mooney #define PMAP_PDE_SUPERPAGE (1 << 8) /* supports 2MB superpages */
3304c87aefeSPatrick Mooney #define PMAP_EMULATE_AD_BITS (1 << 9) /* needs A/D bits emulation */
3314c87aefeSPatrick Mooney #define PMAP_SUPPORTS_EXEC_ONLY (1 << 10) /* execute only mappings ok */
3324c87aefeSPatrick Mooney
3334c87aefeSPatrick Mooney typedef struct pmap *pmap_t;
3344c87aefeSPatrick Mooney
3354c87aefeSPatrick Mooney #ifdef _KERNEL
3364c87aefeSPatrick Mooney extern struct pmap kernel_pmap_store;
3374c87aefeSPatrick Mooney #define kernel_pmap (&kernel_pmap_store)
3384c87aefeSPatrick Mooney
3394c87aefeSPatrick Mooney #define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
3404c87aefeSPatrick Mooney #define PMAP_LOCK_ASSERT(pmap, type) \
3414c87aefeSPatrick Mooney mtx_assert(&(pmap)->pm_mtx, (type))
3424c87aefeSPatrick Mooney #define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
3434c87aefeSPatrick Mooney #define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
3444c87aefeSPatrick Mooney NULL, MTX_DEF | MTX_DUPOK)
3454c87aefeSPatrick Mooney #define PMAP_LOCKED(pmap) mtx_owned(&(pmap)->pm_mtx)
3464c87aefeSPatrick Mooney #define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
3474c87aefeSPatrick Mooney #define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
3484c87aefeSPatrick Mooney #define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
3494c87aefeSPatrick Mooney
3504c87aefeSPatrick Mooney int pmap_pinit_type(pmap_t pmap, enum pmap_type pm_type, int flags);
3514c87aefeSPatrick Mooney int pmap_emulate_accessed_dirty(pmap_t pmap, vm_offset_t va, int ftype);
3524c87aefeSPatrick Mooney #endif
3534c87aefeSPatrick Mooney
3544c87aefeSPatrick Mooney /*
3554c87aefeSPatrick Mooney * For each vm_page_t, there is a list of all currently valid virtual
3564c87aefeSPatrick Mooney * mappings of that page. An entry is a pv_entry_t, the list is pv_list.
3574c87aefeSPatrick Mooney */
3584c87aefeSPatrick Mooney typedef struct pv_entry {
3594c87aefeSPatrick Mooney vm_offset_t pv_va; /* virtual address for mapping */
3604c87aefeSPatrick Mooney TAILQ_ENTRY(pv_entry) pv_next;
3614c87aefeSPatrick Mooney } *pv_entry_t;
3624c87aefeSPatrick Mooney
3634c87aefeSPatrick Mooney /*
3644c87aefeSPatrick Mooney * pv_entries are allocated in chunks per-process. This avoids the
3654c87aefeSPatrick Mooney * need to track per-pmap assignments.
3664c87aefeSPatrick Mooney */
3674c87aefeSPatrick Mooney #define _NPCM 3
3684c87aefeSPatrick Mooney #define _NPCPV 168
3694c87aefeSPatrick Mooney struct pv_chunk {
3704c87aefeSPatrick Mooney pmap_t pc_pmap;
3714c87aefeSPatrick Mooney TAILQ_ENTRY(pv_chunk) pc_list;
3724c87aefeSPatrick Mooney uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */
3734c87aefeSPatrick Mooney TAILQ_ENTRY(pv_chunk) pc_lru;
3744c87aefeSPatrick Mooney struct pv_entry pc_pventry[_NPCPV];
3754c87aefeSPatrick Mooney };
3764c87aefeSPatrick Mooney
3774c87aefeSPatrick Mooney #ifdef _KERNEL
3784c87aefeSPatrick Mooney
3794c87aefeSPatrick Mooney extern caddr_t CADDR1;
3804c87aefeSPatrick Mooney extern pt_entry_t *CMAP1;
3814c87aefeSPatrick Mooney extern vm_paddr_t phys_avail[];
3824c87aefeSPatrick Mooney extern vm_paddr_t dump_avail[];
3834c87aefeSPatrick Mooney extern vm_offset_t virtual_avail;
3844c87aefeSPatrick Mooney extern vm_offset_t virtual_end;
3854c87aefeSPatrick Mooney extern vm_paddr_t dmaplimit;
3864c87aefeSPatrick Mooney extern int pmap_pcid_enabled;
3874c87aefeSPatrick Mooney extern int invpcid_works;
3884c87aefeSPatrick Mooney
3894c87aefeSPatrick Mooney #define pmap_page_get_memattr(m) ((vm_memattr_t)(m)->md.pat_mode)
3904c87aefeSPatrick Mooney #define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0)
3914c87aefeSPatrick Mooney #define pmap_unmapbios(va, sz) pmap_unmapdev((va), (sz))
3924c87aefeSPatrick Mooney
3934c87aefeSPatrick Mooney struct thread;
3944c87aefeSPatrick Mooney
3954c87aefeSPatrick Mooney void pmap_activate_sw(struct thread *);
3964c87aefeSPatrick Mooney void pmap_bootstrap(vm_paddr_t *);
3974c87aefeSPatrick Mooney int pmap_cache_bits(pmap_t pmap, int mode, boolean_t is_pde);
3984c87aefeSPatrick Mooney int pmap_change_attr(vm_offset_t, vm_size_t, int);
3994c87aefeSPatrick Mooney void pmap_demote_DMAP(vm_paddr_t base, vm_size_t len, boolean_t invalidate);
4004c87aefeSPatrick Mooney void pmap_init_pat(void);
4014c87aefeSPatrick Mooney void pmap_kenter(vm_offset_t va, vm_paddr_t pa);
4024c87aefeSPatrick Mooney void *pmap_kenter_temporary(vm_paddr_t pa, int i);
4034c87aefeSPatrick Mooney vm_paddr_t pmap_kextract(vm_offset_t);
4044c87aefeSPatrick Mooney void pmap_kremove(vm_offset_t);
4054c87aefeSPatrick Mooney void *pmap_mapbios(vm_paddr_t, vm_size_t);
4064c87aefeSPatrick Mooney void *pmap_mapdev(vm_paddr_t, vm_size_t);
4074c87aefeSPatrick Mooney void *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
4084c87aefeSPatrick Mooney boolean_t pmap_page_is_mapped(vm_page_t m);
4094c87aefeSPatrick Mooney void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
4104c87aefeSPatrick Mooney void pmap_pinit_pml4(vm_page_t);
4114c87aefeSPatrick Mooney void pmap_unmapdev(vm_offset_t, vm_size_t);
4124c87aefeSPatrick Mooney void pmap_invalidate_page(pmap_t, vm_offset_t);
4134c87aefeSPatrick Mooney void pmap_invalidate_range(pmap_t, vm_offset_t, vm_offset_t);
4144c87aefeSPatrick Mooney void pmap_invalidate_all(pmap_t);
4154c87aefeSPatrick Mooney void pmap_invalidate_cache(void);
4164c87aefeSPatrick Mooney void pmap_invalidate_cache_pages(vm_page_t *pages, int count);
4174c87aefeSPatrick Mooney void pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva,
4184c87aefeSPatrick Mooney boolean_t force);
4194c87aefeSPatrick Mooney void pmap_get_mapping(pmap_t pmap, vm_offset_t va, uint64_t *ptr, int *num);
4204c87aefeSPatrick Mooney boolean_t pmap_map_io_transient(vm_page_t *, vm_offset_t *, int, boolean_t);
4214c87aefeSPatrick Mooney void pmap_unmap_io_transient(vm_page_t *, vm_offset_t *, int, boolean_t);
4224c87aefeSPatrick Mooney #endif /* _KERNEL */
4234c87aefeSPatrick Mooney
4244c87aefeSPatrick Mooney /* Return various clipped indexes for a given VA */
4254c87aefeSPatrick Mooney static __inline vm_pindex_t
pmap_pte_index(vm_offset_t va)4264c87aefeSPatrick Mooney pmap_pte_index(vm_offset_t va)
4274c87aefeSPatrick Mooney {
4284c87aefeSPatrick Mooney
4294c87aefeSPatrick Mooney return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
4304c87aefeSPatrick Mooney }
4314c87aefeSPatrick Mooney
4324c87aefeSPatrick Mooney static __inline vm_pindex_t
pmap_pde_index(vm_offset_t va)4334c87aefeSPatrick Mooney pmap_pde_index(vm_offset_t va)
4344c87aefeSPatrick Mooney {
4354c87aefeSPatrick Mooney
4364c87aefeSPatrick Mooney return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
4374c87aefeSPatrick Mooney }
4384c87aefeSPatrick Mooney
4394c87aefeSPatrick Mooney static __inline vm_pindex_t
pmap_pdpe_index(vm_offset_t va)4404c87aefeSPatrick Mooney pmap_pdpe_index(vm_offset_t va)
4414c87aefeSPatrick Mooney {
4424c87aefeSPatrick Mooney
4434c87aefeSPatrick Mooney return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
4444c87aefeSPatrick Mooney }
4454c87aefeSPatrick Mooney
4464c87aefeSPatrick Mooney static __inline vm_pindex_t
pmap_pml4e_index(vm_offset_t va)4474c87aefeSPatrick Mooney pmap_pml4e_index(vm_offset_t va)
4484c87aefeSPatrick Mooney {
4494c87aefeSPatrick Mooney
4504c87aefeSPatrick Mooney return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
4514c87aefeSPatrick Mooney }
4524c87aefeSPatrick Mooney
4534c87aefeSPatrick Mooney #endif /* !LOCORE */
4544c87aefeSPatrick Mooney
4554c87aefeSPatrick Mooney #endif /* !_MACHINE_PMAP_H_ */
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