xref: /illumos-gate/usr/src/cmd/bhyvectl/bhyvectl.c (revision 54cf5b63)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011 NetApp, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 /*
31  * This file and its contents are supplied under the terms of the
32  * Common Development and Distribution License ("CDDL"), version 1.0.
33  * You may only use this file in accordance with the terms of version
34  * 1.0 of the CDDL.
35  *
36  * A full copy of the text of the CDDL should have accompanied this
37  * source.  A copy of the CDDL is also available via the Internet at
38  * http://www.illumos.org/license/CDDL.
39  *
40  * Copyright 2015 Pluribus Networks Inc.
41  * Copyright 2019 Joyent, Inc.
42  * Copyright 2022 Oxide Computer Company
43  */
44 
45 #include <sys/cdefs.h>
46 __FBSDID("$FreeBSD$");
47 
48 #include <sys/param.h>
49 #include <sys/types.h>
50 #include <sys/sysctl.h>
51 #include <sys/errno.h>
52 #include <sys/mman.h>
53 #include <sys/cpuset.h>
54 #include <sys/fp.h>
55 
56 #include <stdio.h>
57 #include <stdlib.h>
58 #include <stdbool.h>
59 #include <string.h>
60 #include <unistd.h>
61 #include <libgen.h>
62 #include <libutil.h>
63 #include <fcntl.h>
64 #include <getopt.h>
65 #include <time.h>
66 #include <assert.h>
67 #include <libutil.h>
68 
69 #include <machine/cpufunc.h>
70 #include <machine/specialreg.h>
71 #include <machine/vmm.h>
72 #include <machine/vmm_dev.h>
73 #include <sys/vmm_data.h>
74 #include <vmmapi.h>
75 
76 #include "amd/vmcb.h"
77 #include "intel/vmcs.h"
78 
79 #define	MB	(1UL << 20)
80 #define	GB	(1UL << 30)
81 
82 #define	REQ_ARG		required_argument
83 #define	NO_ARG		no_argument
84 #define	OPT_ARG		optional_argument
85 
86 static const char *progname;
87 
88 static void
usage(bool cpu_intel)89 usage(bool cpu_intel)
90 {
91 
92 	(void)fprintf(stderr,
93 	"Usage: %s --vm=<vmname>\n"
94 	"       [--cpu=<vcpu_number>]\n"
95 	"       [--create]\n"
96 	"       [--destroy]\n"
97 	"       [--pmtmr-port=ioport]\n"
98 	"       [--wrlock-cycle]\n"
99 	"       [--get-all]\n"
100 	"       [--get-stats]\n"
101 	"       [--set-desc-ds]\n"
102 	"       [--get-desc-ds]\n"
103 	"       [--set-desc-es]\n"
104 	"       [--get-desc-es]\n"
105 	"       [--set-desc-gs]\n"
106 	"       [--get-desc-gs]\n"
107 	"       [--set-desc-fs]\n"
108 	"       [--get-desc-fs]\n"
109 	"       [--set-desc-cs]\n"
110 	"       [--get-desc-cs]\n"
111 	"       [--set-desc-ss]\n"
112 	"       [--get-desc-ss]\n"
113 	"       [--set-desc-tr]\n"
114 	"       [--get-desc-tr]\n"
115 	"       [--set-desc-ldtr]\n"
116 	"       [--get-desc-ldtr]\n"
117 	"       [--set-desc-gdtr]\n"
118 	"       [--get-desc-gdtr]\n"
119 	"       [--set-desc-idtr]\n"
120 	"       [--get-desc-idtr]\n"
121 	"       [--run]\n"
122 	"       [--capname=<capname>]\n"
123 	"       [--getcap]\n"
124 	"       [--setcap=<0|1>]\n"
125 	"       [--desc-base=<BASE>]\n"
126 	"       [--desc-limit=<LIMIT>]\n"
127 	"       [--desc-access=<ACCESS>]\n"
128 	"       [--set-cr0=<CR0>]\n"
129 	"       [--get-cr0]\n"
130 	"       [--set-cr2=<CR2>]\n"
131 	"       [--get-cr2]\n"
132 	"       [--set-cr3=<CR3>]\n"
133 	"       [--get-cr3]\n"
134 	"       [--set-cr4=<CR4>]\n"
135 	"       [--get-cr4]\n"
136 	"       [--set-dr0=<DR0>]\n"
137 	"       [--get-dr0]\n"
138 	"       [--set-dr1=<DR1>]\n"
139 	"       [--get-dr1]\n"
140 	"       [--set-dr2=<DR2>]\n"
141 	"       [--get-dr2]\n"
142 	"       [--set-dr3=<DR3>]\n"
143 	"       [--get-dr3]\n"
144 	"       [--set-dr6=<DR6>]\n"
145 	"       [--get-dr6]\n"
146 	"       [--set-dr7=<DR7>]\n"
147 	"       [--get-dr7]\n"
148 	"       [--set-rsp=<RSP>]\n"
149 	"       [--get-rsp]\n"
150 	"       [--set-rip=<RIP>]\n"
151 	"       [--get-rip]\n"
152 	"       [--get-rax]\n"
153 	"       [--set-rax=<RAX>]\n"
154 	"       [--get-rbx]\n"
155 	"       [--get-rcx]\n"
156 	"       [--get-rdx]\n"
157 	"       [--get-rsi]\n"
158 	"       [--get-rdi]\n"
159 	"       [--get-rbp]\n"
160 	"       [--get-r8]\n"
161 	"       [--get-r9]\n"
162 	"       [--get-r10]\n"
163 	"       [--get-r11]\n"
164 	"       [--get-r12]\n"
165 	"       [--get-r13]\n"
166 	"       [--get-r14]\n"
167 	"       [--get-r15]\n"
168 	"       [--set-rflags=<RFLAGS>]\n"
169 	"       [--get-rflags]\n"
170 	"       [--set-cs]\n"
171 	"       [--get-cs]\n"
172 	"       [--set-ds]\n"
173 	"       [--get-ds]\n"
174 	"       [--set-es]\n"
175 	"       [--get-es]\n"
176 	"       [--set-fs]\n"
177 	"       [--get-fs]\n"
178 	"       [--set-gs]\n"
179 	"       [--get-gs]\n"
180 	"       [--set-ss]\n"
181 	"       [--get-ss]\n"
182 	"       [--get-tr]\n"
183 	"       [--get-ldtr]\n"
184 	"       [--set-x2apic-state=<state>]\n"
185 	"       [--get-x2apic-state]\n"
186 	"       [--set-mem=<memory in units of MB>]\n"
187 	"       [--get-lowmem]\n"
188 	"       [--get-highmem]\n"
189 	"       [--get-gpa-pmap]\n"
190 	"       [--assert-lapic-lvt=<pin>]\n"
191 	"       [--inject-nmi]\n"
192 	"       [--force-reset]\n"
193 	"       [--force-poweroff]\n"
194 	"       [--get-rtc-time]\n"
195 	"       [--set-rtc-time=<secs>]\n"
196 	"       [--get-rtc-nvram]\n"
197 	"       [--set-rtc-nvram=<val>]\n"
198 	"       [--rtc-nvram-offset=<offset>]\n"
199 	"       [--get-active-cpus]\n"
200 	"       [--get-suspended-cpus]\n"
201 	"       [--get-intinfo]\n"
202 	"       [--get-eptp]\n"
203 	"       [--set-exception-bitmap]\n"
204 	"       [--get-exception-bitmap]\n"
205 	"       [--get-tsc-offset]\n"
206 	"       [--get-guest-pat]\n"
207 	"       [--get-io-bitmap-address]\n"
208 	"       [--get-msr-bitmap]\n"
209 	"       [--get-msr-bitmap-address]\n"
210 	"       [--get-guest-sysenter]\n"
211 	"       [--get-exit-reason]\n"
212 	"       [--get-cpu-topology]\n",
213 	progname);
214 
215 	if (cpu_intel) {
216 		(void)fprintf(stderr,
217 		"       [--get-vmcs-pinbased-ctls]\n"
218 		"       [--get-vmcs-procbased-ctls]\n"
219 		"       [--get-vmcs-procbased-ctls2]\n"
220 		"       [--get-vmcs-entry-interruption-info]\n"
221 		"       [--set-vmcs-entry-interruption-info=<info>]\n"
222 		"       [--get-vmcs-guest-physical-address\n"
223 		"       [--get-vmcs-guest-linear-address\n"
224 		"       [--get-vmcs-host-pat]\n"
225 		"       [--get-vmcs-host-cr0]\n"
226 		"       [--get-vmcs-host-cr3]\n"
227 		"       [--get-vmcs-host-cr4]\n"
228 		"       [--get-vmcs-host-rip]\n"
229 		"       [--get-vmcs-host-rsp]\n"
230 		"       [--get-vmcs-cr0-mask]\n"
231 		"       [--get-vmcs-cr0-shadow]\n"
232 		"       [--get-vmcs-cr4-mask]\n"
233 		"       [--get-vmcs-cr4-shadow]\n"
234 		"       [--get-vmcs-cr3-targets]\n"
235 		"       [--get-vmcs-apic-access-address]\n"
236 		"       [--get-vmcs-virtual-apic-address]\n"
237 		"       [--get-vmcs-tpr-threshold]\n"
238 		"       [--get-vmcs-vpid]\n"
239 		"       [--get-vmcs-instruction-error]\n"
240 		"       [--get-vmcs-exit-ctls]\n"
241 		"       [--get-vmcs-entry-ctls]\n"
242 		"       [--get-vmcs-link]\n"
243 		"       [--get-vmcs-exit-qualification]\n"
244 		"       [--get-vmcs-exit-interruption-info]\n"
245 		"       [--get-vmcs-exit-interruption-error]\n"
246 		"       [--get-vmcs-interruptibility]\n"
247 		);
248 	} else {
249 		(void)fprintf(stderr,
250 		"       [--get-vmcb-intercepts]\n"
251 		"       [--get-vmcb-asid]\n"
252 		"       [--get-vmcb-exit-details]\n"
253 		"       [--get-vmcb-tlb-ctrl]\n"
254 		"       [--get-vmcb-virq]\n"
255 		"       [--get-avic-apic-bar]\n"
256 		"       [--get-avic-backing-page]\n"
257 		"       [--get-avic-table]\n"
258 		);
259 	}
260 	exit(1);
261 }
262 
263 static int get_rtc_time, set_rtc_time;
264 static int get_rtc_nvram, set_rtc_nvram;
265 static int rtc_nvram_offset;
266 static uint8_t rtc_nvram_value;
267 static time_t rtc_secs;
268 
269 static int get_stats, getcap, setcap, capval, get_gpa_pmap;
270 static int inject_nmi, assert_lapic_lvt;
271 static int force_reset, force_poweroff;
272 static const char *capname;
273 static int create, destroy, get_memmap, get_memseg;
274 static int get_intinfo;
275 static int get_active_cpus, get_suspended_cpus;
276 static uint64_t memsize;
277 static int set_cr0, get_cr0, set_cr2, get_cr2, set_cr3, get_cr3;
278 static int set_cr4, get_cr4;
279 static int set_efer, get_efer;
280 static int set_dr0, get_dr0;
281 static int set_dr1, get_dr1;
282 static int set_dr2, get_dr2;
283 static int set_dr3, get_dr3;
284 static int set_dr6, get_dr6;
285 static int set_dr7, get_dr7;
286 static int set_rsp, get_rsp, set_rip, get_rip, set_rflags, get_rflags;
287 static int set_rax, get_rax;
288 static int get_rbx, get_rcx, get_rdx, get_rsi, get_rdi, get_rbp;
289 static int get_r8, get_r9, get_r10, get_r11, get_r12, get_r13, get_r14, get_r15;
290 static int set_desc_ds, get_desc_ds;
291 static int set_desc_es, get_desc_es;
292 static int set_desc_fs, get_desc_fs;
293 static int set_desc_gs, get_desc_gs;
294 static int set_desc_cs, get_desc_cs;
295 static int set_desc_ss, get_desc_ss;
296 static int set_desc_gdtr, get_desc_gdtr;
297 static int set_desc_idtr, get_desc_idtr;
298 static int set_desc_tr, get_desc_tr;
299 static int set_desc_ldtr, get_desc_ldtr;
300 static int set_cs, set_ds, set_es, set_fs, set_gs, set_ss, set_tr, set_ldtr;
301 static int get_cs, get_ds, get_es, get_fs, get_gs, get_ss, get_tr, get_ldtr;
302 static int set_x2apic_state, get_x2apic_state;
303 enum x2apic_state x2apic_state;
304 static int run;
305 static int get_cpu_topology;
306 static int pmtmr_port;
307 static int wrlock_cycle;
308 static int get_fpu;
309 
310 /*
311  * VMCB specific.
312  */
313 static int get_vmcb_intercept, get_vmcb_exit_details, get_vmcb_tlb_ctrl;
314 static int get_vmcb_virq, get_avic_table;
315 
316 /*
317  * VMCS-specific fields
318  */
319 static int get_pinbased_ctls, get_procbased_ctls, get_procbased_ctls2;
320 static int get_eptp, get_io_bitmap, get_tsc_offset;
321 static int get_vmcs_entry_interruption_info, set_vmcs_entry_interruption_info;
322 static int get_vmcs_interruptibility;
323 uint32_t vmcs_entry_interruption_info;
324 static int get_vmcs_gpa, get_vmcs_gla;
325 static int get_exception_bitmap, set_exception_bitmap, exception_bitmap;
326 static int get_cr0_mask, get_cr0_shadow;
327 static int get_cr4_mask, get_cr4_shadow;
328 static int get_cr3_targets;
329 static int get_apic_access_addr, get_virtual_apic_addr, get_tpr_threshold;
330 static int get_msr_bitmap, get_msr_bitmap_address;
331 static int get_guest_msrs;
332 static int get_vpid_asid;
333 static int get_inst_err, get_exit_ctls, get_entry_ctls;
334 static int get_host_cr0, get_host_cr3, get_host_cr4;
335 static int get_host_rip, get_host_rsp;
336 static int get_host_pat;
337 static int get_vmcs_link;
338 static int get_exit_reason, get_vmcs_exit_qualification;
339 static int get_vmcs_exit_interruption_info, get_vmcs_exit_interruption_error;
340 static int get_vmcs_exit_inst_length;
341 
342 static uint64_t desc_base;
343 static uint32_t desc_limit, desc_access;
344 
345 static int get_all;
346 
347 static void
dump_vm_run_exitcode(struct vm_exit * vmexit,int vcpu)348 dump_vm_run_exitcode(struct vm_exit *vmexit, int vcpu)
349 {
350 	printf("vm exit[%d]\n", vcpu);
351 	printf("\trip\t\t0x%016lx\n", vmexit->rip);
352 	printf("\tinst_length\t%d\n", vmexit->inst_length);
353 	switch (vmexit->exitcode) {
354 	case VM_EXITCODE_INOUT:
355 		printf("\treason\t\tINOUT\n");
356 		printf("\tdirection\t%s\n",
357 		    (vmexit->u.inout.flags & INOUT_IN) ? "IN" : "OUT");
358 		printf("\tbytes\t\t%d\n", vmexit->u.inout.bytes);
359 		printf("\tport\t\t0x%04x\n", vmexit->u.inout.port);
360 		printf("\teax\t\t0x%08x\n", vmexit->u.inout.eax);
361 		break;
362 	case VM_EXITCODE_MMIO:
363 		printf("\treason\t\tMMIO\n");
364 		printf("\toperation\t%s\n",
365 		    vmexit->u.mmio.read ? "READ" : "WRITE");
366 		printf("\tbytes\t\t%d\n", vmexit->u.mmio.bytes);
367 		printf("\tgpa\t\t0x%08x\n", vmexit->u.mmio.gpa);
368 		printf("\tdata\t\t0x%08x\n", vmexit->u.mmio.data);
369 		break;
370 	case VM_EXITCODE_VMX:
371 		printf("\treason\t\tVMX\n");
372 		printf("\tstatus\t\t%d\n", vmexit->u.vmx.status);
373 		printf("\texit_reason\t0x%08x (%u)\n",
374 		    vmexit->u.vmx.exit_reason, vmexit->u.vmx.exit_reason);
375 		printf("\tqualification\t0x%016lx\n",
376 			vmexit->u.vmx.exit_qualification);
377 		printf("\tinst_type\t\t%d\n", vmexit->u.vmx.inst_type);
378 		printf("\tinst_error\t\t%d\n", vmexit->u.vmx.inst_error);
379 		break;
380 	case VM_EXITCODE_SVM:
381 		printf("\treason\t\tSVM\n");
382 		printf("\texit_reason\t\t%#lx\n", vmexit->u.svm.exitcode);
383 		printf("\texitinfo1\t\t%#lx\n", vmexit->u.svm.exitinfo1);
384 		printf("\texitinfo2\t\t%#lx\n", vmexit->u.svm.exitinfo2);
385 		break;
386 	default:
387 		printf("*** unknown vm run exitcode %d\n", vmexit->exitcode);
388 		break;
389 	}
390 }
391 
392 /* AMD 6th generation and Intel compatible MSRs */
393 #define MSR_AMD6TH_START	0xC0000000
394 #define MSR_AMD6TH_END		0xC0001FFF
395 /* AMD 7th and 8th generation compatible MSRs */
396 #define MSR_AMD7TH_START	0xC0010000
397 #define MSR_AMD7TH_END		0xC0011FFF
398 
399 /* Until a safe method is created, arbitrary VMCS reads/writes are forbidden */
400 static int
vm_get_vmcs_field(struct vmctx * ctx,int vcpu,int field,uint64_t * ret_val)401 vm_get_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t *ret_val)
402 {
403 	*ret_val = 0;
404 	return (0);
405 }
406 
407 static int
vm_set_vmcs_field(struct vmctx * ctx,int vcpu,int field,uint64_t val)408 vm_set_vmcs_field(struct vmctx *ctx, int vcpu, int field, uint64_t val)
409 {
410 	return (EINVAL);
411 }
412 
413 /* Until a safe method is created, arbitrary VMCB reads/writes are forbidden */
414 static int
vm_get_vmcb_field(struct vmctx * ctx,int vcpu,int off,int bytes,uint64_t * ret_val)415 vm_get_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes,
416     uint64_t *ret_val)
417 {
418 	*ret_val = 0;
419 	return (0);
420 }
421 
422 static int
vm_set_vmcb_field(struct vmctx * ctx,int vcpu,int off,int bytes,uint64_t val)423 vm_set_vmcb_field(struct vmctx *ctx, int vcpu, int off, int bytes,
424     uint64_t val)
425 {
426 	return (EINVAL);
427 }
428 
429 enum {
430 	VMNAME = 1000,	/* avoid collision with return values from getopt */
431 	VCPU,
432 	SET_MEM,
433 	SET_EFER,
434 	SET_CR0,
435 	SET_CR2,
436 	SET_CR3,
437 	SET_CR4,
438 	SET_DR0,
439 	SET_DR1,
440 	SET_DR2,
441 	SET_DR3,
442 	SET_DR6,
443 	SET_DR7,
444 	SET_RSP,
445 	SET_RIP,
446 	SET_RAX,
447 	SET_RFLAGS,
448 	DESC_BASE,
449 	DESC_LIMIT,
450 	DESC_ACCESS,
451 	SET_CS,
452 	SET_DS,
453 	SET_ES,
454 	SET_FS,
455 	SET_GS,
456 	SET_SS,
457 	SET_TR,
458 	SET_LDTR,
459 	SET_X2APIC_STATE,
460 	SET_EXCEPTION_BITMAP,
461 	SET_VMCS_ENTRY_INTERRUPTION_INFO,
462 	SET_CAP,
463 	CAPNAME,
464 	UNASSIGN_PPTDEV,
465 	GET_GPA_PMAP,
466 	ASSERT_LAPIC_LVT,
467 	SET_RTC_TIME,
468 	SET_RTC_NVRAM,
469 	RTC_NVRAM_OFFSET,
470 	PMTMR_PORT,
471 };
472 
473 static void
print_cpus(const char * banner,const cpuset_t * cpus)474 print_cpus(const char *banner, const cpuset_t *cpus)
475 {
476 	int i;
477 	int first;
478 
479 	first = 1;
480 	printf("%s:\t", banner);
481 	if (!CPU_EMPTY(cpus)) {
482 		for (i = 0; i < CPU_SETSIZE; i++) {
483 			if (CPU_ISSET(i, cpus)) {
484 				printf("%s%d", first ? " " : ", ", i);
485 				first = 0;
486 			}
487 		}
488 	} else
489 		printf(" (none)");
490 	printf("\n");
491 }
492 
493 static void
print_intinfo(const char * banner,uint64_t info)494 print_intinfo(const char *banner, uint64_t info)
495 {
496 	printf("%s:\t", banner);
497 	if (VM_INTINFO_PENDING(info)) {
498 		switch (VM_INTINFO_TYPE(info)) {
499 		case VM_INTINFO_HWINTR:
500 			printf("extint");
501 			break;
502 		case VM_INTINFO_NMI:
503 			printf("nmi");
504 			break;
505 		case VM_INTINFO_SWINTR:
506 			printf("swint");
507 			break;
508 		default:
509 			printf("exception");
510 			break;
511 		}
512 		printf(" vector %hhd", VM_INTINFO_VECTOR(info));
513 		if (VM_INTINFO_HAS_ERRCODE(info)) {
514 			printf(" errcode %#x", VM_INTINFO_ERRCODE(info));
515 		}
516 	} else {
517 		printf("n/a");
518 	}
519 	printf("\n");
520 }
521 
522 static bool
cpu_vendor_intel(void)523 cpu_vendor_intel(void)
524 {
525 	u_int regs[4];
526 	char cpu_vendor[13];
527 
528 	do_cpuid(0, regs);
529 	((u_int *)&cpu_vendor)[0] = regs[1];
530 	((u_int *)&cpu_vendor)[1] = regs[3];
531 	((u_int *)&cpu_vendor)[2] = regs[2];
532 	cpu_vendor[12] = '\0';
533 
534 	if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
535 		return (false);
536 	} else if (strcmp(cpu_vendor, "HygonGenuine") == 0) {
537 		return (false);
538 	} else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
539 		return (true);
540 	} else {
541 		fprintf(stderr, "Unknown cpu vendor \"%s\"\n", cpu_vendor);
542 		exit(1);
543 	}
544 }
545 
546 static int
get_all_registers(struct vmctx * ctx,int vcpu)547 get_all_registers(struct vmctx *ctx, int vcpu)
548 {
549 	uint64_t cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
550 	uint64_t rsp, rip, rflags, efer;
551 	uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp;
552 	uint64_t r8, r9, r10, r11, r12, r13, r14, r15;
553 	int error = 0;
554 
555 	if (!error && (get_efer || get_all)) {
556 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_EFER, &efer);
557 		if (error == 0)
558 			printf("efer[%d]\t\t0x%016lx\n", vcpu, efer);
559 	}
560 
561 	if (!error && (get_cr0 || get_all)) {
562 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR0, &cr0);
563 		if (error == 0)
564 			printf("cr0[%d]\t\t0x%016lx\n", vcpu, cr0);
565 	}
566 
567 	if (!error && (get_cr2 || get_all)) {
568 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR2, &cr2);
569 		if (error == 0)
570 			printf("cr2[%d]\t\t0x%016lx\n", vcpu, cr2);
571 	}
572 
573 	if (!error && (get_cr3 || get_all)) {
574 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR3, &cr3);
575 		if (error == 0)
576 			printf("cr3[%d]\t\t0x%016lx\n", vcpu, cr3);
577 	}
578 
579 	if (!error && (get_cr4 || get_all)) {
580 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CR4, &cr4);
581 		if (error == 0)
582 			printf("cr4[%d]\t\t0x%016lx\n", vcpu, cr4);
583 	}
584 
585 	if (!error && (get_dr0 || get_all)) {
586 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR0, &dr0);
587 		if (error == 0)
588 			printf("dr0[%d]\t\t0x%016lx\n", vcpu, dr0);
589 	}
590 
591 	if (!error && (get_dr1 || get_all)) {
592 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR1, &dr1);
593 		if (error == 0)
594 			printf("dr1[%d]\t\t0x%016lx\n", vcpu, dr1);
595 	}
596 
597 	if (!error && (get_dr2 || get_all)) {
598 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR2, &dr2);
599 		if (error == 0)
600 			printf("dr2[%d]\t\t0x%016lx\n", vcpu, dr2);
601 	}
602 
603 	if (!error && (get_dr3 || get_all)) {
604 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR3, &dr3);
605 		if (error == 0)
606 			printf("dr3[%d]\t\t0x%016lx\n", vcpu, dr3);
607 	}
608 
609 	if (!error && (get_dr6 || get_all)) {
610 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR6, &dr6);
611 		if (error == 0)
612 			printf("dr6[%d]\t\t0x%016lx\n", vcpu, dr6);
613 	}
614 
615 	if (!error && (get_dr7 || get_all)) {
616 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DR7, &dr7);
617 		if (error == 0)
618 			printf("dr7[%d]\t\t0x%016lx\n", vcpu, dr7);
619 	}
620 
621 	if (!error && (get_rsp || get_all)) {
622 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSP, &rsp);
623 		if (error == 0)
624 			printf("rsp[%d]\t\t0x%016lx\n", vcpu, rsp);
625 	}
626 
627 	if (!error && (get_rip || get_all)) {
628 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RIP, &rip);
629 		if (error == 0)
630 			printf("rip[%d]\t\t0x%016lx\n", vcpu, rip);
631 	}
632 
633 	if (!error && (get_rax || get_all)) {
634 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RAX, &rax);
635 		if (error == 0)
636 			printf("rax[%d]\t\t0x%016lx\n", vcpu, rax);
637 	}
638 
639 	if (!error && (get_rbx || get_all)) {
640 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBX, &rbx);
641 		if (error == 0)
642 			printf("rbx[%d]\t\t0x%016lx\n", vcpu, rbx);
643 	}
644 
645 	if (!error && (get_rcx || get_all)) {
646 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RCX, &rcx);
647 		if (error == 0)
648 			printf("rcx[%d]\t\t0x%016lx\n", vcpu, rcx);
649 	}
650 
651 	if (!error && (get_rdx || get_all)) {
652 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDX, &rdx);
653 		if (error == 0)
654 			printf("rdx[%d]\t\t0x%016lx\n", vcpu, rdx);
655 	}
656 
657 	if (!error && (get_rsi || get_all)) {
658 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RSI, &rsi);
659 		if (error == 0)
660 			printf("rsi[%d]\t\t0x%016lx\n", vcpu, rsi);
661 	}
662 
663 	if (!error && (get_rdi || get_all)) {
664 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RDI, &rdi);
665 		if (error == 0)
666 			printf("rdi[%d]\t\t0x%016lx\n", vcpu, rdi);
667 	}
668 
669 	if (!error && (get_rbp || get_all)) {
670 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RBP, &rbp);
671 		if (error == 0)
672 			printf("rbp[%d]\t\t0x%016lx\n", vcpu, rbp);
673 	}
674 
675 	if (!error && (get_r8 || get_all)) {
676 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R8, &r8);
677 		if (error == 0)
678 			printf("r8[%d]\t\t0x%016lx\n", vcpu, r8);
679 	}
680 
681 	if (!error && (get_r9 || get_all)) {
682 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R9, &r9);
683 		if (error == 0)
684 			printf("r9[%d]\t\t0x%016lx\n", vcpu, r9);
685 	}
686 
687 	if (!error && (get_r10 || get_all)) {
688 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R10, &r10);
689 		if (error == 0)
690 			printf("r10[%d]\t\t0x%016lx\n", vcpu, r10);
691 	}
692 
693 	if (!error && (get_r11 || get_all)) {
694 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R11, &r11);
695 		if (error == 0)
696 			printf("r11[%d]\t\t0x%016lx\n", vcpu, r11);
697 	}
698 
699 	if (!error && (get_r12 || get_all)) {
700 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R12, &r12);
701 		if (error == 0)
702 			printf("r12[%d]\t\t0x%016lx\n", vcpu, r12);
703 	}
704 
705 	if (!error && (get_r13 || get_all)) {
706 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R13, &r13);
707 		if (error == 0)
708 			printf("r13[%d]\t\t0x%016lx\n", vcpu, r13);
709 	}
710 
711 	if (!error && (get_r14 || get_all)) {
712 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R14, &r14);
713 		if (error == 0)
714 			printf("r14[%d]\t\t0x%016lx\n", vcpu, r14);
715 	}
716 
717 	if (!error && (get_r15 || get_all)) {
718 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_R15, &r15);
719 		if (error == 0)
720 			printf("r15[%d]\t\t0x%016lx\n", vcpu, r15);
721 	}
722 
723 	if (!error && (get_rflags || get_all)) {
724 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_RFLAGS,
725 					&rflags);
726 		if (error == 0)
727 			printf("rflags[%d]\t0x%016lx\n", vcpu, rflags);
728 	}
729 
730 	return (error);
731 }
732 
733 static int
get_all_segments(struct vmctx * ctx,int vcpu)734 get_all_segments(struct vmctx *ctx, int vcpu)
735 {
736 	uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
737 	int error = 0;
738 
739 	if (!error && (get_desc_ds || get_all)) {
740 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_DS,
741 				   &desc_base, &desc_limit, &desc_access);
742 		if (error == 0) {
743 			printf("ds desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
744 			      vcpu, desc_base, desc_limit, desc_access);
745 		}
746 	}
747 
748 	if (!error && (get_desc_es || get_all)) {
749 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_ES,
750 				    &desc_base, &desc_limit, &desc_access);
751 		if (error == 0) {
752 			printf("es desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
753 			       vcpu, desc_base, desc_limit, desc_access);
754 		}
755 	}
756 
757 	if (!error && (get_desc_fs || get_all)) {
758 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_FS,
759 				    &desc_base, &desc_limit, &desc_access);
760 		if (error == 0) {
761 			printf("fs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
762 			       vcpu, desc_base, desc_limit, desc_access);
763 		}
764 	}
765 
766 	if (!error && (get_desc_gs || get_all)) {
767 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GS,
768 				    &desc_base, &desc_limit, &desc_access);
769 		if (error == 0) {
770 			printf("gs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
771 			       vcpu, desc_base, desc_limit, desc_access);
772 		}
773 	}
774 
775 	if (!error && (get_desc_ss || get_all)) {
776 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_SS,
777 				    &desc_base, &desc_limit, &desc_access);
778 		if (error == 0) {
779 			printf("ss desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
780 			       vcpu, desc_base, desc_limit, desc_access);
781 		}
782 	}
783 
784 	if (!error && (get_desc_cs || get_all)) {
785 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_CS,
786 				    &desc_base, &desc_limit, &desc_access);
787 		if (error == 0) {
788 			printf("cs desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
789 			       vcpu, desc_base, desc_limit, desc_access);
790 		}
791 	}
792 
793 	if (!error && (get_desc_tr || get_all)) {
794 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_TR,
795 				    &desc_base, &desc_limit, &desc_access);
796 		if (error == 0) {
797 			printf("tr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
798 			       vcpu, desc_base, desc_limit, desc_access);
799 		}
800 	}
801 
802 	if (!error && (get_desc_ldtr || get_all)) {
803 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_LDTR,
804 				    &desc_base, &desc_limit, &desc_access);
805 		if (error == 0) {
806 			printf("ldtr desc[%d]\t0x%016lx/0x%08x/0x%08x\n",
807 			       vcpu, desc_base, desc_limit, desc_access);
808 		}
809 	}
810 
811 	if (!error && (get_desc_gdtr || get_all)) {
812 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_GDTR,
813 				    &desc_base, &desc_limit, &desc_access);
814 		if (error == 0) {
815 			printf("gdtr[%d]\t\t0x%016lx/0x%08x\n",
816 			       vcpu, desc_base, desc_limit);
817 		}
818 	}
819 
820 	if (!error && (get_desc_idtr || get_all)) {
821 		error = vm_get_desc(ctx, vcpu, VM_REG_GUEST_IDTR,
822 				    &desc_base, &desc_limit, &desc_access);
823 		if (error == 0) {
824 			printf("idtr[%d]\t\t0x%016lx/0x%08x\n",
825 			       vcpu, desc_base, desc_limit);
826 		}
827 	}
828 
829 	if (!error && (get_cs || get_all)) {
830 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_CS, &cs);
831 		if (error == 0)
832 			printf("cs[%d]\t\t0x%04lx\n", vcpu, cs);
833 	}
834 
835 	if (!error && (get_ds || get_all)) {
836 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_DS, &ds);
837 		if (error == 0)
838 			printf("ds[%d]\t\t0x%04lx\n", vcpu, ds);
839 	}
840 
841 	if (!error && (get_es || get_all)) {
842 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_ES, &es);
843 		if (error == 0)
844 			printf("es[%d]\t\t0x%04lx\n", vcpu, es);
845 	}
846 
847 	if (!error && (get_fs || get_all)) {
848 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_FS, &fs);
849 		if (error == 0)
850 			printf("fs[%d]\t\t0x%04lx\n", vcpu, fs);
851 	}
852 
853 	if (!error && (get_gs || get_all)) {
854 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_GS, &gs);
855 		if (error == 0)
856 			printf("gs[%d]\t\t0x%04lx\n", vcpu, gs);
857 	}
858 
859 	if (!error && (get_ss || get_all)) {
860 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_SS, &ss);
861 		if (error == 0)
862 			printf("ss[%d]\t\t0x%04lx\n", vcpu, ss);
863 	}
864 
865 	if (!error && (get_tr || get_all)) {
866 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_TR, &tr);
867 		if (error == 0)
868 			printf("tr[%d]\t\t0x%04lx\n", vcpu, tr);
869 	}
870 
871 	if (!error && (get_ldtr || get_all)) {
872 		error = vm_get_register(ctx, vcpu, VM_REG_GUEST_LDTR, &ldtr);
873 		if (error == 0)
874 			printf("ldtr[%d]\t\t0x%04lx\n", vcpu, ldtr);
875 	}
876 
877 	return (error);
878 }
879 
880 static int
get_misc_vmcs(struct vmctx * ctx,int vcpu)881 get_misc_vmcs(struct vmctx *ctx, int vcpu)
882 {
883 	uint64_t ctl, cr0, cr3, cr4, rsp, rip, pat, addr, u64;
884 	int error = 0;
885 
886 	if (!error && (get_cr0_mask || get_all)) {
887 		uint64_t cr0mask;
888 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_MASK, &cr0mask);
889 		if (error == 0)
890 			printf("cr0_mask[%d]\t\t0x%016lx\n", vcpu, cr0mask);
891 	}
892 
893 	if (!error && (get_cr0_shadow || get_all)) {
894 		uint64_t cr0shadow;
895 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR0_SHADOW,
896 					  &cr0shadow);
897 		if (error == 0)
898 			printf("cr0_shadow[%d]\t\t0x%016lx\n", vcpu, cr0shadow);
899 	}
900 
901 	if (!error && (get_cr4_mask || get_all)) {
902 		uint64_t cr4mask;
903 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_MASK, &cr4mask);
904 		if (error == 0)
905 			printf("cr4_mask[%d]\t\t0x%016lx\n", vcpu, cr4mask);
906 	}
907 
908 	if (!error && (get_cr4_shadow || get_all)) {
909 		uint64_t cr4shadow;
910 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR4_SHADOW,
911 					  &cr4shadow);
912 		if (error == 0)
913 			printf("cr4_shadow[%d]\t\t0x%016lx\n", vcpu, cr4shadow);
914 	}
915 
916 	if (!error && (get_cr3_targets || get_all)) {
917 		uint64_t target_count, target_addr;
918 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET_COUNT,
919 					  &target_count);
920 		if (error == 0) {
921 			printf("cr3_target_count[%d]\t0x%016lx\n",
922 				vcpu, target_count);
923 		}
924 
925 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET0,
926 					  &target_addr);
927 		if (error == 0) {
928 			printf("cr3_target0[%d]\t\t0x%016lx\n",
929 				vcpu, target_addr);
930 		}
931 
932 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET1,
933 					  &target_addr);
934 		if (error == 0) {
935 			printf("cr3_target1[%d]\t\t0x%016lx\n",
936 				vcpu, target_addr);
937 		}
938 
939 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET2,
940 					  &target_addr);
941 		if (error == 0) {
942 			printf("cr3_target2[%d]\t\t0x%016lx\n",
943 				vcpu, target_addr);
944 		}
945 
946 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_CR3_TARGET3,
947 					  &target_addr);
948 		if (error == 0) {
949 			printf("cr3_target3[%d]\t\t0x%016lx\n",
950 				vcpu, target_addr);
951 		}
952 	}
953 
954 	if (!error && (get_pinbased_ctls || get_all)) {
955 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_PIN_BASED_CTLS, &ctl);
956 		if (error == 0)
957 			printf("pinbased_ctls[%d]\t0x%016lx\n", vcpu, ctl);
958 	}
959 
960 	if (!error && (get_procbased_ctls || get_all)) {
961 		error = vm_get_vmcs_field(ctx, vcpu,
962 					  VMCS_PRI_PROC_BASED_CTLS, &ctl);
963 		if (error == 0)
964 			printf("procbased_ctls[%d]\t0x%016lx\n", vcpu, ctl);
965 	}
966 
967 	if (!error && (get_procbased_ctls2 || get_all)) {
968 		error = vm_get_vmcs_field(ctx, vcpu,
969 					  VMCS_SEC_PROC_BASED_CTLS, &ctl);
970 		if (error == 0)
971 			printf("procbased_ctls2[%d]\t0x%016lx\n", vcpu, ctl);
972 	}
973 
974 	if (!error && (get_vmcs_gla || get_all)) {
975 		error = vm_get_vmcs_field(ctx, vcpu,
976 					  VMCS_GUEST_LINEAR_ADDRESS, &u64);
977 		if (error == 0)
978 			printf("gla[%d]\t\t0x%016lx\n", vcpu, u64);
979 	}
980 
981 	if (!error && (get_vmcs_gpa || get_all)) {
982 		error = vm_get_vmcs_field(ctx, vcpu,
983 					  VMCS_GUEST_PHYSICAL_ADDRESS, &u64);
984 		if (error == 0)
985 			printf("gpa[%d]\t\t0x%016lx\n", vcpu, u64);
986 	}
987 
988 	if (!error && (get_vmcs_entry_interruption_info ||
989 		get_all)) {
990 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,&u64);
991 		if (error == 0) {
992 			printf("entry_interruption_info[%d]\t0x%016lx\n",
993 				vcpu, u64);
994 		}
995 	}
996 
997 	if (!error && (get_tpr_threshold || get_all)) {
998 		uint64_t threshold;
999 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_TPR_THRESHOLD,
1000 					  &threshold);
1001 		if (error == 0)
1002 			printf("tpr_threshold[%d]\t0x%016lx\n", vcpu, threshold);
1003 	}
1004 
1005 	if (!error && (get_inst_err || get_all)) {
1006 		uint64_t insterr;
1007 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_INSTRUCTION_ERROR,
1008 					  &insterr);
1009 		if (error == 0) {
1010 			printf("instruction_error[%d]\t0x%016lx\n",
1011 				vcpu, insterr);
1012 		}
1013 	}
1014 
1015 	if (!error && (get_exit_ctls || get_all)) {
1016 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_CTLS, &ctl);
1017 		if (error == 0)
1018 			printf("exit_ctls[%d]\t\t0x%016lx\n", vcpu, ctl);
1019 	}
1020 
1021 	if (!error && (get_entry_ctls || get_all)) {
1022 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_ENTRY_CTLS, &ctl);
1023 		if (error == 0)
1024 			printf("entry_ctls[%d]\t\t0x%016lx\n", vcpu, ctl);
1025 	}
1026 
1027 	if (!error && (get_host_pat || get_all)) {
1028 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_IA32_PAT, &pat);
1029 		if (error == 0)
1030 			printf("host_pat[%d]\t\t0x%016lx\n", vcpu, pat);
1031 	}
1032 
1033 	if (!error && (get_host_cr0 || get_all)) {
1034 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR0, &cr0);
1035 		if (error == 0)
1036 			printf("host_cr0[%d]\t\t0x%016lx\n", vcpu, cr0);
1037 	}
1038 
1039 	if (!error && (get_host_cr3 || get_all)) {
1040 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR3, &cr3);
1041 		if (error == 0)
1042 			printf("host_cr3[%d]\t\t0x%016lx\n", vcpu, cr3);
1043 	}
1044 
1045 	if (!error && (get_host_cr4 || get_all)) {
1046 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_CR4, &cr4);
1047 		if (error == 0)
1048 			printf("host_cr4[%d]\t\t0x%016lx\n", vcpu, cr4);
1049 	}
1050 
1051 	if (!error && (get_host_rip || get_all)) {
1052 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RIP, &rip);
1053 		if (error == 0)
1054 			printf("host_rip[%d]\t\t0x%016lx\n", vcpu, rip);
1055 	}
1056 
1057 	if (!error && (get_host_rsp || get_all)) {
1058 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_HOST_RSP, &rsp);
1059 		if (error == 0)
1060 			printf("host_rsp[%d]\t\t0x%016lx\n", vcpu, rsp);
1061 	}
1062 
1063 	if (!error && (get_vmcs_link || get_all)) {
1064 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_LINK_POINTER, &addr);
1065 		if (error == 0)
1066 			printf("vmcs_pointer[%d]\t0x%016lx\n", vcpu, addr);
1067 	}
1068 
1069 	if (!error && (get_vmcs_exit_interruption_info || get_all)) {
1070 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_INFO, &u64);
1071 		if (error == 0) {
1072 			printf("vmcs_exit_interruption_info[%d]\t0x%016lx\n",
1073 				vcpu, u64);
1074 		}
1075 	}
1076 
1077 	if (!error && (get_vmcs_exit_interruption_error || get_all)) {
1078 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_INTR_ERRCODE,
1079 		    			  &u64);
1080 		if (error == 0) {
1081 			printf("vmcs_exit_interruption_error[%d]\t0x%016lx\n",
1082 				vcpu, u64);
1083 		}
1084 	}
1085 
1086 	if (!error && (get_vmcs_interruptibility || get_all)) {
1087 		error = vm_get_vmcs_field(ctx, vcpu,
1088 					  VMCS_GUEST_INTERRUPTIBILITY, &u64);
1089 		if (error == 0) {
1090 			printf("vmcs_guest_interruptibility[%d]\t0x%016lx\n",
1091 				vcpu, u64);
1092 		}
1093 	}
1094 
1095 	if (!error && (get_vmcs_exit_inst_length || get_all)) {
1096 		error = vm_get_vmcs_field(ctx, vcpu,
1097 		    VMCS_EXIT_INSTRUCTION_LENGTH, &u64);
1098 		if (error == 0)
1099 			printf("vmcs_exit_inst_length[%d]\t0x%08x\n", vcpu,
1100 			    (uint32_t)u64);
1101 	}
1102 
1103 	if (!error && (get_vmcs_exit_qualification || get_all)) {
1104 		error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_QUALIFICATION,
1105 					  &u64);
1106 		if (error == 0)
1107 			printf("vmcs_exit_qualification[%d]\t0x%016lx\n",
1108 				vcpu, u64);
1109 	}
1110 
1111 	return (error);
1112 }
1113 
1114 static int
get_misc_vmcb(struct vmctx * ctx,int vcpu)1115 get_misc_vmcb(struct vmctx *ctx, int vcpu)
1116 {
1117 	uint64_t ctl, addr;
1118 	int error = 0;
1119 
1120 	if (!error && (get_vmcb_intercept || get_all)) {
1121 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_CR_INTERCEPT, 4,
1122 		    &ctl);
1123 		if (error == 0)
1124 			printf("cr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1125 
1126 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_DR_INTERCEPT, 4,
1127 		    &ctl);
1128 		if (error == 0)
1129 			printf("dr_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1130 
1131 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXC_INTERCEPT, 4,
1132 		    &ctl);
1133 		if (error == 0)
1134 			printf("exc_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1135 
1136 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST1_INTERCEPT,
1137 		    4, &ctl);
1138 		if (error == 0)
1139 			printf("inst1_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1140 
1141 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_INST2_INTERCEPT,
1142 		    4, &ctl);
1143 		if (error == 0)
1144 			printf("inst2_intercept[%d]\t0x%08x\n", vcpu, (int)ctl);
1145 	}
1146 
1147 	if (!error && (get_vmcb_tlb_ctrl || get_all)) {
1148 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_TLB_CTRL,
1149 					  4, &ctl);
1150 		if (error == 0)
1151 			printf("TLB ctrl[%d]\t0x%016lx\n", vcpu, ctl);
1152 	}
1153 
1154 	if (!error && (get_vmcb_exit_details || get_all)) {
1155 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO1,
1156 					  8, &ctl);
1157 		if (error == 0)
1158 			printf("exitinfo1[%d]\t0x%016lx\n", vcpu, ctl);
1159 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINFO2,
1160 					  8, &ctl);
1161 		if (error == 0)
1162 			printf("exitinfo2[%d]\t0x%016lx\n", vcpu, ctl);
1163 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_EXITINTINFO,
1164 					  8, &ctl);
1165 		if (error == 0)
1166 			printf("exitintinfo[%d]\t0x%016lx\n", vcpu, ctl);
1167 	}
1168 
1169 	if (!error && (get_vmcb_virq || get_all)) {
1170 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_VIRQ,
1171 					  8, &ctl);
1172 		if (error == 0)
1173 			printf("v_irq/tpr[%d]\t0x%016lx\n", vcpu, ctl);
1174 	}
1175 
1176 	if (!error && (get_apic_access_addr || get_all)) {
1177 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_BAR, 8,
1178 					  &addr);
1179 		if (error == 0)
1180 			printf("AVIC apic_bar[%d]\t0x%016lx\n", vcpu, addr);
1181 	}
1182 
1183 	if (!error && (get_virtual_apic_addr || get_all)) {
1184 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PAGE, 8,
1185 					  &addr);
1186 		if (error == 0)
1187 			printf("AVIC backing page[%d]\t0x%016lx\n", vcpu, addr);
1188 	}
1189 
1190 	if (!error && (get_avic_table || get_all)) {
1191 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_LT, 8,
1192 					  &addr);
1193 		if (error == 0)
1194 			printf("AVIC logical table[%d]\t0x%016lx\n",
1195 				vcpu, addr);
1196 		error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_AVIC_PT, 8,
1197 					  &addr);
1198 		if (error == 0)
1199 			printf("AVIC physical table[%d]\t0x%016lx\n",
1200 				vcpu, addr);
1201 	}
1202 
1203 	return (error);
1204 }
1205 
1206 static struct option *
setup_options(bool cpu_intel)1207 setup_options(bool cpu_intel)
1208 {
1209 	const struct option common_opts[] = {
1210 		{ "vm",		REQ_ARG,	0,	VMNAME },
1211 		{ "cpu",	REQ_ARG,	0,	VCPU },
1212 		{ "set-mem",	REQ_ARG,	0,	SET_MEM },
1213 		{ "set-efer",	REQ_ARG,	0,	SET_EFER },
1214 		{ "set-cr0",	REQ_ARG,	0,	SET_CR0 },
1215 		{ "set-cr2",	REQ_ARG,	0,	SET_CR2 },
1216 		{ "set-cr3",	REQ_ARG,	0,	SET_CR3 },
1217 		{ "set-cr4",	REQ_ARG,	0,	SET_CR4 },
1218 		{ "set-dr0",	REQ_ARG,	0,	SET_DR0 },
1219 		{ "set-dr1",	REQ_ARG,	0,	SET_DR1 },
1220 		{ "set-dr2",	REQ_ARG,	0,	SET_DR2 },
1221 		{ "set-dr3",	REQ_ARG,	0,	SET_DR3 },
1222 		{ "set-dr6",	REQ_ARG,	0,	SET_DR6 },
1223 		{ "set-dr7",	REQ_ARG,	0,	SET_DR7 },
1224 		{ "set-rsp",	REQ_ARG,	0,	SET_RSP },
1225 		{ "set-rip",	REQ_ARG,	0,	SET_RIP },
1226 		{ "set-rax",	REQ_ARG,	0,	SET_RAX },
1227 		{ "set-rflags",	REQ_ARG,	0,	SET_RFLAGS },
1228 		{ "desc-base",	REQ_ARG,	0,	DESC_BASE },
1229 		{ "desc-limit",	REQ_ARG,	0,	DESC_LIMIT },
1230 		{ "desc-access",REQ_ARG,	0,	DESC_ACCESS },
1231 		{ "set-cs",	REQ_ARG,	0,	SET_CS },
1232 		{ "set-ds",	REQ_ARG,	0,	SET_DS },
1233 		{ "set-es",	REQ_ARG,	0,	SET_ES },
1234 		{ "set-fs",	REQ_ARG,	0,	SET_FS },
1235 		{ "set-gs",	REQ_ARG,	0,	SET_GS },
1236 		{ "set-ss",	REQ_ARG,	0,	SET_SS },
1237 		{ "set-tr",	REQ_ARG,	0,	SET_TR },
1238 		{ "set-ldtr",	REQ_ARG,	0,	SET_LDTR },
1239 		{ "set-x2apic-state",REQ_ARG,	0,	SET_X2APIC_STATE },
1240 		{ "set-exception-bitmap",
1241 				REQ_ARG,	0, SET_EXCEPTION_BITMAP },
1242 		{ "capname",	REQ_ARG,	0,	CAPNAME },
1243 		{ "unassign-pptdev", REQ_ARG,	0,	UNASSIGN_PPTDEV },
1244 		{ "setcap",	REQ_ARG,	0,	SET_CAP },
1245 		{ "get-gpa-pmap", REQ_ARG,	0,	GET_GPA_PMAP },
1246 		{ "assert-lapic-lvt", REQ_ARG,	0,	ASSERT_LAPIC_LVT },
1247 		{ "get-rtc-time", NO_ARG,	&get_rtc_time,	1 },
1248 		{ "set-rtc-time", REQ_ARG,	0,	SET_RTC_TIME },
1249 		{ "rtc-nvram-offset", REQ_ARG,	0,	RTC_NVRAM_OFFSET },
1250 		{ "get-rtc-nvram", NO_ARG,	&get_rtc_nvram,	1 },
1251 		{ "set-rtc-nvram", REQ_ARG,	0,	SET_RTC_NVRAM },
1252 		{ "getcap",	NO_ARG,		&getcap,	1 },
1253 		{ "get-stats",	NO_ARG,		&get_stats,	1 },
1254 		{ "get-desc-ds",NO_ARG,		&get_desc_ds,	1 },
1255 		{ "set-desc-ds",NO_ARG,		&set_desc_ds,	1 },
1256 		{ "get-desc-es",NO_ARG,		&get_desc_es,	1 },
1257 		{ "set-desc-es",NO_ARG,		&set_desc_es,	1 },
1258 		{ "get-desc-ss",NO_ARG,		&get_desc_ss,	1 },
1259 		{ "set-desc-ss",NO_ARG,		&set_desc_ss,	1 },
1260 		{ "get-desc-cs",NO_ARG,		&get_desc_cs,	1 },
1261 		{ "set-desc-cs",NO_ARG,		&set_desc_cs,	1 },
1262 		{ "get-desc-fs",NO_ARG,		&get_desc_fs,	1 },
1263 		{ "set-desc-fs",NO_ARG,		&set_desc_fs,	1 },
1264 		{ "get-desc-gs",NO_ARG,		&get_desc_gs,	1 },
1265 		{ "set-desc-gs",NO_ARG,		&set_desc_gs,	1 },
1266 		{ "get-desc-tr",NO_ARG,		&get_desc_tr,	1 },
1267 		{ "set-desc-tr",NO_ARG,		&set_desc_tr,	1 },
1268 		{ "set-desc-ldtr", NO_ARG,	&set_desc_ldtr,	1 },
1269 		{ "get-desc-ldtr", NO_ARG,	&get_desc_ldtr,	1 },
1270 		{ "set-desc-gdtr", NO_ARG,	&set_desc_gdtr, 1 },
1271 		{ "get-desc-gdtr", NO_ARG,	&get_desc_gdtr, 1 },
1272 		{ "set-desc-idtr", NO_ARG,	&set_desc_idtr, 1 },
1273 		{ "get-desc-idtr", NO_ARG,	&get_desc_idtr, 1 },
1274 		{ "get-memmap",	NO_ARG,		&get_memmap,	1 },
1275 		{ "get-memseg", NO_ARG,		&get_memseg,	1 },
1276 		{ "get-efer",	NO_ARG,		&get_efer,	1 },
1277 		{ "get-cr0",	NO_ARG,		&get_cr0,	1 },
1278 		{ "get-cr2",	NO_ARG,		&get_cr2,	1 },
1279 		{ "get-cr3",	NO_ARG,		&get_cr3,	1 },
1280 		{ "get-cr4",	NO_ARG,		&get_cr4,	1 },
1281 		{ "get-dr0",	NO_ARG,		&get_dr0,	1 },
1282 		{ "get-dr1",	NO_ARG,		&get_dr1,	1 },
1283 		{ "get-dr2",	NO_ARG,		&get_dr2,	1 },
1284 		{ "get-dr3",	NO_ARG,		&get_dr3,	1 },
1285 		{ "get-dr6",	NO_ARG,		&get_dr6,	1 },
1286 		{ "get-dr7",	NO_ARG,		&get_dr7,	1 },
1287 		{ "get-rsp",	NO_ARG,		&get_rsp,	1 },
1288 		{ "get-rip",	NO_ARG,		&get_rip,	1 },
1289 		{ "get-rax",	NO_ARG,		&get_rax,	1 },
1290 		{ "get-rbx",	NO_ARG,		&get_rbx,	1 },
1291 		{ "get-rcx",	NO_ARG,		&get_rcx,	1 },
1292 		{ "get-rdx",	NO_ARG,		&get_rdx,	1 },
1293 		{ "get-rsi",	NO_ARG,		&get_rsi,	1 },
1294 		{ "get-rdi",	NO_ARG,		&get_rdi,	1 },
1295 		{ "get-rbp",	NO_ARG,		&get_rbp,	1 },
1296 		{ "get-r8",	NO_ARG,		&get_r8,	1 },
1297 		{ "get-r9",	NO_ARG,		&get_r9,	1 },
1298 		{ "get-r10",	NO_ARG,		&get_r10,	1 },
1299 		{ "get-r11",	NO_ARG,		&get_r11,	1 },
1300 		{ "get-r12",	NO_ARG,		&get_r12,	1 },
1301 		{ "get-r13",	NO_ARG,		&get_r13,	1 },
1302 		{ "get-r14",	NO_ARG,		&get_r14,	1 },
1303 		{ "get-r15",	NO_ARG,		&get_r15,	1 },
1304 		{ "get-rflags",	NO_ARG,		&get_rflags,	1 },
1305 		{ "get-cs",	NO_ARG,		&get_cs,	1 },
1306 		{ "get-ds",	NO_ARG,		&get_ds,	1 },
1307 		{ "get-es",	NO_ARG,		&get_es,	1 },
1308 		{ "get-fs",	NO_ARG,		&get_fs,	1 },
1309 		{ "get-gs",	NO_ARG,		&get_gs,	1 },
1310 		{ "get-ss",	NO_ARG,		&get_ss,	1 },
1311 		{ "get-tr",	NO_ARG,		&get_tr,	1 },
1312 		{ "get-ldtr",	NO_ARG,		&get_ldtr,	1 },
1313 		{ "get-eptp", 	NO_ARG,		&get_eptp,	1 },
1314 		{ "get-exception-bitmap",
1315 					NO_ARG,	&get_exception_bitmap,  1 },
1316 		{ "get-io-bitmap-address",
1317 					NO_ARG,	&get_io_bitmap,		1 },
1318 		{ "get-tsc-offset", 	NO_ARG, &get_tsc_offset, 	1 },
1319 		{ "get-msr-bitmap",
1320 					NO_ARG,	&get_msr_bitmap, 	1 },
1321 		{ "get-msr-bitmap-address",
1322 					NO_ARG,	&get_msr_bitmap_address, 1 },
1323 		{ "get-guest-msrs",	NO_ARG,	&get_guest_msrs,	1 },
1324 		{ "get-exit-reason",
1325 					NO_ARG,	&get_exit_reason, 	1 },
1326 		{ "get-x2apic-state",	NO_ARG,	&get_x2apic_state, 	1 },
1327 		{ "get-all",		NO_ARG,	&get_all,		1 },
1328 		{ "run",		NO_ARG,	&run,			1 },
1329 		{ "create",		NO_ARG,	&create,		1 },
1330 		{ "destroy",		NO_ARG,	&destroy,		1 },
1331 		{ "inject-nmi",		NO_ARG,	&inject_nmi,		1 },
1332 		{ "force-reset",	NO_ARG,	&force_reset,		1 },
1333 		{ "force-poweroff", 	NO_ARG,	&force_poweroff, 	1 },
1334 		{ "get-active-cpus", 	NO_ARG,	&get_active_cpus, 	1 },
1335 		{ "get-suspended-cpus", NO_ARG,	&get_suspended_cpus, 	1 },
1336 		{ "get-intinfo", 	NO_ARG,	&get_intinfo,		1 },
1337 		{ "get-cpu-topology",	NO_ARG, &get_cpu_topology,	1 },
1338 		{ "pmtmr-port",		REQ_ARG,	0,	PMTMR_PORT },
1339 		{ "wrlock-cycle",	NO_ARG,	&wrlock_cycle,	1 },
1340 		{ "get-fpu",	NO_ARG,		&get_fpu,	1 },
1341 	};
1342 
1343 	const struct option intel_opts[] = {
1344 		{ "get-vmcs-pinbased-ctls",
1345 				NO_ARG,		&get_pinbased_ctls, 1 },
1346 		{ "get-vmcs-procbased-ctls",
1347 				NO_ARG,		&get_procbased_ctls, 1 },
1348 		{ "get-vmcs-procbased-ctls2",
1349 				NO_ARG,		&get_procbased_ctls2, 1 },
1350 		{ "get-vmcs-guest-linear-address",
1351 				NO_ARG,		&get_vmcs_gla,	1 },
1352 		{ "get-vmcs-guest-physical-address",
1353 				NO_ARG,		&get_vmcs_gpa,	1 },
1354 		{ "get-vmcs-entry-interruption-info",
1355 				NO_ARG, &get_vmcs_entry_interruption_info, 1},
1356 		{ "get-vmcs-cr0-mask", NO_ARG,	&get_cr0_mask,	1 },
1357 		{ "get-vmcs-cr0-shadow", NO_ARG,&get_cr0_shadow, 1 },
1358 		{ "get-vmcs-cr4-mask", 		NO_ARG,	&get_cr4_mask,	  1 },
1359 		{ "get-vmcs-cr4-shadow", 	NO_ARG, &get_cr4_shadow,  1 },
1360 		{ "get-vmcs-cr3-targets", 	NO_ARG, &get_cr3_targets, 1 },
1361 		{ "get-vmcs-tpr-threshold",
1362 					NO_ARG,	&get_tpr_threshold, 1 },
1363 		{ "get-vmcs-vpid", 	NO_ARG,	&get_vpid_asid,	    1 },
1364 		{ "get-vmcs-exit-ctls", NO_ARG,	&get_exit_ctls,	    1 },
1365 		{ "get-vmcs-entry-ctls",
1366 					NO_ARG,	&get_entry_ctls, 1 },
1367 		{ "get-vmcs-instruction-error",
1368 					NO_ARG,	&get_inst_err,	1 },
1369 		{ "get-vmcs-host-pat",	NO_ARG,	&get_host_pat,	1 },
1370 		{ "get-vmcs-host-cr0",
1371 					NO_ARG,	&get_host_cr0,	1 },
1372 		{ "set-vmcs-entry-interruption-info",
1373 				REQ_ARG, 0, SET_VMCS_ENTRY_INTERRUPTION_INFO },
1374 		{ "get-vmcs-exit-qualification",
1375 				NO_ARG,	&get_vmcs_exit_qualification, 1 },
1376 		{ "get-vmcs-exit-inst-length",
1377 				NO_ARG,	&get_vmcs_exit_inst_length, 1 },
1378 		{ "get-vmcs-interruptibility",
1379 				NO_ARG, &get_vmcs_interruptibility, 1 },
1380 		{ "get-vmcs-exit-interruption-error",
1381 				NO_ARG,	&get_vmcs_exit_interruption_error, 1 },
1382 		{ "get-vmcs-exit-interruption-info",
1383 				NO_ARG,	&get_vmcs_exit_interruption_info, 1 },
1384 		{ "get-vmcs-link", 	NO_ARG,		&get_vmcs_link, 1 },
1385 		{ "get-vmcs-host-cr3",
1386 					NO_ARG,		&get_host_cr3,	1 },
1387 		{ "get-vmcs-host-cr4",
1388 				NO_ARG,		&get_host_cr4,	1 },
1389 		{ "get-vmcs-host-rip",
1390 				NO_ARG,		&get_host_rip,	1 },
1391 		{ "get-vmcs-host-rsp",
1392 				NO_ARG,		&get_host_rsp,	1 },
1393 		{ "get-apic-access-address",
1394 				NO_ARG,		&get_apic_access_addr, 1},
1395 		{ "get-virtual-apic-address",
1396 				NO_ARG,		&get_virtual_apic_addr, 1}
1397 	};
1398 
1399 	const struct option amd_opts[] = {
1400 		{ "get-vmcb-intercepts",
1401 				NO_ARG,	&get_vmcb_intercept, 	1 },
1402 		{ "get-vmcb-asid",
1403 				NO_ARG,	&get_vpid_asid,	     	1 },
1404 		{ "get-vmcb-exit-details",
1405 				NO_ARG, &get_vmcb_exit_details,	1 },
1406 		{ "get-vmcb-tlb-ctrl",
1407 				NO_ARG, &get_vmcb_tlb_ctrl, 	1 },
1408 		{ "get-vmcb-virq",
1409 				NO_ARG, &get_vmcb_virq, 	1 },
1410 		{ "get-avic-apic-bar",
1411 				NO_ARG,	&get_apic_access_addr, 	1 },
1412 		{ "get-avic-backing-page",
1413 				NO_ARG,	&get_virtual_apic_addr, 1 },
1414 		{ "get-avic-table",
1415 				NO_ARG,	&get_avic_table, 	1 }
1416 	};
1417 
1418 	const struct option null_opt = {
1419 		NULL, 0, NULL, 0
1420 	};
1421 
1422 	struct option *all_opts;
1423 	char *cp;
1424 	int optlen;
1425 
1426 	optlen = sizeof(common_opts);
1427 
1428 	if (cpu_intel)
1429 		optlen += sizeof(intel_opts);
1430 	else
1431 		optlen += sizeof(amd_opts);
1432 
1433 	optlen += sizeof(null_opt);
1434 
1435 	all_opts = malloc(optlen);
1436 
1437 	cp = (char *)all_opts;
1438 	memcpy(cp, common_opts, sizeof(common_opts));
1439 	cp += sizeof(common_opts);
1440 
1441 	if (cpu_intel) {
1442 		memcpy(cp, intel_opts, sizeof(intel_opts));
1443 		cp += sizeof(intel_opts);
1444 	} else {
1445 		memcpy(cp, amd_opts, sizeof(amd_opts));
1446 		cp += sizeof(amd_opts);
1447 	}
1448 
1449 	memcpy(cp, &null_opt, sizeof(null_opt));
1450 	cp += sizeof(null_opt);
1451 
1452 	return (all_opts);
1453 }
1454 
1455 static const char *
wday_str(int idx)1456 wday_str(int idx)
1457 {
1458 	static const char *weekdays[] = {
1459 		"Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
1460 	};
1461 
1462 	if (idx >= 0 && idx < 7)
1463 		return (weekdays[idx]);
1464 	else
1465 		return ("UNK");
1466 }
1467 
1468 static const char *
mon_str(int idx)1469 mon_str(int idx)
1470 {
1471 	static const char *months[] = {
1472 		"Jan", "Feb", "Mar", "Apr", "May", "Jun",
1473 		"Jul", "Aug", "Sep", "Oct", "Nov", "Dec"
1474 	};
1475 
1476 	if (idx >= 0 && idx < 12)
1477 		return (months[idx]);
1478 	else
1479 		return ("UNK");
1480 }
1481 
1482 static int
show_memmap(struct vmctx * ctx)1483 show_memmap(struct vmctx *ctx)
1484 {
1485 	char name[SPECNAMELEN + 1], numbuf[8];
1486 	vm_ooffset_t segoff;
1487 	vm_paddr_t gpa;
1488 	size_t maplen, seglen;
1489 	int error, flags, prot, segid, delim;
1490 
1491 	printf("Address     Length      Segment     Offset      ");
1492 	printf("Prot  Flags\n");
1493 
1494 	gpa = 0;
1495 	while (1) {
1496 		error = vm_mmap_getnext(ctx, &gpa, &segid, &segoff, &maplen,
1497 		    &prot, &flags);
1498 		if (error)
1499 			return (errno == ENOENT ? 0 : error);
1500 
1501 		error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1502 		if (error)
1503 			return (error);
1504 
1505 		printf("%-12lX", gpa);
1506 		humanize_number(numbuf, sizeof(numbuf), maplen, "B",
1507 		    HN_AUTOSCALE, HN_NOSPACE);
1508 		printf("%-12s", numbuf);
1509 
1510 		printf("%-12s", name[0] ? name : "sysmem");
1511 		printf("%-12lX", segoff);
1512 		printf("%c%c%c   ", prot & PROT_READ ? 'R' : '-',
1513 		    prot & PROT_WRITE ? 'W' : '-',
1514 		    prot & PROT_EXEC ? 'X' : '-');
1515 
1516 		delim = '\0';
1517 		if (flags & VM_MEMMAP_F_WIRED) {
1518 			printf("%cwired", delim);
1519 			delim = '/';
1520 		}
1521 		if (flags & VM_MEMMAP_F_IOMMU) {
1522 			printf("%ciommu", delim);
1523 			delim = '/';
1524 		}
1525 		printf("\n");
1526 
1527 		gpa += maplen;
1528 	}
1529 }
1530 
1531 static int
show_memseg(struct vmctx * ctx)1532 show_memseg(struct vmctx *ctx)
1533 {
1534 	char name[SPECNAMELEN + 1], numbuf[8];
1535 	size_t seglen;
1536 	int error, segid;
1537 
1538 	printf("ID  Length      Name\n");
1539 
1540 	segid = 0;
1541 	while (1) {
1542 		error = vm_get_memseg(ctx, segid, &seglen, name, sizeof(name));
1543 		if (error)
1544 			return (errno == EINVAL ? 0 : error);
1545 
1546 		if (seglen) {
1547 			printf("%-4d", segid);
1548 			humanize_number(numbuf, sizeof(numbuf), seglen, "B",
1549 			    HN_AUTOSCALE, HN_NOSPACE);
1550 			printf("%-12s", numbuf);
1551 			printf("%s", name[0] ? name : "sysmem");
1552 			printf("\n");
1553 		}
1554 		segid++;
1555 	}
1556 }
1557 
1558 static int
show_fpu(struct vmctx * ctx,int vcpu)1559 show_fpu(struct vmctx *ctx, int vcpu)
1560 {
1561 	int res, fd;
1562 
1563 	struct vm_fpu_desc_entry entries[64];
1564 	struct vm_fpu_desc desc = {
1565 		.vfd_entry_data = entries,
1566 		.vfd_num_entries = 64,
1567 	};
1568 	fd = vm_get_device_fd(ctx);
1569 	res = ioctl(fd, VM_DESC_FPU_AREA, &desc);
1570 	if (res != 0) {
1571 		return (errno);
1572 	}
1573 	for (uint_t i = 0; i < desc.vfd_num_entries; i++) {
1574 		const struct vm_fpu_desc_entry *entry = &entries[i];
1575 
1576 		/* confirm that AVX fields are where we expect */
1577 		if (entry->vfde_feature == XFEATURE_AVX) {
1578 			if (entry->vfde_size != 0x100 ||
1579 			    entry->vfde_off != 0x240) {
1580 				(void) fprintf(stderr,
1581 				    "show_fpu: unexpected AVX size/placement "
1582 				    "- size:%x off:%x\n",
1583 				    entry->vfde_size, entry->vfde_off);
1584 				return (EINVAL);
1585 			}
1586 		}
1587 	}
1588 	void *buf = malloc(desc.vfd_req_size);
1589 	if (buf == NULL) {
1590 		return (ENOMEM);
1591 	}
1592 	struct vm_fpu_state req = {
1593 		.vcpuid = vcpu,
1594 		.buf = buf,
1595 		.len = desc.vfd_req_size,
1596 	};
1597 	res = ioctl(fd, VM_GET_FPU, &req);
1598 	if (res != 0) {
1599 		res = errno;
1600 		free(buf);
1601 		return (res);
1602 	}
1603 
1604 	const struct xsave_state *state = buf;
1605 	const struct fxsave_state *fx = &state->xs_fxsave;
1606 	(void) printf("fpu_fcw[%d]\t\t0x%04x\n", vcpu, fx->fx_fcw);
1607 	(void) printf("fpu_fsw[%d]\t\t0x%04x\n", vcpu, fx->fx_fsw);
1608 	(void) printf("fpu_ftw[%d]\t\t0x%04x\n", vcpu, fx->fx_fctw);
1609 	(void) printf("fpu_fop[%d]\t\t0x%04x\n", vcpu, fx->fx_fop);
1610 	(void) printf("fpu_rip[%d]\t\t0x%016lx\n", vcpu, fx->fx_rip);
1611 	(void) printf("fpu_rdp[%d]\t\t0x%016lx\n", vcpu, fx->fx_rdp);
1612 	(void) printf("fpu_mxcsr[%d]\t\t0x%08x\n", vcpu, fx->fx_mxcsr);
1613 	(void) printf("fpu_mxcsr_mask[%d]\t0x%08x\n", vcpu,
1614 	    fx->fx_mxcsr_mask);
1615 	/* ST/MMX regs */
1616 	for (uint_t i = 0; i < 8; i++) {
1617 		(void) printf("fpu_st%u[%d]\t\t0x%08x%08x%08x%08x\n", vcpu, i,
1618 		    fx->fx_st[i].__fpr_pad[0], fx->fx_st[i].__fpr_pad[1],
1619 		    fx->fx_st[i].__fpr_pad[2], fx->fx_st[i].__fpr_pad[3]);
1620 	}
1621 	/* SSE regs */
1622 	for (uint_t i = 0; i < 16; i++) {
1623 		(void) printf("fpu_xmm%u[%d]\t\t0x%08x%08x%08x%08x\n",
1624 		    i, vcpu,
1625 		    fx->fx_xmm[i]._l[0], fx->fx_xmm[i]._l[1],
1626 		    fx->fx_xmm[i]._l[2], fx->fx_xmm[i]._l[3]);
1627 	}
1628 
1629 	if (state->xs_header.xsh_xstate_bv & XFEATURE_AVX) {
1630 		/* AVX regs */
1631 		for (uint_t i = 0; i < 16; i++) {
1632 			(void) printf("fpu_ymm%u[%d]\t\t0x%08x%08x%08x%08x\n",
1633 			    i, vcpu,
1634 			    state->xs_ymm[i]._l[0], state->xs_ymm[i]._l[1],
1635 			    state->xs_ymm[i]._l[2], state->xs_ymm[i]._l[3]);
1636 		}
1637 	}
1638 
1639 	free(buf);
1640 	return (0);
1641 }
1642 
1643 static const char *
msr_name(uint32_t msr)1644 msr_name(uint32_t msr)
1645 {
1646 #define MSR_IDENT_MAP(x)	case x: return (#x);
1647 	switch (msr) {
1648 	MSR_IDENT_MAP(MSR_PAT)
1649 	MSR_IDENT_MAP(MSR_SYSENTER_CS_MSR)
1650 	MSR_IDENT_MAP(MSR_SYSENTER_ESP_MSR)
1651 	MSR_IDENT_MAP(MSR_SYSENTER_EIP_MSR)
1652 	MSR_IDENT_MAP(MSR_STAR)
1653 	MSR_IDENT_MAP(MSR_LSTAR)
1654 	MSR_IDENT_MAP(MSR_CSTAR)
1655 	MSR_IDENT_MAP(MSR_SF_MASK)
1656 	MSR_IDENT_MAP(MSR_FSBASE)
1657 	MSR_IDENT_MAP(MSR_GSBASE)
1658 	MSR_IDENT_MAP(MSR_KGSBASE)
1659 	MSR_IDENT_MAP(MSR_EFER)
1660 	MSR_IDENT_MAP(MSR_MTRRcap)
1661 	MSR_IDENT_MAP(MSR_MTRRdefType)
1662 	case MSR_TSC:
1663 		return ("MSR_TSC (offset from system boot)");
1664 	default:
1665 		return (NULL);
1666 	}
1667 }
1668 
1669 static int
show_msrs(struct vmctx * ctx,int vcpu)1670 show_msrs(struct vmctx *ctx, int vcpu)
1671 {
1672 	struct vdi_field_entry_v1 *msrs;
1673 	struct vm_data_xfer xfer = {
1674 		.vdx_vcpuid = vcpu,
1675 		.vdx_class = VDC_MSR,
1676 		.vdx_version = 1,
1677 		.vdx_len = 0,
1678 		.vdx_data = &msrs,
1679 	};
1680 	int fd = vm_get_device_fd(ctx);
1681 	int res;
1682 
1683 	/* Figure out how many entries we need to alloc for */
1684 	res = ioctl(fd, VM_DATA_READ, &xfer);
1685 	if (res == 0) {
1686 		return (EINVAL);
1687 	} else if (errno != ENOSPC) {
1688 		return (errno);
1689 	}
1690 	const uint32_t len = xfer.vdx_result_len;
1691 	msrs = malloc(len);
1692 	if (msrs == NULL) {
1693 		return (ENOMEM);
1694 	}
1695 	bzero(msrs, len);
1696 	xfer.vdx_data = msrs;
1697 	xfer.vdx_len = len;
1698 
1699 	/* Query the actual data, now that we should have an adequate buffer */
1700 	res = ioctl(fd, VM_DATA_READ, &xfer);
1701 	if (res != 0) {
1702 		free(msrs);
1703 		return (errno);
1704 	}
1705 
1706 	const uint_t count =
1707 	    xfer.vdx_result_len / sizeof (struct vdi_field_entry_v1);
1708 	for (uint_t i = 0; i < count; i++) {
1709 		const uint32_t ident = msrs[i].vfe_ident;
1710 		const uint64_t value = msrs[i].vfe_value;
1711 
1712 		const char *name = msr_name(ident);
1713 
1714 		if (name != NULL) {
1715 			printf("msr[%s]\t = %x\n", name, value);
1716 		} else {
1717 			printf("msr[%08x]\t = %x\n", ident, value);
1718 		}
1719 	}
1720 	free(msrs);
1721 	return (0);
1722 }
1723 
1724 int
main(int argc,char * argv[])1725 main(int argc, char *argv[])
1726 {
1727 	char *vmname;
1728 	int error, ch, vcpu, ptenum;
1729 	vm_paddr_t gpa_pmap;
1730 	struct vm_exit vmexit;
1731 	uint64_t rax, cr0, cr2, cr3, cr4, dr0, dr1, dr2, dr3, dr6, dr7;
1732 	uint64_t rsp, rip, rflags, efer;
1733 	uint64_t eptp, bm, addr, u64, pteval[4], *pte, info[2];
1734 	struct vmctx *ctx;
1735 	cpuset_t cpus;
1736 	bool cpu_intel;
1737 	uint64_t cs, ds, es, fs, gs, ss, tr, ldtr;
1738 	struct tm tm;
1739 	struct option *opts;
1740 
1741 	cpu_intel = cpu_vendor_intel();
1742 	opts = setup_options(cpu_intel);
1743 
1744 	vcpu = 0;
1745 	vmname = NULL;
1746 	assert_lapic_lvt = -1;
1747 	progname = basename(argv[0]);
1748 
1749 	while ((ch = getopt_long(argc, argv, "", opts, NULL)) != -1) {
1750 		switch (ch) {
1751 		case 0:
1752 			break;
1753 		case VMNAME:
1754 			vmname = optarg;
1755 			break;
1756 		case VCPU:
1757 			vcpu = atoi(optarg);
1758 			break;
1759 		case SET_MEM:
1760 			memsize = atoi(optarg) * MB;
1761 			memsize = roundup(memsize, 2 * MB);
1762 			break;
1763 		case SET_EFER:
1764 			efer = strtoul(optarg, NULL, 0);
1765 			set_efer = 1;
1766 			break;
1767 		case SET_CR0:
1768 			cr0 = strtoul(optarg, NULL, 0);
1769 			set_cr0 = 1;
1770 			break;
1771 		case SET_CR2:
1772 			cr2 = strtoul(optarg, NULL, 0);
1773 			set_cr2 = 1;
1774 			break;
1775 		case SET_CR3:
1776 			cr3 = strtoul(optarg, NULL, 0);
1777 			set_cr3 = 1;
1778 			break;
1779 		case SET_CR4:
1780 			cr4 = strtoul(optarg, NULL, 0);
1781 			set_cr4 = 1;
1782 			break;
1783 		case SET_DR0:
1784 			dr0 = strtoul(optarg, NULL, 0);
1785 			set_dr0 = 1;
1786 			break;
1787 		case SET_DR1:
1788 			dr1 = strtoul(optarg, NULL, 0);
1789 			set_dr1 = 1;
1790 			break;
1791 		case SET_DR2:
1792 			dr2 = strtoul(optarg, NULL, 0);
1793 			set_dr2 = 1;
1794 			break;
1795 		case SET_DR3:
1796 			dr3 = strtoul(optarg, NULL, 0);
1797 			set_dr3 = 1;
1798 			break;
1799 		case SET_DR6:
1800 			dr6 = strtoul(optarg, NULL, 0);
1801 			set_dr6 = 1;
1802 			break;
1803 		case SET_DR7:
1804 			dr7 = strtoul(optarg, NULL, 0);
1805 			set_dr7 = 1;
1806 			break;
1807 		case SET_RSP:
1808 			rsp = strtoul(optarg, NULL, 0);
1809 			set_rsp = 1;
1810 			break;
1811 		case SET_RIP:
1812 			rip = strtoul(optarg, NULL, 0);
1813 			set_rip = 1;
1814 			break;
1815 		case SET_RAX:
1816 			rax = strtoul(optarg, NULL, 0);
1817 			set_rax = 1;
1818 			break;
1819 		case SET_RFLAGS:
1820 			rflags = strtoul(optarg, NULL, 0);
1821 			set_rflags = 1;
1822 			break;
1823 		case DESC_BASE:
1824 			desc_base = strtoul(optarg, NULL, 0);
1825 			break;
1826 		case DESC_LIMIT:
1827 			desc_limit = strtoul(optarg, NULL, 0);
1828 			break;
1829 		case DESC_ACCESS:
1830 			desc_access = strtoul(optarg, NULL, 0);
1831 			break;
1832 		case SET_CS:
1833 			cs = strtoul(optarg, NULL, 0);
1834 			set_cs = 1;
1835 			break;
1836 		case SET_DS:
1837 			ds = strtoul(optarg, NULL, 0);
1838 			set_ds = 1;
1839 			break;
1840 		case SET_ES:
1841 			es = strtoul(optarg, NULL, 0);
1842 			set_es = 1;
1843 			break;
1844 		case SET_FS:
1845 			fs = strtoul(optarg, NULL, 0);
1846 			set_fs = 1;
1847 			break;
1848 		case SET_GS:
1849 			gs = strtoul(optarg, NULL, 0);
1850 			set_gs = 1;
1851 			break;
1852 		case SET_SS:
1853 			ss = strtoul(optarg, NULL, 0);
1854 			set_ss = 1;
1855 			break;
1856 		case SET_TR:
1857 			tr = strtoul(optarg, NULL, 0);
1858 			set_tr = 1;
1859 			break;
1860 		case SET_LDTR:
1861 			ldtr = strtoul(optarg, NULL, 0);
1862 			set_ldtr = 1;
1863 			break;
1864 		case SET_X2APIC_STATE:
1865 			x2apic_state = strtol(optarg, NULL, 0);
1866 			set_x2apic_state = 1;
1867 			break;
1868 		case SET_EXCEPTION_BITMAP:
1869 			exception_bitmap = strtoul(optarg, NULL, 0);
1870 			set_exception_bitmap = 1;
1871 			break;
1872 		case SET_VMCS_ENTRY_INTERRUPTION_INFO:
1873 			vmcs_entry_interruption_info = strtoul(optarg, NULL, 0);
1874 			set_vmcs_entry_interruption_info = 1;
1875 			break;
1876 		case SET_CAP:
1877 			capval = strtoul(optarg, NULL, 0);
1878 			setcap = 1;
1879 			break;
1880 		case SET_RTC_TIME:
1881 			rtc_secs = strtoul(optarg, NULL, 0);
1882 			set_rtc_time = 1;
1883 			break;
1884 		case SET_RTC_NVRAM:
1885 			rtc_nvram_value = (uint8_t)strtoul(optarg, NULL, 0);
1886 			set_rtc_nvram = 1;
1887 			break;
1888 		case RTC_NVRAM_OFFSET:
1889 			rtc_nvram_offset = strtoul(optarg, NULL, 0);
1890 			break;
1891 		case GET_GPA_PMAP:
1892 			gpa_pmap = strtoul(optarg, NULL, 0);
1893 			get_gpa_pmap = 1;
1894 			break;
1895 		case CAPNAME:
1896 			capname = optarg;
1897 			break;
1898 		case ASSERT_LAPIC_LVT:
1899 			assert_lapic_lvt = atoi(optarg);
1900 			break;
1901 		case PMTMR_PORT:
1902 			pmtmr_port = strtoul(optarg, NULL, 16);
1903 			break;
1904 		default:
1905 			usage(cpu_intel);
1906 		}
1907 	}
1908 	argc -= optind;
1909 	argv += optind;
1910 
1911 	if (vmname == NULL)
1912 		usage(cpu_intel);
1913 
1914 	error = 0;
1915 
1916 	if (!error && create)
1917 		error = vm_create(vmname, 0);
1918 
1919 	if (!error) {
1920 		ctx = vm_open(vmname);
1921 		if (ctx == NULL) {
1922 			fprintf(stderr,
1923 			    "vm_open: %s could not be opened: %s\n",
1924 			    vmname, strerror(errno));
1925 			exit (1);
1926 		}
1927 	}
1928 
1929 	if (!error && pmtmr_port) {
1930 		error = vm_pmtmr_set_location(ctx, pmtmr_port);
1931 		exit(error);
1932 	}
1933 
1934 	if (!error && wrlock_cycle) {
1935 		error = vm_wrlock_cycle(ctx);
1936 		exit(error);
1937 	}
1938 
1939 	if (!error && memsize)
1940 		error = vm_setup_memory(ctx, memsize, VM_MMAP_ALL);
1941 
1942 	if (!error && set_efer)
1943 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_EFER, efer);
1944 
1945 	if (!error && set_cr0)
1946 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR0, cr0);
1947 
1948 	if (!error && set_cr2)
1949 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR2, cr2);
1950 
1951 	if (!error && set_cr3)
1952 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR3, cr3);
1953 
1954 	if (!error && set_cr4)
1955 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CR4, cr4);
1956 
1957 	if (!error && set_dr0)
1958 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR0, dr0);
1959 
1960 	if (!error && set_dr1)
1961 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR1, dr1);
1962 
1963 	if (!error && set_dr2)
1964 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR2, dr2);
1965 
1966 	if (!error && set_dr3)
1967 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR3, dr3);
1968 
1969 	if (!error && set_dr6)
1970 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR6, dr6);
1971 
1972 	if (!error && set_dr7)
1973 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DR7, dr7);
1974 
1975 	if (!error && set_rsp)
1976 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RSP, rsp);
1977 
1978 	if (!error && set_rip)
1979 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RIP, rip);
1980 
1981 	if (!error && set_rax)
1982 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, rax);
1983 
1984 	if (!error && set_rflags) {
1985 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RFLAGS,
1986 					rflags);
1987 	}
1988 
1989 	if (!error && set_desc_ds) {
1990 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_DS,
1991 				    desc_base, desc_limit, desc_access);
1992 	}
1993 
1994 	if (!error && set_desc_es) {
1995 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_ES,
1996 				    desc_base, desc_limit, desc_access);
1997 	}
1998 
1999 	if (!error && set_desc_ss) {
2000 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_SS,
2001 				    desc_base, desc_limit, desc_access);
2002 	}
2003 
2004 	if (!error && set_desc_cs) {
2005 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_CS,
2006 				    desc_base, desc_limit, desc_access);
2007 	}
2008 
2009 	if (!error && set_desc_fs) {
2010 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_FS,
2011 				    desc_base, desc_limit, desc_access);
2012 	}
2013 
2014 	if (!error && set_desc_gs) {
2015 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GS,
2016 				    desc_base, desc_limit, desc_access);
2017 	}
2018 
2019 	if (!error && set_desc_tr) {
2020 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_TR,
2021 				    desc_base, desc_limit, desc_access);
2022 	}
2023 
2024 	if (!error && set_desc_ldtr) {
2025 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_LDTR,
2026 				    desc_base, desc_limit, desc_access);
2027 	}
2028 
2029 	if (!error && set_desc_gdtr) {
2030 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_GDTR,
2031 				    desc_base, desc_limit, 0);
2032 	}
2033 
2034 	if (!error && set_desc_idtr) {
2035 		error = vm_set_desc(ctx, vcpu, VM_REG_GUEST_IDTR,
2036 				    desc_base, desc_limit, 0);
2037 	}
2038 
2039 	if (!error && set_cs)
2040 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_CS, cs);
2041 
2042 	if (!error && set_ds)
2043 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_DS, ds);
2044 
2045 	if (!error && set_es)
2046 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_ES, es);
2047 
2048 	if (!error && set_fs)
2049 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_FS, fs);
2050 
2051 	if (!error && set_gs)
2052 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_GS, gs);
2053 
2054 	if (!error && set_ss)
2055 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_SS, ss);
2056 
2057 	if (!error && set_tr)
2058 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_TR, tr);
2059 
2060 	if (!error && set_ldtr)
2061 		error = vm_set_register(ctx, vcpu, VM_REG_GUEST_LDTR, ldtr);
2062 
2063 	if (!error && set_x2apic_state)
2064 		error = vm_set_x2apic_state(ctx, vcpu, x2apic_state);
2065 
2066 	if (!error && set_exception_bitmap) {
2067 		if (cpu_intel)
2068 			error = vm_set_vmcs_field(ctx, vcpu,
2069 						  VMCS_EXCEPTION_BITMAP,
2070 						  exception_bitmap);
2071 		else
2072 			error = vm_set_vmcb_field(ctx, vcpu,
2073 						  VMCB_OFF_EXC_INTERCEPT,
2074 						  4, exception_bitmap);
2075 	}
2076 
2077 	if (!error && cpu_intel && set_vmcs_entry_interruption_info) {
2078 		error = vm_set_vmcs_field(ctx, vcpu, VMCS_ENTRY_INTR_INFO,
2079 					  vmcs_entry_interruption_info);
2080 	}
2081 
2082 	if (!error && inject_nmi) {
2083 		error = vm_inject_nmi(ctx, vcpu);
2084 	}
2085 
2086 	if (!error && assert_lapic_lvt != -1) {
2087 		error = vm_lapic_local_irq(ctx, vcpu, assert_lapic_lvt);
2088 	}
2089 
2090 	if (!error && (get_memseg || get_all))
2091 		error = show_memseg(ctx);
2092 
2093 	if (!error && (get_memmap || get_all))
2094 		error = show_memmap(ctx);
2095 
2096 	if (!error)
2097 		error = get_all_registers(ctx, vcpu);
2098 
2099 	if (!error)
2100 		error = get_all_segments(ctx, vcpu);
2101 
2102 	if (!error && (get_fpu || get_all)) {
2103 		error = show_fpu(ctx, vcpu);
2104 	}
2105 
2106 	if (!error) {
2107 		if (cpu_intel)
2108 			error = get_misc_vmcs(ctx, vcpu);
2109 		else
2110 			error = get_misc_vmcb(ctx, vcpu);
2111 	}
2112 
2113 	if (!error && (get_x2apic_state || get_all)) {
2114 		error = vm_get_x2apic_state(ctx, vcpu, &x2apic_state);
2115 		if (error == 0)
2116 			printf("x2apic_state[%d]\t%d\n", vcpu, x2apic_state);
2117 	}
2118 
2119 	if (!error && (get_eptp || get_all)) {
2120 		if (cpu_intel)
2121 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_EPTP, &eptp);
2122 		else
2123 			error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_NPT_BASE,
2124 						   8, &eptp);
2125 		if (error == 0)
2126 			printf("%s[%d]\t\t0x%016lx\n",
2127 				cpu_intel ? "eptp" : "rvi/npt", vcpu, eptp);
2128 	}
2129 
2130 	if (!error && (get_exception_bitmap || get_all)) {
2131 		if(cpu_intel)
2132 			error = vm_get_vmcs_field(ctx, vcpu,
2133 						VMCS_EXCEPTION_BITMAP, &bm);
2134 		else
2135 			error = vm_get_vmcb_field(ctx, vcpu,
2136 						  VMCB_OFF_EXC_INTERCEPT,
2137 						  4, &bm);
2138 		if (error == 0)
2139 			printf("exception_bitmap[%d]\t%#lx\n", vcpu, bm);
2140 	}
2141 
2142 	if (!error && (get_io_bitmap || get_all)) {
2143 		if (cpu_intel) {
2144 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_A,
2145 						  &bm);
2146 			if (error == 0)
2147 				printf("io_bitmap_a[%d]\t%#lx\n", vcpu, bm);
2148 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_IO_BITMAP_B,
2149 						  &bm);
2150 			if (error == 0)
2151 				printf("io_bitmap_b[%d]\t%#lx\n", vcpu, bm);
2152 		} else {
2153 			error = vm_get_vmcb_field(ctx, vcpu,
2154 						  VMCB_OFF_IO_PERM, 8, &bm);
2155 			if (error == 0)
2156 				printf("io_bitmap[%d]\t%#lx\n", vcpu, bm);
2157 		}
2158 	}
2159 
2160 	if (!error && (get_tsc_offset || get_all)) {
2161 		uint64_t tscoff;
2162 		if (cpu_intel)
2163 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_TSC_OFFSET,
2164 						  &tscoff);
2165 		else
2166 			error = vm_get_vmcb_field(ctx, vcpu,
2167 						  VMCB_OFF_TSC_OFFSET,
2168 						  8, &tscoff);
2169 		if (error == 0)
2170 			printf("tsc_offset[%d]\t0x%016lx\n", vcpu, tscoff);
2171 	}
2172 
2173 	if (!error && (get_msr_bitmap_address || get_all)) {
2174 		if (cpu_intel)
2175 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_MSR_BITMAP,
2176 						  &addr);
2177 		else
2178 			error = vm_get_vmcb_field(ctx, vcpu,
2179 						  VMCB_OFF_MSR_PERM, 8, &addr);
2180 		if (error == 0)
2181 			printf("msr_bitmap[%d]\t\t%#lx\n", vcpu, addr);
2182 	}
2183 
2184 	if (!error && (get_vpid_asid || get_all)) {
2185 		uint64_t vpid;
2186 		if (cpu_intel)
2187 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_VPID, &vpid);
2188 		else
2189 			error = vm_get_vmcb_field(ctx, vcpu, VMCB_OFF_ASID,
2190 						  4, &vpid);
2191 		if (error == 0)
2192 			printf("%s[%d]\t\t0x%04lx\n",
2193 				cpu_intel ? "vpid" : "asid", vcpu, vpid);
2194 	}
2195 
2196 	if (!error && (get_guest_msrs || get_all)) {
2197 		error = show_msrs(ctx, vcpu);
2198 	}
2199 
2200 	if (!error && (get_exit_reason || get_all)) {
2201 		if (cpu_intel)
2202 			error = vm_get_vmcs_field(ctx, vcpu, VMCS_EXIT_REASON,
2203 						  &u64);
2204 		else
2205 			error = vm_get_vmcb_field(ctx, vcpu,
2206 						  VMCB_OFF_EXIT_REASON, 8,
2207 						  &u64);
2208 		if (error == 0)
2209 			printf("exit_reason[%d]\t%#lx\n", vcpu, u64);
2210 	}
2211 
2212 	if (!error && setcap) {
2213 		int captype;
2214 		captype = vm_capability_name2type(capname);
2215 		error = vm_set_capability(ctx, vcpu, captype, capval);
2216 		if (error != 0 && errno == ENOENT)
2217 			printf("Capability \"%s\" is not available\n", capname);
2218 	}
2219 
2220 	if (!error && get_gpa_pmap) {
2221 		error = vm_get_gpa_pmap(ctx, gpa_pmap, pteval, &ptenum);
2222 		if (error == 0) {
2223 			printf("gpa %#lx:", gpa_pmap);
2224 			pte = &pteval[0];
2225 			while (ptenum-- > 0)
2226 				printf(" %#lx", *pte++);
2227 			printf("\n");
2228 		}
2229 	}
2230 
2231 	if (!error && set_rtc_nvram)
2232 		error = vm_rtc_write(ctx, rtc_nvram_offset, rtc_nvram_value);
2233 
2234 	if (!error && (get_rtc_nvram || get_all)) {
2235 		error = vm_rtc_read(ctx, rtc_nvram_offset, &rtc_nvram_value);
2236 		if (error == 0) {
2237 			printf("rtc nvram[%03d]: 0x%02x\n", rtc_nvram_offset,
2238 			    rtc_nvram_value);
2239 		}
2240 	}
2241 
2242 	if (!error && set_rtc_time)
2243 		error = vm_rtc_settime(ctx, rtc_secs);
2244 
2245 	if (!error && (get_rtc_time || get_all)) {
2246 		error = vm_rtc_gettime(ctx, &rtc_secs);
2247 		if (error == 0) {
2248 			gmtime_r(&rtc_secs, &tm);
2249 			printf("rtc time %#lx: %s %s %02d %02d:%02d:%02d %d\n",
2250 			    rtc_secs, wday_str(tm.tm_wday), mon_str(tm.tm_mon),
2251 			    tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec,
2252 			    1900 + tm.tm_year);
2253 		}
2254 	}
2255 
2256 	if (!error && (getcap || get_all)) {
2257 		int captype, val, getcaptype;
2258 
2259 		if (getcap && capname)
2260 			getcaptype = vm_capability_name2type(capname);
2261 		else
2262 			getcaptype = -1;
2263 
2264 		for (captype = 0; captype < VM_CAP_MAX; captype++) {
2265 			if (getcaptype >= 0 && captype != getcaptype)
2266 				continue;
2267 			error = vm_get_capability(ctx, vcpu, captype, &val);
2268 			if (error == 0) {
2269 				printf("Capability \"%s\" is %s on vcpu %d\n",
2270 					vm_capability_type2name(captype),
2271 					val ? "set" : "not set", vcpu);
2272 			} else if (errno == ENOENT) {
2273 				error = 0;
2274 				printf("Capability \"%s\" is not available\n",
2275 					vm_capability_type2name(captype));
2276 			} else {
2277 				break;
2278 			}
2279 		}
2280 	}
2281 
2282 	if (!error && (get_active_cpus || get_all)) {
2283 		error = vm_active_cpus(ctx, &cpus);
2284 		if (!error)
2285 			print_cpus("active cpus", &cpus);
2286 	}
2287 
2288 	if (!error && (get_suspended_cpus || get_all)) {
2289 		error = vm_suspended_cpus(ctx, &cpus);
2290 		if (!error)
2291 			print_cpus("suspended cpus", &cpus);
2292 	}
2293 
2294 	if (!error && (get_intinfo || get_all)) {
2295 		error = vm_get_intinfo(ctx, vcpu, &info[0], &info[1]);
2296 		if (!error) {
2297 			print_intinfo("pending", info[0]);
2298 			print_intinfo("current", info[1]);
2299 		}
2300 	}
2301 
2302 	if (!error && (get_stats || get_all)) {
2303 		int i, num_stats;
2304 		uint64_t *stats;
2305 		struct timeval tv;
2306 		const char *desc;
2307 
2308 		stats = vm_get_stats(ctx, vcpu, &tv, &num_stats);
2309 		if (stats != NULL) {
2310 			printf("vcpu%d stats:\n", vcpu);
2311 			for (i = 0; i < num_stats; i++) {
2312 				desc = vm_get_stat_desc(ctx, i);
2313 				printf("%-40s\t%ld\n", desc, stats[i]);
2314 			}
2315 		}
2316 	}
2317 
2318 	if (!error && (get_cpu_topology || get_all)) {
2319 		uint16_t sockets, cores, threads, maxcpus;
2320 
2321 		vm_get_topology(ctx, &sockets, &cores, &threads, &maxcpus);
2322 		printf("cpu_topology:\tsockets=%hu, cores=%hu, threads=%hu, "
2323 		    "maxcpus=%hu\n", sockets, cores, threads, maxcpus);
2324 	}
2325 
2326 	if (!error && run) {
2327 		struct vm_entry entry;
2328 
2329 		bzero(&entry, sizeof (entry));
2330 
2331 		error = vm_run(ctx, vcpu, &entry, &vmexit);
2332 		if (error == 0)
2333 			dump_vm_run_exitcode(&vmexit, vcpu);
2334 		else
2335 			printf("vm_run error %d\n", error);
2336 	}
2337 
2338 	if (!error && force_reset)
2339 		error = vm_suspend(ctx, VM_SUSPEND_RESET);
2340 
2341 	if (!error && force_poweroff)
2342 		error = vm_suspend(ctx, VM_SUSPEND_POWEROFF);
2343 
2344 	if (error)
2345 		printf("errno = %d\n", errno);
2346 
2347 	if (!error && destroy)
2348 		vm_destroy(ctx);
2349 
2350 	free (opts);
2351 	exit(error);
2352 }
2353