1bf21cd93STycho Nightingale /*-
2*32640292SAndy Fiddaman * SPDX-License-Identifier: BSD-2-Clause
34c87aefeSPatrick Mooney *
4bf21cd93STycho Nightingale * Copyright (c) 2012 NetApp, Inc.
5bf21cd93STycho Nightingale * All rights reserved.
6bf21cd93STycho Nightingale *
7bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without
8bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions
9bf21cd93STycho Nightingale * are met:
10bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright
11bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer.
12bf21cd93STycho Nightingale * 2. Redistributions in binary form must reproduce the above copyright
13bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer in the
14bf21cd93STycho Nightingale * documentation and/or other materials provided with the distribution.
15bf21cd93STycho Nightingale *
16bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17bf21cd93STycho Nightingale * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18bf21cd93STycho Nightingale * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19bf21cd93STycho Nightingale * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20bf21cd93STycho Nightingale * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21bf21cd93STycho Nightingale * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22bf21cd93STycho Nightingale * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23bf21cd93STycho Nightingale * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24bf21cd93STycho Nightingale * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25bf21cd93STycho Nightingale * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26bf21cd93STycho Nightingale * SUCH DAMAGE.
27bf21cd93STycho Nightingale */
28bf21cd93STycho Nightingale
29bf21cd93STycho Nightingale #include <sys/cdefs.h>
30bf21cd93STycho Nightingale
31bf21cd93STycho Nightingale #include <sys/types.h>
32bf21cd93STycho Nightingale #include <sys/errno.h>
33bf21cd93STycho Nightingale #include <x86/mptable.h>
34bf21cd93STycho Nightingale
35bf21cd93STycho Nightingale #include <stdio.h>
36bf21cd93STycho Nightingale #include <string.h>
37bf21cd93STycho Nightingale
38bf21cd93STycho Nightingale #include "acpi.h"
39154972afSPatrick Mooney #include "debug.h"
40bf21cd93STycho Nightingale #include "bhyverun.h"
41bf21cd93STycho Nightingale #include "mptbl.h"
42bf21cd93STycho Nightingale #include "pci_emul.h"
43bf21cd93STycho Nightingale
44bf21cd93STycho Nightingale #define MPTABLE_BASE 0xE0000
45bf21cd93STycho Nightingale
46bf21cd93STycho Nightingale /* floating pointer length + maximum length of configuration table */
47bf21cd93STycho Nightingale #define MPTABLE_MAX_LENGTH (65536 + 16)
48bf21cd93STycho Nightingale
49bf21cd93STycho Nightingale #define LAPIC_PADDR 0xFEE00000
50bf21cd93STycho Nightingale #define LAPIC_VERSION 16
51bf21cd93STycho Nightingale
52bf21cd93STycho Nightingale #define IOAPIC_PADDR 0xFEC00000
53bf21cd93STycho Nightingale #define IOAPIC_VERSION 0x11
54bf21cd93STycho Nightingale
55bf21cd93STycho Nightingale #define MP_SPECREV 4
56bf21cd93STycho Nightingale #define MPFP_SIG "_MP_"
57bf21cd93STycho Nightingale
58bf21cd93STycho Nightingale /* Configuration header defines */
59bf21cd93STycho Nightingale #define MPCH_SIG "PCMP"
60bf21cd93STycho Nightingale #define MPCH_OEMID "BHyVe "
61bf21cd93STycho Nightingale #define MPCH_OEMID_LEN 8
62bf21cd93STycho Nightingale #define MPCH_PRODID "Hypervisor "
63bf21cd93STycho Nightingale #define MPCH_PRODID_LEN 12
64bf21cd93STycho Nightingale
65bf21cd93STycho Nightingale /* Processor entry defines */
66bf21cd93STycho Nightingale #define MPEP_SIG_FAMILY 6 /* XXX bhyve should supply this */
67bf21cd93STycho Nightingale #define MPEP_SIG_MODEL 26
68bf21cd93STycho Nightingale #define MPEP_SIG_STEPPING 5
69bf21cd93STycho Nightingale #define MPEP_SIG \
70bf21cd93STycho Nightingale ((MPEP_SIG_FAMILY << 8) | \
71bf21cd93STycho Nightingale (MPEP_SIG_MODEL << 4) | \
72bf21cd93STycho Nightingale (MPEP_SIG_STEPPING))
73bf21cd93STycho Nightingale
74bf21cd93STycho Nightingale #define MPEP_FEATURES (0xBFEBFBFF) /* XXX Intel i7 */
75bf21cd93STycho Nightingale
76bf21cd93STycho Nightingale /* Number of local intr entries */
77bf21cd93STycho Nightingale #define MPEII_NUM_LOCAL_IRQ 2
78bf21cd93STycho Nightingale
79bf21cd93STycho Nightingale /* Bus entry defines */
80bf21cd93STycho Nightingale #define MPE_NUM_BUSES 2
81bf21cd93STycho Nightingale #define MPE_BUSNAME_LEN 6
82bf21cd93STycho Nightingale #define MPE_BUSNAME_ISA "ISA "
83bf21cd93STycho Nightingale #define MPE_BUSNAME_PCI "PCI "
84bf21cd93STycho Nightingale
85bf21cd93STycho Nightingale static void *oem_tbl_start;
86bf21cd93STycho Nightingale static int oem_tbl_size;
87bf21cd93STycho Nightingale
88bf21cd93STycho Nightingale static uint8_t
mpt_compute_checksum(void * base,size_t len)89bf21cd93STycho Nightingale mpt_compute_checksum(void *base, size_t len)
90bf21cd93STycho Nightingale {
91bf21cd93STycho Nightingale uint8_t *bytes;
92bf21cd93STycho Nightingale uint8_t sum;
93bf21cd93STycho Nightingale
94bf21cd93STycho Nightingale for(bytes = base, sum = 0; len > 0; len--) {
95bf21cd93STycho Nightingale sum += *bytes++;
96bf21cd93STycho Nightingale }
97bf21cd93STycho Nightingale
98bf21cd93STycho Nightingale return (256 - sum);
99bf21cd93STycho Nightingale }
100bf21cd93STycho Nightingale
101bf21cd93STycho Nightingale static void
mpt_build_mpfp(mpfps_t mpfp,vm_paddr_t gpa)102bf21cd93STycho Nightingale mpt_build_mpfp(mpfps_t mpfp, vm_paddr_t gpa)
103bf21cd93STycho Nightingale {
104bf21cd93STycho Nightingale
105bf21cd93STycho Nightingale memset(mpfp, 0, sizeof(*mpfp));
106bf21cd93STycho Nightingale memcpy(mpfp->signature, MPFP_SIG, 4);
107bf21cd93STycho Nightingale mpfp->pap = gpa + sizeof(*mpfp);
108bf21cd93STycho Nightingale mpfp->length = 1;
109bf21cd93STycho Nightingale mpfp->spec_rev = MP_SPECREV;
110bf21cd93STycho Nightingale mpfp->checksum = mpt_compute_checksum(mpfp, sizeof(*mpfp));
111bf21cd93STycho Nightingale }
112bf21cd93STycho Nightingale
113bf21cd93STycho Nightingale static void
mpt_build_mpch(mpcth_t mpch)114bf21cd93STycho Nightingale mpt_build_mpch(mpcth_t mpch)
115bf21cd93STycho Nightingale {
116bf21cd93STycho Nightingale
117bf21cd93STycho Nightingale memset(mpch, 0, sizeof(*mpch));
118bf21cd93STycho Nightingale memcpy(mpch->signature, MPCH_SIG, 4);
119bf21cd93STycho Nightingale mpch->spec_rev = MP_SPECREV;
120bf21cd93STycho Nightingale memcpy(mpch->oem_id, MPCH_OEMID, MPCH_OEMID_LEN);
121bf21cd93STycho Nightingale memcpy(mpch->product_id, MPCH_PRODID, MPCH_PRODID_LEN);
122bf21cd93STycho Nightingale mpch->apic_address = LAPIC_PADDR;
123bf21cd93STycho Nightingale }
124bf21cd93STycho Nightingale
125bf21cd93STycho Nightingale static void
mpt_build_proc_entries(proc_entry_ptr mpep,int ncpu)126bf21cd93STycho Nightingale mpt_build_proc_entries(proc_entry_ptr mpep, int ncpu)
127bf21cd93STycho Nightingale {
128bf21cd93STycho Nightingale int i;
129bf21cd93STycho Nightingale
130bf21cd93STycho Nightingale for (i = 0; i < ncpu; i++) {
131bf21cd93STycho Nightingale memset(mpep, 0, sizeof(*mpep));
132bf21cd93STycho Nightingale mpep->type = MPCT_ENTRY_PROCESSOR;
133bf21cd93STycho Nightingale mpep->apic_id = i; // XXX
134bf21cd93STycho Nightingale mpep->apic_version = LAPIC_VERSION;
135bf21cd93STycho Nightingale mpep->cpu_flags = PROCENTRY_FLAG_EN;
136bf21cd93STycho Nightingale if (i == 0)
137bf21cd93STycho Nightingale mpep->cpu_flags |= PROCENTRY_FLAG_BP;
138bf21cd93STycho Nightingale mpep->cpu_signature = MPEP_SIG;
139bf21cd93STycho Nightingale mpep->feature_flags = MPEP_FEATURES;
140bf21cd93STycho Nightingale mpep++;
141bf21cd93STycho Nightingale }
142bf21cd93STycho Nightingale }
143bf21cd93STycho Nightingale
144bf21cd93STycho Nightingale static void
mpt_build_localint_entries(int_entry_ptr mpie)145bf21cd93STycho Nightingale mpt_build_localint_entries(int_entry_ptr mpie)
146bf21cd93STycho Nightingale {
147bf21cd93STycho Nightingale
148bf21cd93STycho Nightingale /* Hardcode LINT0 as ExtINT on all CPUs. */
149bf21cd93STycho Nightingale memset(mpie, 0, sizeof(*mpie));
150bf21cd93STycho Nightingale mpie->type = MPCT_ENTRY_LOCAL_INT;
151bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_EXTINT;
152bf21cd93STycho Nightingale mpie->int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
153bf21cd93STycho Nightingale INTENTRY_FLAGS_TRIGGER_CONFORM;
154bf21cd93STycho Nightingale mpie->dst_apic_id = 0xff;
155bf21cd93STycho Nightingale mpie->dst_apic_int = 0;
156bf21cd93STycho Nightingale mpie++;
157bf21cd93STycho Nightingale
158bf21cd93STycho Nightingale /* Hardcode LINT1 as NMI on all CPUs. */
159bf21cd93STycho Nightingale memset(mpie, 0, sizeof(*mpie));
160bf21cd93STycho Nightingale mpie->type = MPCT_ENTRY_LOCAL_INT;
161bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_NMI;
162bf21cd93STycho Nightingale mpie->int_flags = INTENTRY_FLAGS_POLARITY_CONFORM |
163bf21cd93STycho Nightingale INTENTRY_FLAGS_TRIGGER_CONFORM;
164bf21cd93STycho Nightingale mpie->dst_apic_id = 0xff;
165bf21cd93STycho Nightingale mpie->dst_apic_int = 1;
166bf21cd93STycho Nightingale }
167bf21cd93STycho Nightingale
168bf21cd93STycho Nightingale static void
mpt_build_bus_entries(bus_entry_ptr mpeb)169bf21cd93STycho Nightingale mpt_build_bus_entries(bus_entry_ptr mpeb)
170bf21cd93STycho Nightingale {
171bf21cd93STycho Nightingale
172bf21cd93STycho Nightingale memset(mpeb, 0, sizeof(*mpeb));
173bf21cd93STycho Nightingale mpeb->type = MPCT_ENTRY_BUS;
174bf21cd93STycho Nightingale mpeb->bus_id = 0;
175bf21cd93STycho Nightingale memcpy(mpeb->bus_type, MPE_BUSNAME_PCI, MPE_BUSNAME_LEN);
176bf21cd93STycho Nightingale mpeb++;
177bf21cd93STycho Nightingale
178bf21cd93STycho Nightingale memset(mpeb, 0, sizeof(*mpeb));
179bf21cd93STycho Nightingale mpeb->type = MPCT_ENTRY_BUS;
1806dc98349SAndy Fiddaman mpeb->bus_id = 1;
181bf21cd93STycho Nightingale memcpy(mpeb->bus_type, MPE_BUSNAME_ISA, MPE_BUSNAME_LEN);
182bf21cd93STycho Nightingale }
183bf21cd93STycho Nightingale
184bf21cd93STycho Nightingale static void
mpt_build_ioapic_entries(io_apic_entry_ptr mpei,int id)185bf21cd93STycho Nightingale mpt_build_ioapic_entries(io_apic_entry_ptr mpei, int id)
186bf21cd93STycho Nightingale {
187bf21cd93STycho Nightingale
188bf21cd93STycho Nightingale memset(mpei, 0, sizeof(*mpei));
189bf21cd93STycho Nightingale mpei->type = MPCT_ENTRY_IOAPIC;
190bf21cd93STycho Nightingale mpei->apic_id = id;
191bf21cd93STycho Nightingale mpei->apic_version = IOAPIC_VERSION;
192bf21cd93STycho Nightingale mpei->apic_flags = IOAPICENTRY_FLAG_EN;
193bf21cd93STycho Nightingale mpei->apic_address = IOAPIC_PADDR;
194bf21cd93STycho Nightingale }
195bf21cd93STycho Nightingale
196bf21cd93STycho Nightingale static int
mpt_count_ioint_entries(void)197bf21cd93STycho Nightingale mpt_count_ioint_entries(void)
198bf21cd93STycho Nightingale {
199bf21cd93STycho Nightingale int bus, count;
200bf21cd93STycho Nightingale
201bf21cd93STycho Nightingale count = 0;
202bf21cd93STycho Nightingale for (bus = 0; bus <= PCI_BUSMAX; bus++)
203bf21cd93STycho Nightingale count += pci_count_lintr(bus);
204bf21cd93STycho Nightingale
205bf21cd93STycho Nightingale /*
206bf21cd93STycho Nightingale * Always include entries for the first 16 pins along with a entry
207bf21cd93STycho Nightingale * for each active PCI INTx pin.
208bf21cd93STycho Nightingale */
209bf21cd93STycho Nightingale return (16 + count);
210bf21cd93STycho Nightingale }
211bf21cd93STycho Nightingale
212bf21cd93STycho Nightingale static void
mpt_generate_pci_int(int bus,int slot,int pin,int pirq_pin __unused,int ioapic_irq,void * arg)21359d65d31SAndy Fiddaman mpt_generate_pci_int(int bus, int slot, int pin, int pirq_pin __unused,
21459d65d31SAndy Fiddaman int ioapic_irq, void *arg)
215bf21cd93STycho Nightingale {
216bf21cd93STycho Nightingale int_entry_ptr *mpiep, mpie;
217bf21cd93STycho Nightingale
218bf21cd93STycho Nightingale mpiep = arg;
219bf21cd93STycho Nightingale mpie = *mpiep;
220bf21cd93STycho Nightingale memset(mpie, 0, sizeof(*mpie));
221bf21cd93STycho Nightingale
222bf21cd93STycho Nightingale /*
223bf21cd93STycho Nightingale * This is always after another I/O interrupt entry, so cheat
224bf21cd93STycho Nightingale * and fetch the I/O APIC ID from the prior entry.
225bf21cd93STycho Nightingale */
226bf21cd93STycho Nightingale mpie->type = MPCT_ENTRY_INT;
227bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_INT;
228bf21cd93STycho Nightingale mpie->src_bus_id = bus;
229bf21cd93STycho Nightingale mpie->src_bus_irq = slot << 2 | (pin - 1);
230bf21cd93STycho Nightingale mpie->dst_apic_id = mpie[-1].dst_apic_id;
231bf21cd93STycho Nightingale mpie->dst_apic_int = ioapic_irq;
232bf21cd93STycho Nightingale
233bf21cd93STycho Nightingale *mpiep = mpie + 1;
234bf21cd93STycho Nightingale }
235bf21cd93STycho Nightingale
236bf21cd93STycho Nightingale static void
mpt_build_ioint_entries(int_entry_ptr mpie,int id)237bf21cd93STycho Nightingale mpt_build_ioint_entries(int_entry_ptr mpie, int id)
238bf21cd93STycho Nightingale {
239bf21cd93STycho Nightingale int pin, bus;
240bf21cd93STycho Nightingale
241bf21cd93STycho Nightingale /*
242bf21cd93STycho Nightingale * The following config is taken from kernel mptable.c
2436dc98349SAndy Fiddaman * mptable_parse_default_config_ints(...), for now
244bf21cd93STycho Nightingale * just use the default config, tweek later if needed.
245bf21cd93STycho Nightingale */
246bf21cd93STycho Nightingale
247bf21cd93STycho Nightingale /* First, generate the first 16 pins. */
248bf21cd93STycho Nightingale for (pin = 0; pin < 16; pin++) {
249bf21cd93STycho Nightingale memset(mpie, 0, sizeof(*mpie));
250bf21cd93STycho Nightingale mpie->type = MPCT_ENTRY_INT;
251bf21cd93STycho Nightingale mpie->src_bus_id = 1;
252bf21cd93STycho Nightingale mpie->dst_apic_id = id;
253bf21cd93STycho Nightingale
254bf21cd93STycho Nightingale /*
255bf21cd93STycho Nightingale * All default configs route IRQs from bus 0 to the first 16
256bf21cd93STycho Nightingale * pins of the first I/O APIC with an APIC ID of 2.
257bf21cd93STycho Nightingale */
258bf21cd93STycho Nightingale mpie->dst_apic_int = pin;
259bf21cd93STycho Nightingale switch (pin) {
260bf21cd93STycho Nightingale case 0:
261bf21cd93STycho Nightingale /* Pin 0 is an ExtINT pin. */
262bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_EXTINT;
263bf21cd93STycho Nightingale break;
264bf21cd93STycho Nightingale case 2:
265bf21cd93STycho Nightingale /* IRQ 0 is routed to pin 2. */
266bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_INT;
267bf21cd93STycho Nightingale mpie->src_bus_irq = 0;
268bf21cd93STycho Nightingale break;
269bf21cd93STycho Nightingale case SCI_INT:
270bf21cd93STycho Nightingale /* ACPI SCI is level triggered and active-lo. */
271bf21cd93STycho Nightingale mpie->int_flags = INTENTRY_FLAGS_POLARITY_ACTIVELO |
272bf21cd93STycho Nightingale INTENTRY_FLAGS_TRIGGER_LEVEL;
273bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_INT;
274bf21cd93STycho Nightingale mpie->src_bus_irq = SCI_INT;
275bf21cd93STycho Nightingale break;
276bf21cd93STycho Nightingale default:
277bf21cd93STycho Nightingale /* All other pins are identity mapped. */
278bf21cd93STycho Nightingale mpie->int_type = INTENTRY_TYPE_INT;
279bf21cd93STycho Nightingale mpie->src_bus_irq = pin;
280bf21cd93STycho Nightingale break;
281bf21cd93STycho Nightingale }
282bf21cd93STycho Nightingale mpie++;
283bf21cd93STycho Nightingale }
284bf21cd93STycho Nightingale
285bf21cd93STycho Nightingale /* Next, generate entries for any PCI INTx interrupts. */
286bf21cd93STycho Nightingale for (bus = 0; bus <= PCI_BUSMAX; bus++)
2876dc98349SAndy Fiddaman pci_walk_lintr(bus, mpt_generate_pci_int, &mpie);
288bf21cd93STycho Nightingale }
289bf21cd93STycho Nightingale
290bf21cd93STycho Nightingale void
mptable_add_oemtbl(void * tbl,int tblsz)291bf21cd93STycho Nightingale mptable_add_oemtbl(void *tbl, int tblsz)
292bf21cd93STycho Nightingale {
293bf21cd93STycho Nightingale
294bf21cd93STycho Nightingale oem_tbl_start = tbl;
295bf21cd93STycho Nightingale oem_tbl_size = tblsz;
296bf21cd93STycho Nightingale }
297bf21cd93STycho Nightingale
298bf21cd93STycho Nightingale int
mptable_build(struct vmctx * ctx,int ncpu)299bf21cd93STycho Nightingale mptable_build(struct vmctx *ctx, int ncpu)
300bf21cd93STycho Nightingale {
301bf21cd93STycho Nightingale mpcth_t mpch;
302bf21cd93STycho Nightingale bus_entry_ptr mpeb;
303bf21cd93STycho Nightingale io_apic_entry_ptr mpei;
304bf21cd93STycho Nightingale proc_entry_ptr mpep;
305bf21cd93STycho Nightingale mpfps_t mpfp;
306bf21cd93STycho Nightingale int_entry_ptr mpie;
307bf21cd93STycho Nightingale int ioints, bus;
308bf21cd93STycho Nightingale char *curraddr;
309bf21cd93STycho Nightingale char *startaddr;
310bf21cd93STycho Nightingale
311bf21cd93STycho Nightingale startaddr = paddr_guest2host(ctx, MPTABLE_BASE, MPTABLE_MAX_LENGTH);
312bf21cd93STycho Nightingale if (startaddr == NULL) {
313154972afSPatrick Mooney EPRINTLN("mptable requires mapped mem");
314bf21cd93STycho Nightingale return (ENOMEM);
315bf21cd93STycho Nightingale }
316bf21cd93STycho Nightingale
317bf21cd93STycho Nightingale /*
318bf21cd93STycho Nightingale * There is no way to advertise multiple PCI hierarchies via MPtable
319bf21cd93STycho Nightingale * so require that there is no PCI hierarchy with a non-zero bus
320bf21cd93STycho Nightingale * number.
321bf21cd93STycho Nightingale */
322bf21cd93STycho Nightingale for (bus = 1; bus <= PCI_BUSMAX; bus++) {
323bf21cd93STycho Nightingale if (pci_bus_configured(bus)) {
324154972afSPatrick Mooney EPRINTLN("MPtable is incompatible with "
325154972afSPatrick Mooney "multiple PCI hierarchies.");
326154972afSPatrick Mooney EPRINTLN("MPtable generation can be disabled "
327154972afSPatrick Mooney "by passing the -Y option to bhyve(8).");
328bf21cd93STycho Nightingale return (EINVAL);
329bf21cd93STycho Nightingale }
330bf21cd93STycho Nightingale }
331bf21cd93STycho Nightingale
332bf21cd93STycho Nightingale curraddr = startaddr;
333bf21cd93STycho Nightingale mpfp = (mpfps_t)curraddr;
334bf21cd93STycho Nightingale mpt_build_mpfp(mpfp, MPTABLE_BASE);
335bf21cd93STycho Nightingale curraddr += sizeof(*mpfp);
336bf21cd93STycho Nightingale
337bf21cd93STycho Nightingale mpch = (mpcth_t)curraddr;
338bf21cd93STycho Nightingale mpt_build_mpch(mpch);
339bf21cd93STycho Nightingale curraddr += sizeof(*mpch);
340bf21cd93STycho Nightingale
341bf21cd93STycho Nightingale mpep = (proc_entry_ptr)curraddr;
342bf21cd93STycho Nightingale mpt_build_proc_entries(mpep, ncpu);
343bf21cd93STycho Nightingale curraddr += sizeof(*mpep) * ncpu;
344bf21cd93STycho Nightingale mpch->entry_count += ncpu;
345bf21cd93STycho Nightingale
346bf21cd93STycho Nightingale mpeb = (bus_entry_ptr) curraddr;
347bf21cd93STycho Nightingale mpt_build_bus_entries(mpeb);
348bf21cd93STycho Nightingale curraddr += sizeof(*mpeb) * MPE_NUM_BUSES;
349bf21cd93STycho Nightingale mpch->entry_count += MPE_NUM_BUSES;
350bf21cd93STycho Nightingale
351bf21cd93STycho Nightingale mpei = (io_apic_entry_ptr)curraddr;
352bf21cd93STycho Nightingale mpt_build_ioapic_entries(mpei, 0);
353bf21cd93STycho Nightingale curraddr += sizeof(*mpei);
354bf21cd93STycho Nightingale mpch->entry_count++;
355bf21cd93STycho Nightingale
356bf21cd93STycho Nightingale mpie = (int_entry_ptr) curraddr;
357bf21cd93STycho Nightingale ioints = mpt_count_ioint_entries();
358bf21cd93STycho Nightingale mpt_build_ioint_entries(mpie, 0);
359bf21cd93STycho Nightingale curraddr += sizeof(*mpie) * ioints;
360bf21cd93STycho Nightingale mpch->entry_count += ioints;
361bf21cd93STycho Nightingale
362bf21cd93STycho Nightingale mpie = (int_entry_ptr)curraddr;
363bf21cd93STycho Nightingale mpt_build_localint_entries(mpie);
364bf21cd93STycho Nightingale curraddr += sizeof(*mpie) * MPEII_NUM_LOCAL_IRQ;
365bf21cd93STycho Nightingale mpch->entry_count += MPEII_NUM_LOCAL_IRQ;
366bf21cd93STycho Nightingale
367bf21cd93STycho Nightingale if (oem_tbl_start) {
368bf21cd93STycho Nightingale mpch->oem_table_pointer = curraddr - startaddr + MPTABLE_BASE;
369bf21cd93STycho Nightingale mpch->oem_table_size = oem_tbl_size;
370bf21cd93STycho Nightingale memcpy(curraddr, oem_tbl_start, oem_tbl_size);
371bf21cd93STycho Nightingale }
372bf21cd93STycho Nightingale
373bf21cd93STycho Nightingale mpch->base_table_length = curraddr - (char *)mpch;
374bf21cd93STycho Nightingale mpch->checksum = mpt_compute_checksum(mpch, mpch->base_table_length);
375bf21cd93STycho Nightingale
376bf21cd93STycho Nightingale return (0);
377bf21cd93STycho Nightingale }
378