1*bf21cd93STycho Nightingale /*- 2*bf21cd93STycho Nightingale * Copyright (c) 2012 NetApp, Inc. 3*bf21cd93STycho Nightingale * All rights reserved. 4*bf21cd93STycho Nightingale * 5*bf21cd93STycho Nightingale * Redistribution and use in source and binary forms, with or without 6*bf21cd93STycho Nightingale * modification, are permitted provided that the following conditions 7*bf21cd93STycho Nightingale * are met: 8*bf21cd93STycho Nightingale * 1. Redistributions of source code must retain the above copyright 9*bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer. 10*bf21cd93STycho Nightingale * 2. Redistributions in binary form must reproduce the above copyright 11*bf21cd93STycho Nightingale * notice, this list of conditions and the following disclaimer in the 12*bf21cd93STycho Nightingale * documentation and/or other materials provided with the distribution. 13*bf21cd93STycho Nightingale * 14*bf21cd93STycho Nightingale * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15*bf21cd93STycho Nightingale * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16*bf21cd93STycho Nightingale * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17*bf21cd93STycho Nightingale * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18*bf21cd93STycho Nightingale * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19*bf21cd93STycho Nightingale * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20*bf21cd93STycho Nightingale * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21*bf21cd93STycho Nightingale * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22*bf21cd93STycho Nightingale * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23*bf21cd93STycho Nightingale * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24*bf21cd93STycho Nightingale * SUCH DAMAGE. 25*bf21cd93STycho Nightingale * 26*bf21cd93STycho Nightingale * $FreeBSD: head/usr.sbin/bhyve/mem.c 269700 2014-08-08 03:49:01Z neel $ 27*bf21cd93STycho Nightingale */ 28*bf21cd93STycho Nightingale 29*bf21cd93STycho Nightingale /* 30*bf21cd93STycho Nightingale * Memory ranges are represented with an RB tree. On insertion, the range 31*bf21cd93STycho Nightingale * is checked for overlaps. On lookup, the key has the same base and limit 32*bf21cd93STycho Nightingale * so it can be searched within the range. 33*bf21cd93STycho Nightingale */ 34*bf21cd93STycho Nightingale 35*bf21cd93STycho Nightingale #include <sys/cdefs.h> 36*bf21cd93STycho Nightingale __FBSDID("$FreeBSD: head/usr.sbin/bhyve/mem.c 269700 2014-08-08 03:49:01Z neel $"); 37*bf21cd93STycho Nightingale 38*bf21cd93STycho Nightingale #include <sys/types.h> 39*bf21cd93STycho Nightingale #include <sys/tree.h> 40*bf21cd93STycho Nightingale #include <sys/errno.h> 41*bf21cd93STycho Nightingale #include <machine/vmm.h> 42*bf21cd93STycho Nightingale #include <machine/vmm_instruction_emul.h> 43*bf21cd93STycho Nightingale 44*bf21cd93STycho Nightingale #include <stdio.h> 45*bf21cd93STycho Nightingale #include <stdlib.h> 46*bf21cd93STycho Nightingale #include <assert.h> 47*bf21cd93STycho Nightingale #include <pthread.h> 48*bf21cd93STycho Nightingale 49*bf21cd93STycho Nightingale #include "mem.h" 50*bf21cd93STycho Nightingale 51*bf21cd93STycho Nightingale struct mmio_rb_range { 52*bf21cd93STycho Nightingale RB_ENTRY(mmio_rb_range) mr_link; /* RB tree links */ 53*bf21cd93STycho Nightingale struct mem_range mr_param; 54*bf21cd93STycho Nightingale uint64_t mr_base; 55*bf21cd93STycho Nightingale uint64_t mr_end; 56*bf21cd93STycho Nightingale }; 57*bf21cd93STycho Nightingale 58*bf21cd93STycho Nightingale struct mmio_rb_tree; 59*bf21cd93STycho Nightingale RB_PROTOTYPE(mmio_rb_tree, mmio_rb_range, mr_link, mmio_rb_range_compare); 60*bf21cd93STycho Nightingale 61*bf21cd93STycho Nightingale RB_HEAD(mmio_rb_tree, mmio_rb_range) mmio_rb_root, mmio_rb_fallback; 62*bf21cd93STycho Nightingale 63*bf21cd93STycho Nightingale /* 64*bf21cd93STycho Nightingale * Per-vCPU cache. Since most accesses from a vCPU will be to 65*bf21cd93STycho Nightingale * consecutive addresses in a range, it makes sense to cache the 66*bf21cd93STycho Nightingale * result of a lookup. 67*bf21cd93STycho Nightingale */ 68*bf21cd93STycho Nightingale static struct mmio_rb_range *mmio_hint[VM_MAXCPU]; 69*bf21cd93STycho Nightingale 70*bf21cd93STycho Nightingale static pthread_rwlock_t mmio_rwlock; 71*bf21cd93STycho Nightingale 72*bf21cd93STycho Nightingale static int 73*bf21cd93STycho Nightingale mmio_rb_range_compare(struct mmio_rb_range *a, struct mmio_rb_range *b) 74*bf21cd93STycho Nightingale { 75*bf21cd93STycho Nightingale if (a->mr_end < b->mr_base) 76*bf21cd93STycho Nightingale return (-1); 77*bf21cd93STycho Nightingale else if (a->mr_base > b->mr_end) 78*bf21cd93STycho Nightingale return (1); 79*bf21cd93STycho Nightingale return (0); 80*bf21cd93STycho Nightingale } 81*bf21cd93STycho Nightingale 82*bf21cd93STycho Nightingale static int 83*bf21cd93STycho Nightingale mmio_rb_lookup(struct mmio_rb_tree *rbt, uint64_t addr, 84*bf21cd93STycho Nightingale struct mmio_rb_range **entry) 85*bf21cd93STycho Nightingale { 86*bf21cd93STycho Nightingale struct mmio_rb_range find, *res; 87*bf21cd93STycho Nightingale 88*bf21cd93STycho Nightingale find.mr_base = find.mr_end = addr; 89*bf21cd93STycho Nightingale 90*bf21cd93STycho Nightingale res = RB_FIND(mmio_rb_tree, rbt, &find); 91*bf21cd93STycho Nightingale 92*bf21cd93STycho Nightingale if (res != NULL) { 93*bf21cd93STycho Nightingale *entry = res; 94*bf21cd93STycho Nightingale return (0); 95*bf21cd93STycho Nightingale } 96*bf21cd93STycho Nightingale 97*bf21cd93STycho Nightingale return (ENOENT); 98*bf21cd93STycho Nightingale } 99*bf21cd93STycho Nightingale 100*bf21cd93STycho Nightingale static int 101*bf21cd93STycho Nightingale mmio_rb_add(struct mmio_rb_tree *rbt, struct mmio_rb_range *new) 102*bf21cd93STycho Nightingale { 103*bf21cd93STycho Nightingale struct mmio_rb_range *overlap; 104*bf21cd93STycho Nightingale 105*bf21cd93STycho Nightingale overlap = RB_INSERT(mmio_rb_tree, rbt, new); 106*bf21cd93STycho Nightingale 107*bf21cd93STycho Nightingale if (overlap != NULL) { 108*bf21cd93STycho Nightingale #ifdef RB_DEBUG 109*bf21cd93STycho Nightingale printf("overlap detected: new %lx:%lx, tree %lx:%lx\n", 110*bf21cd93STycho Nightingale new->mr_base, new->mr_end, 111*bf21cd93STycho Nightingale overlap->mr_base, overlap->mr_end); 112*bf21cd93STycho Nightingale #endif 113*bf21cd93STycho Nightingale 114*bf21cd93STycho Nightingale return (EEXIST); 115*bf21cd93STycho Nightingale } 116*bf21cd93STycho Nightingale 117*bf21cd93STycho Nightingale return (0); 118*bf21cd93STycho Nightingale } 119*bf21cd93STycho Nightingale 120*bf21cd93STycho Nightingale #if 0 121*bf21cd93STycho Nightingale static void 122*bf21cd93STycho Nightingale mmio_rb_dump(struct mmio_rb_tree *rbt) 123*bf21cd93STycho Nightingale { 124*bf21cd93STycho Nightingale struct mmio_rb_range *np; 125*bf21cd93STycho Nightingale 126*bf21cd93STycho Nightingale pthread_rwlock_rdlock(&mmio_rwlock); 127*bf21cd93STycho Nightingale RB_FOREACH(np, mmio_rb_tree, rbt) { 128*bf21cd93STycho Nightingale printf(" %lx:%lx, %s\n", np->mr_base, np->mr_end, 129*bf21cd93STycho Nightingale np->mr_param.name); 130*bf21cd93STycho Nightingale } 131*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 132*bf21cd93STycho Nightingale } 133*bf21cd93STycho Nightingale #endif 134*bf21cd93STycho Nightingale 135*bf21cd93STycho Nightingale RB_GENERATE(mmio_rb_tree, mmio_rb_range, mr_link, mmio_rb_range_compare); 136*bf21cd93STycho Nightingale 137*bf21cd93STycho Nightingale static int 138*bf21cd93STycho Nightingale mem_read(void *ctx, int vcpu, uint64_t gpa, uint64_t *rval, int size, void *arg) 139*bf21cd93STycho Nightingale { 140*bf21cd93STycho Nightingale int error; 141*bf21cd93STycho Nightingale struct mem_range *mr = arg; 142*bf21cd93STycho Nightingale 143*bf21cd93STycho Nightingale error = (*mr->handler)(ctx, vcpu, MEM_F_READ, gpa, size, 144*bf21cd93STycho Nightingale rval, mr->arg1, mr->arg2); 145*bf21cd93STycho Nightingale return (error); 146*bf21cd93STycho Nightingale } 147*bf21cd93STycho Nightingale 148*bf21cd93STycho Nightingale static int 149*bf21cd93STycho Nightingale mem_write(void *ctx, int vcpu, uint64_t gpa, uint64_t wval, int size, void *arg) 150*bf21cd93STycho Nightingale { 151*bf21cd93STycho Nightingale int error; 152*bf21cd93STycho Nightingale struct mem_range *mr = arg; 153*bf21cd93STycho Nightingale 154*bf21cd93STycho Nightingale error = (*mr->handler)(ctx, vcpu, MEM_F_WRITE, gpa, size, 155*bf21cd93STycho Nightingale &wval, mr->arg1, mr->arg2); 156*bf21cd93STycho Nightingale return (error); 157*bf21cd93STycho Nightingale } 158*bf21cd93STycho Nightingale 159*bf21cd93STycho Nightingale int 160*bf21cd93STycho Nightingale emulate_mem(struct vmctx *ctx, int vcpu, uint64_t paddr, struct vie *vie, 161*bf21cd93STycho Nightingale struct vm_guest_paging *paging) 162*bf21cd93STycho Nightingale 163*bf21cd93STycho Nightingale { 164*bf21cd93STycho Nightingale struct mmio_rb_range *entry; 165*bf21cd93STycho Nightingale int err, immutable; 166*bf21cd93STycho Nightingale 167*bf21cd93STycho Nightingale pthread_rwlock_rdlock(&mmio_rwlock); 168*bf21cd93STycho Nightingale /* 169*bf21cd93STycho Nightingale * First check the per-vCPU cache 170*bf21cd93STycho Nightingale */ 171*bf21cd93STycho Nightingale if (mmio_hint[vcpu] && 172*bf21cd93STycho Nightingale paddr >= mmio_hint[vcpu]->mr_base && 173*bf21cd93STycho Nightingale paddr <= mmio_hint[vcpu]->mr_end) { 174*bf21cd93STycho Nightingale entry = mmio_hint[vcpu]; 175*bf21cd93STycho Nightingale } else 176*bf21cd93STycho Nightingale entry = NULL; 177*bf21cd93STycho Nightingale 178*bf21cd93STycho Nightingale if (entry == NULL) { 179*bf21cd93STycho Nightingale if (mmio_rb_lookup(&mmio_rb_root, paddr, &entry) == 0) { 180*bf21cd93STycho Nightingale /* Update the per-vCPU cache */ 181*bf21cd93STycho Nightingale mmio_hint[vcpu] = entry; 182*bf21cd93STycho Nightingale } else if (mmio_rb_lookup(&mmio_rb_fallback, paddr, &entry)) { 183*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 184*bf21cd93STycho Nightingale return (ESRCH); 185*bf21cd93STycho Nightingale } 186*bf21cd93STycho Nightingale } 187*bf21cd93STycho Nightingale 188*bf21cd93STycho Nightingale assert(entry != NULL); 189*bf21cd93STycho Nightingale 190*bf21cd93STycho Nightingale /* 191*bf21cd93STycho Nightingale * An 'immutable' memory range is guaranteed to be never removed 192*bf21cd93STycho Nightingale * so there is no need to hold 'mmio_rwlock' while calling the 193*bf21cd93STycho Nightingale * handler. 194*bf21cd93STycho Nightingale * 195*bf21cd93STycho Nightingale * XXX writes to the PCIR_COMMAND register can cause register_mem() 196*bf21cd93STycho Nightingale * to be called. If the guest is using PCI extended config space 197*bf21cd93STycho Nightingale * to modify the PCIR_COMMAND register then register_mem() can 198*bf21cd93STycho Nightingale * deadlock on 'mmio_rwlock'. However by registering the extended 199*bf21cd93STycho Nightingale * config space window as 'immutable' the deadlock can be avoided. 200*bf21cd93STycho Nightingale */ 201*bf21cd93STycho Nightingale immutable = (entry->mr_param.flags & MEM_F_IMMUTABLE); 202*bf21cd93STycho Nightingale if (immutable) 203*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 204*bf21cd93STycho Nightingale 205*bf21cd93STycho Nightingale err = vmm_emulate_instruction(ctx, vcpu, paddr, vie, paging, 206*bf21cd93STycho Nightingale mem_read, mem_write, &entry->mr_param); 207*bf21cd93STycho Nightingale 208*bf21cd93STycho Nightingale if (!immutable) 209*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 210*bf21cd93STycho Nightingale 211*bf21cd93STycho Nightingale return (err); 212*bf21cd93STycho Nightingale } 213*bf21cd93STycho Nightingale 214*bf21cd93STycho Nightingale static int 215*bf21cd93STycho Nightingale register_mem_int(struct mmio_rb_tree *rbt, struct mem_range *memp) 216*bf21cd93STycho Nightingale { 217*bf21cd93STycho Nightingale struct mmio_rb_range *entry, *mrp; 218*bf21cd93STycho Nightingale int err; 219*bf21cd93STycho Nightingale 220*bf21cd93STycho Nightingale err = 0; 221*bf21cd93STycho Nightingale 222*bf21cd93STycho Nightingale mrp = malloc(sizeof(struct mmio_rb_range)); 223*bf21cd93STycho Nightingale 224*bf21cd93STycho Nightingale if (mrp != NULL) { 225*bf21cd93STycho Nightingale mrp->mr_param = *memp; 226*bf21cd93STycho Nightingale mrp->mr_base = memp->base; 227*bf21cd93STycho Nightingale mrp->mr_end = memp->base + memp->size - 1; 228*bf21cd93STycho Nightingale pthread_rwlock_wrlock(&mmio_rwlock); 229*bf21cd93STycho Nightingale if (mmio_rb_lookup(rbt, memp->base, &entry) != 0) 230*bf21cd93STycho Nightingale err = mmio_rb_add(rbt, mrp); 231*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 232*bf21cd93STycho Nightingale if (err) 233*bf21cd93STycho Nightingale free(mrp); 234*bf21cd93STycho Nightingale } else 235*bf21cd93STycho Nightingale err = ENOMEM; 236*bf21cd93STycho Nightingale 237*bf21cd93STycho Nightingale return (err); 238*bf21cd93STycho Nightingale } 239*bf21cd93STycho Nightingale 240*bf21cd93STycho Nightingale int 241*bf21cd93STycho Nightingale register_mem(struct mem_range *memp) 242*bf21cd93STycho Nightingale { 243*bf21cd93STycho Nightingale 244*bf21cd93STycho Nightingale return (register_mem_int(&mmio_rb_root, memp)); 245*bf21cd93STycho Nightingale } 246*bf21cd93STycho Nightingale 247*bf21cd93STycho Nightingale int 248*bf21cd93STycho Nightingale register_mem_fallback(struct mem_range *memp) 249*bf21cd93STycho Nightingale { 250*bf21cd93STycho Nightingale 251*bf21cd93STycho Nightingale return (register_mem_int(&mmio_rb_fallback, memp)); 252*bf21cd93STycho Nightingale } 253*bf21cd93STycho Nightingale 254*bf21cd93STycho Nightingale int 255*bf21cd93STycho Nightingale unregister_mem(struct mem_range *memp) 256*bf21cd93STycho Nightingale { 257*bf21cd93STycho Nightingale struct mem_range *mr; 258*bf21cd93STycho Nightingale struct mmio_rb_range *entry = NULL; 259*bf21cd93STycho Nightingale int err, i; 260*bf21cd93STycho Nightingale 261*bf21cd93STycho Nightingale pthread_rwlock_wrlock(&mmio_rwlock); 262*bf21cd93STycho Nightingale err = mmio_rb_lookup(&mmio_rb_root, memp->base, &entry); 263*bf21cd93STycho Nightingale if (err == 0) { 264*bf21cd93STycho Nightingale mr = &entry->mr_param; 265*bf21cd93STycho Nightingale assert(mr->name == memp->name); 266*bf21cd93STycho Nightingale assert(mr->base == memp->base && mr->size == memp->size); 267*bf21cd93STycho Nightingale assert((mr->flags & MEM_F_IMMUTABLE) == 0); 268*bf21cd93STycho Nightingale RB_REMOVE(mmio_rb_tree, &mmio_rb_root, entry); 269*bf21cd93STycho Nightingale 270*bf21cd93STycho Nightingale /* flush Per-vCPU cache */ 271*bf21cd93STycho Nightingale for (i=0; i < VM_MAXCPU; i++) { 272*bf21cd93STycho Nightingale if (mmio_hint[i] == entry) 273*bf21cd93STycho Nightingale mmio_hint[i] = NULL; 274*bf21cd93STycho Nightingale } 275*bf21cd93STycho Nightingale } 276*bf21cd93STycho Nightingale pthread_rwlock_unlock(&mmio_rwlock); 277*bf21cd93STycho Nightingale 278*bf21cd93STycho Nightingale if (entry) 279*bf21cd93STycho Nightingale free(entry); 280*bf21cd93STycho Nightingale 281*bf21cd93STycho Nightingale return (err); 282*bf21cd93STycho Nightingale } 283*bf21cd93STycho Nightingale 284*bf21cd93STycho Nightingale void 285*bf21cd93STycho Nightingale init_mem(void) 286*bf21cd93STycho Nightingale { 287*bf21cd93STycho Nightingale 288*bf21cd93STycho Nightingale RB_INIT(&mmio_rb_root); 289*bf21cd93STycho Nightingale RB_INIT(&mmio_rb_fallback); 290*bf21cd93STycho Nightingale pthread_rwlock_init(&mmio_rwlock, NULL); 291*bf21cd93STycho Nightingale } 292