1*35786f68SRobert Mustacchi /****************************************************************************** 2*35786f68SRobert Mustacchi * 3*35786f68SRobert Mustacchi * Module Name: dmtbinfo2 - Table info for non-AML tables 4*35786f68SRobert Mustacchi * 5*35786f68SRobert Mustacchi *****************************************************************************/ 6*35786f68SRobert Mustacchi 7*35786f68SRobert Mustacchi /****************************************************************************** 8*35786f68SRobert Mustacchi * 9*35786f68SRobert Mustacchi * 1. Copyright Notice 10*35786f68SRobert Mustacchi * 11*35786f68SRobert Mustacchi * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp. 12*35786f68SRobert Mustacchi * All rights reserved. 13*35786f68SRobert Mustacchi * 14*35786f68SRobert Mustacchi * 2. License 15*35786f68SRobert Mustacchi * 16*35786f68SRobert Mustacchi * 2.1. This is your license from Intel Corp. under its intellectual property 17*35786f68SRobert Mustacchi * rights. You may have additional license terms from the party that provided 18*35786f68SRobert Mustacchi * you this software, covering your right to use that party's intellectual 19*35786f68SRobert Mustacchi * property rights. 20*35786f68SRobert Mustacchi * 21*35786f68SRobert Mustacchi * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22*35786f68SRobert Mustacchi * copy of the source code appearing in this file ("Covered Code") an 23*35786f68SRobert Mustacchi * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24*35786f68SRobert Mustacchi * base code distributed originally by Intel ("Original Intel Code") to copy, 25*35786f68SRobert Mustacchi * make derivatives, distribute, use and display any portion of the Covered 26*35786f68SRobert Mustacchi * Code in any form, with the right to sublicense such rights; and 27*35786f68SRobert Mustacchi * 28*35786f68SRobert Mustacchi * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29*35786f68SRobert Mustacchi * license (with the right to sublicense), under only those claims of Intel 30*35786f68SRobert Mustacchi * patents that are infringed by the Original Intel Code, to make, use, sell, 31*35786f68SRobert Mustacchi * offer to sell, and import the Covered Code and derivative works thereof 32*35786f68SRobert Mustacchi * solely to the minimum extent necessary to exercise the above copyright 33*35786f68SRobert Mustacchi * license, and in no event shall the patent license extend to any additions 34*35786f68SRobert Mustacchi * to or modifications of the Original Intel Code. No other license or right 35*35786f68SRobert Mustacchi * is granted directly or by implication, estoppel or otherwise; 36*35786f68SRobert Mustacchi * 37*35786f68SRobert Mustacchi * The above copyright and patent license is granted only if the following 38*35786f68SRobert Mustacchi * conditions are met: 39*35786f68SRobert Mustacchi * 40*35786f68SRobert Mustacchi * 3. Conditions 41*35786f68SRobert Mustacchi * 42*35786f68SRobert Mustacchi * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43*35786f68SRobert Mustacchi * Redistribution of source code of any substantial portion of the Covered 44*35786f68SRobert Mustacchi * Code or modification with rights to further distribute source must include 45*35786f68SRobert Mustacchi * the above Copyright Notice, the above License, this list of Conditions, 46*35786f68SRobert Mustacchi * and the following Disclaimer and Export Compliance provision. In addition, 47*35786f68SRobert Mustacchi * Licensee must cause all Covered Code to which Licensee contributes to 48*35786f68SRobert Mustacchi * contain a file documenting the changes Licensee made to create that Covered 49*35786f68SRobert Mustacchi * Code and the date of any change. Licensee must include in that file the 50*35786f68SRobert Mustacchi * documentation of any changes made by any predecessor Licensee. Licensee 51*35786f68SRobert Mustacchi * must include a prominent statement that the modification is derived, 52*35786f68SRobert Mustacchi * directly or indirectly, from Original Intel Code. 53*35786f68SRobert Mustacchi * 54*35786f68SRobert Mustacchi * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55*35786f68SRobert Mustacchi * Redistribution of source code of any substantial portion of the Covered 56*35786f68SRobert Mustacchi * Code or modification without rights to further distribute source must 57*35786f68SRobert Mustacchi * include the following Disclaimer and Export Compliance provision in the 58*35786f68SRobert Mustacchi * documentation and/or other materials provided with distribution. In 59*35786f68SRobert Mustacchi * addition, Licensee may not authorize further sublicense of source of any 60*35786f68SRobert Mustacchi * portion of the Covered Code, and must include terms to the effect that the 61*35786f68SRobert Mustacchi * license from Licensee to its licensee is limited to the intellectual 62*35786f68SRobert Mustacchi * property embodied in the software Licensee provides to its licensee, and 63*35786f68SRobert Mustacchi * not to intellectual property embodied in modifications its licensee may 64*35786f68SRobert Mustacchi * make. 65*35786f68SRobert Mustacchi * 66*35786f68SRobert Mustacchi * 3.3. Redistribution of Executable. Redistribution in executable form of any 67*35786f68SRobert Mustacchi * substantial portion of the Covered Code or modification must reproduce the 68*35786f68SRobert Mustacchi * above Copyright Notice, and the following Disclaimer and Export Compliance 69*35786f68SRobert Mustacchi * provision in the documentation and/or other materials provided with the 70*35786f68SRobert Mustacchi * distribution. 71*35786f68SRobert Mustacchi * 72*35786f68SRobert Mustacchi * 3.4. Intel retains all right, title, and interest in and to the Original 73*35786f68SRobert Mustacchi * Intel Code. 74*35786f68SRobert Mustacchi * 75*35786f68SRobert Mustacchi * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76*35786f68SRobert Mustacchi * Intel shall be used in advertising or otherwise to promote the sale, use or 77*35786f68SRobert Mustacchi * other dealings in products derived from or relating to the Covered Code 78*35786f68SRobert Mustacchi * without prior written authorization from Intel. 79*35786f68SRobert Mustacchi * 80*35786f68SRobert Mustacchi * 4. Disclaimer and Export Compliance 81*35786f68SRobert Mustacchi * 82*35786f68SRobert Mustacchi * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83*35786f68SRobert Mustacchi * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84*35786f68SRobert Mustacchi * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85*35786f68SRobert Mustacchi * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86*35786f68SRobert Mustacchi * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87*35786f68SRobert Mustacchi * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88*35786f68SRobert Mustacchi * PARTICULAR PURPOSE. 89*35786f68SRobert Mustacchi * 90*35786f68SRobert Mustacchi * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91*35786f68SRobert Mustacchi * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92*35786f68SRobert Mustacchi * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93*35786f68SRobert Mustacchi * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94*35786f68SRobert Mustacchi * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95*35786f68SRobert Mustacchi * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96*35786f68SRobert Mustacchi * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97*35786f68SRobert Mustacchi * LIMITED REMEDY. 98*35786f68SRobert Mustacchi * 99*35786f68SRobert Mustacchi * 4.3. Licensee shall not export, either directly or indirectly, any of this 100*35786f68SRobert Mustacchi * software or system incorporating such software without first obtaining any 101*35786f68SRobert Mustacchi * required license or other approval from the U. S. Department of Commerce or 102*35786f68SRobert Mustacchi * any other agency or department of the United States Government. In the 103*35786f68SRobert Mustacchi * event Licensee exports any such software from the United States or 104*35786f68SRobert Mustacchi * re-exports any such software from a foreign destination, Licensee shall 105*35786f68SRobert Mustacchi * ensure that the distribution and export/re-export of the software is in 106*35786f68SRobert Mustacchi * compliance with all laws, regulations, orders, or other restrictions of the 107*35786f68SRobert Mustacchi * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108*35786f68SRobert Mustacchi * any of its subsidiaries will export/re-export any technical data, process, 109*35786f68SRobert Mustacchi * software, or service, directly or indirectly, to any country for which the 110*35786f68SRobert Mustacchi * United States government or any agency thereof requires an export license, 111*35786f68SRobert Mustacchi * other governmental approval, or letter of assurance, without first obtaining 112*35786f68SRobert Mustacchi * such license, approval or letter. 113*35786f68SRobert Mustacchi * 114*35786f68SRobert Mustacchi ***************************************************************************** 115*35786f68SRobert Mustacchi * 116*35786f68SRobert Mustacchi * Alternatively, you may choose to be licensed under the terms of the 117*35786f68SRobert Mustacchi * following license: 118*35786f68SRobert Mustacchi * 119*35786f68SRobert Mustacchi * Redistribution and use in source and binary forms, with or without 120*35786f68SRobert Mustacchi * modification, are permitted provided that the following conditions 121*35786f68SRobert Mustacchi * are met: 122*35786f68SRobert Mustacchi * 1. Redistributions of source code must retain the above copyright 123*35786f68SRobert Mustacchi * notice, this list of conditions, and the following disclaimer, 124*35786f68SRobert Mustacchi * without modification. 125*35786f68SRobert Mustacchi * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126*35786f68SRobert Mustacchi * substantially similar to the "NO WARRANTY" disclaimer below 127*35786f68SRobert Mustacchi * ("Disclaimer") and any redistribution must be conditioned upon 128*35786f68SRobert Mustacchi * including a substantially similar Disclaimer requirement for further 129*35786f68SRobert Mustacchi * binary redistribution. 130*35786f68SRobert Mustacchi * 3. Neither the names of the above-listed copyright holders nor the names 131*35786f68SRobert Mustacchi * of any contributors may be used to endorse or promote products derived 132*35786f68SRobert Mustacchi * from this software without specific prior written permission. 133*35786f68SRobert Mustacchi * 134*35786f68SRobert Mustacchi * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135*35786f68SRobert Mustacchi * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136*35786f68SRobert Mustacchi * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137*35786f68SRobert Mustacchi * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138*35786f68SRobert Mustacchi * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139*35786f68SRobert Mustacchi * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140*35786f68SRobert Mustacchi * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141*35786f68SRobert Mustacchi * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142*35786f68SRobert Mustacchi * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143*35786f68SRobert Mustacchi * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144*35786f68SRobert Mustacchi * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145*35786f68SRobert Mustacchi * 146*35786f68SRobert Mustacchi * Alternatively, you may choose to be licensed under the terms of the 147*35786f68SRobert Mustacchi * GNU General Public License ("GPL") version 2 as published by the Free 148*35786f68SRobert Mustacchi * Software Foundation. 149*35786f68SRobert Mustacchi * 150*35786f68SRobert Mustacchi *****************************************************************************/ 151*35786f68SRobert Mustacchi 152*35786f68SRobert Mustacchi #include "acpi.h" 153*35786f68SRobert Mustacchi #include "accommon.h" 154*35786f68SRobert Mustacchi #include "acdisasm.h" 155*35786f68SRobert Mustacchi #include "actbinfo.h" 156*35786f68SRobert Mustacchi 157*35786f68SRobert Mustacchi /* This module used for application-level code only */ 158*35786f68SRobert Mustacchi 159*35786f68SRobert Mustacchi #define _COMPONENT ACPI_CA_DISASSEMBLER 160*35786f68SRobert Mustacchi ACPI_MODULE_NAME ("dmtbinfo2") 161*35786f68SRobert Mustacchi 162*35786f68SRobert Mustacchi /* 163*35786f68SRobert Mustacchi * How to add a new table: 164*35786f68SRobert Mustacchi * 165*35786f68SRobert Mustacchi * - Add the C table definition to the actbl1.h or actbl2.h header. 166*35786f68SRobert Mustacchi * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. 167*35786f68SRobert Mustacchi * - Define the table in this file (for the disassembler). If any 168*35786f68SRobert Mustacchi * new data types are required (ACPI_DMT_*), see below. 169*35786f68SRobert Mustacchi * - Add an external declaration for the new table definition (AcpiDmTableInfo*) 170*35786f68SRobert Mustacchi * in acdisam.h 171*35786f68SRobert Mustacchi * - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData) 172*35786f68SRobert Mustacchi * If a simple table (with no subtables), no disassembly code is needed. 173*35786f68SRobert Mustacchi * Otherwise, create the AcpiDmDump* function for to disassemble the table 174*35786f68SRobert Mustacchi * and add it to the dmtbdump.c file. 175*35786f68SRobert Mustacchi * - Add an external declaration for the new AcpiDmDump* function in acdisasm.h 176*35786f68SRobert Mustacchi * - Add the new AcpiDmDump* function to the dispatch table in dmtable.c 177*35786f68SRobert Mustacchi * - Create a template for the new table 178*35786f68SRobert Mustacchi * - Add data table compiler support 179*35786f68SRobert Mustacchi * 180*35786f68SRobert Mustacchi * How to add a new data type (ACPI_DMT_*): 181*35786f68SRobert Mustacchi * 182*35786f68SRobert Mustacchi * - Add new type at the end of the ACPI_DMT list in acdisasm.h 183*35786f68SRobert Mustacchi * - Add length and implementation cases in dmtable.c (disassembler) 184*35786f68SRobert Mustacchi * - Add type and length cases in dtutils.c (DT compiler) 185*35786f68SRobert Mustacchi */ 186*35786f68SRobert Mustacchi 187*35786f68SRobert Mustacchi /* 188*35786f68SRobert Mustacchi * Remaining tables are not consumed directly by the ACPICA subsystem 189*35786f68SRobert Mustacchi */ 190*35786f68SRobert Mustacchi 191*35786f68SRobert Mustacchi 192*35786f68SRobert Mustacchi /******************************************************************************* 193*35786f68SRobert Mustacchi * 194*35786f68SRobert Mustacchi * IORT - IO Remapping Table 195*35786f68SRobert Mustacchi * 196*35786f68SRobert Mustacchi ******************************************************************************/ 197*35786f68SRobert Mustacchi 198*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] = 199*35786f68SRobert Mustacchi { 200*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0}, 201*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0}, 202*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0}, 203*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 204*35786f68SRobert Mustacchi }; 205*35786f68SRobert Mustacchi 206*35786f68SRobert Mustacchi /* Optional padding field */ 207*35786f68SRobert Mustacchi 208*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] = 209*35786f68SRobert Mustacchi { 210*35786f68SRobert Mustacchi {ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL}, 211*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 212*35786f68SRobert Mustacchi }; 213*35786f68SRobert Mustacchi 214*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 215*35786f68SRobert Mustacchi 216*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] = 217*35786f68SRobert Mustacchi { 218*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0}, 219*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH}, 220*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0}, 221*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Reserved), "Reserved", 0}, 222*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0}, 223*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0}, 224*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 225*35786f68SRobert Mustacchi }; 226*35786f68SRobert Mustacchi 227*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] = 228*35786f68SRobert Mustacchi { 229*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL}, 230*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0}, 231*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0}, 232*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0}, 233*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0}, 234*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0}, 235*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 236*35786f68SRobert Mustacchi }; 237*35786f68SRobert Mustacchi 238*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] = 239*35786f68SRobert Mustacchi { 240*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0}, 241*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0}, 242*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0}, 243*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0}, 244*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0}, 245*35786f68SRobert Mustacchi {ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0}, 246*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0}, 247*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0}, 248*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0}, 249*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0}, 250*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 251*35786f68SRobert Mustacchi }; 252*35786f68SRobert Mustacchi 253*35786f68SRobert Mustacchi /* IORT subtables */ 254*35786f68SRobert Mustacchi 255*35786f68SRobert Mustacchi /* 0x00: ITS Group */ 256*35786f68SRobert Mustacchi 257*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] = 258*35786f68SRobert Mustacchi { 259*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0}, 260*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 261*35786f68SRobert Mustacchi }; 262*35786f68SRobert Mustacchi 263*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] = 264*35786f68SRobert Mustacchi { 265*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL}, 266*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 267*35786f68SRobert Mustacchi }; 268*35786f68SRobert Mustacchi 269*35786f68SRobert Mustacchi /* 0x01: Named Component */ 270*35786f68SRobert Mustacchi 271*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] = 272*35786f68SRobert Mustacchi { 273*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0}, 274*35786f68SRobert Mustacchi {ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0}, 275*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 276*35786f68SRobert Mustacchi {ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0}, 277*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 278*35786f68SRobert Mustacchi }; 279*35786f68SRobert Mustacchi 280*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] = 281*35786f68SRobert Mustacchi { 282*35786f68SRobert Mustacchi {ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL}, 283*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 284*35786f68SRobert Mustacchi }; 285*35786f68SRobert Mustacchi 286*35786f68SRobert Mustacchi /* 0x02: PCI Root Complex */ 287*35786f68SRobert Mustacchi 288*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] = 289*35786f68SRobert Mustacchi { 290*35786f68SRobert Mustacchi {ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0}, 291*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0}, 292*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0}, 293*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0}, 294*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_IORT2_OFFSET (Reserved[0]), "Reserved", 0}, 295*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 296*35786f68SRobert Mustacchi }; 297*35786f68SRobert Mustacchi 298*35786f68SRobert Mustacchi /* 0x03: SMMUv1/2 */ 299*35786f68SRobert Mustacchi 300*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] = 301*35786f68SRobert Mustacchi { 302*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0}, 303*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0}, 304*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0}, 305*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0}, 306*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0}, 307*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0}, 308*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0}, 309*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0}, 310*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0}, 311*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0}, 312*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0}, 313*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 314*35786f68SRobert Mustacchi }; 315*35786f68SRobert Mustacchi 316*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] = 317*35786f68SRobert Mustacchi { 318*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrpt), "NSgIrpt", 0}, 319*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrptFlags), "NSgIrpt Flags (decoded below)", 0}, 320*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgIrptFlags, 0), "Edge Triggered", 0}, 321*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrpt), "NSgCfgIrpt", 0}, 322*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrptFlags), "NSgCfgIrpt Flags (decoded below)", 0}, 323*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgCfgIrptFlags, 0), "Edge Triggered", 0}, 324*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 325*35786f68SRobert Mustacchi }; 326*35786f68SRobert Mustacchi 327*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] = 328*35786f68SRobert Mustacchi { 329*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL}, 330*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 331*35786f68SRobert Mustacchi }; 332*35786f68SRobert Mustacchi 333*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] = 334*35786f68SRobert Mustacchi { 335*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL}, 336*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 337*35786f68SRobert Mustacchi }; 338*35786f68SRobert Mustacchi 339*35786f68SRobert Mustacchi /* 0x04: SMMUv3 */ 340*35786f68SRobert Mustacchi 341*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] = 342*35786f68SRobert Mustacchi { 343*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0}, 344*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0}, 345*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0}, 346*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0}, 347*35786f68SRobert Mustacchi {ACPI_DMT_FLAG3, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "Proximity Domain Valid", 0}, 348*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0}, 349*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0}, 350*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0}, 351*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0}, 352*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0}, 353*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0}, 354*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0}, 355*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Pxm), "Proximity Domain", 0}, 356*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (IdMappingIndex), "Device ID Mapping Index", 0}, 357*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 358*35786f68SRobert Mustacchi }; 359*35786f68SRobert Mustacchi 360*35786f68SRobert Mustacchi /* 0x05: PMCG */ 361*35786f68SRobert Mustacchi 362*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIort5[] = 363*35786f68SRobert Mustacchi { 364*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page0BaseAddress), "Page 0 Base Address", 0}, 365*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (OverflowGsiv), "Overflow Interrupt GSIV", 0}, 366*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (NodeReference), "Node Reference", 0}, 367*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page1BaseAddress), "Page 1 Base Address", 0}, 368*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 369*35786f68SRobert Mustacchi }; 370*35786f68SRobert Mustacchi 371*35786f68SRobert Mustacchi 372*35786f68SRobert Mustacchi /******************************************************************************* 373*35786f68SRobert Mustacchi * 374*35786f68SRobert Mustacchi * IVRS - I/O Virtualization Reporting Structure 375*35786f68SRobert Mustacchi * 376*35786f68SRobert Mustacchi ******************************************************************************/ 377*35786f68SRobert Mustacchi 378*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] = 379*35786f68SRobert Mustacchi { 380*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0}, 381*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0}, 382*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 383*35786f68SRobert Mustacchi }; 384*35786f68SRobert Mustacchi 385*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 386*35786f68SRobert Mustacchi 387*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHdr[] = 388*35786f68SRobert Mustacchi { 389*35786f68SRobert Mustacchi {ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0}, 390*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags", 0}, 391*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH}, 392*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0}, 393*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 394*35786f68SRobert Mustacchi }; 395*35786f68SRobert Mustacchi 396*35786f68SRobert Mustacchi /* IVRS subtables */ 397*35786f68SRobert Mustacchi 398*35786f68SRobert Mustacchi /* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */ 399*35786f68SRobert Mustacchi 400*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs0[] = 401*35786f68SRobert Mustacchi { 402*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0}, 403*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0}, 404*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0}, 405*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0}, 406*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (Reserved), "Reserved", 0}, 407*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 408*35786f68SRobert Mustacchi }; 409*35786f68SRobert Mustacchi 410*35786f68SRobert Mustacchi /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Block */ 411*35786f68SRobert Mustacchi 412*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs1[] = 413*35786f68SRobert Mustacchi { 414*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0}, 415*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0}, 416*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0}, 417*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0}, 418*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 419*35786f68SRobert Mustacchi }; 420*35786f68SRobert Mustacchi 421*35786f68SRobert Mustacchi /* Device entry header for IVHD block */ 422*35786f68SRobert Mustacchi 423*35786f68SRobert Mustacchi #define ACPI_DMT_IVRS_DE_HEADER \ 424*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (Type), "Entry Type", 0}, \ 425*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \ 426*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting", 0} 427*35786f68SRobert Mustacchi 428*35786f68SRobert Mustacchi /* 4-byte device entry */ 429*35786f68SRobert Mustacchi 430*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] = 431*35786f68SRobert Mustacchi { 432*35786f68SRobert Mustacchi ACPI_DMT_IVRS_DE_HEADER, 433*35786f68SRobert Mustacchi {ACPI_DMT_EXIT, 0, NULL, 0}, 434*35786f68SRobert Mustacchi }; 435*35786f68SRobert Mustacchi 436*35786f68SRobert Mustacchi /* 8-byte device entry */ 437*35786f68SRobert Mustacchi 438*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] = 439*35786f68SRobert Mustacchi { 440*35786f68SRobert Mustacchi ACPI_DMT_IVRS_DE_HEADER, 441*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0}, 442*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0}, 443*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0}, 444*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 445*35786f68SRobert Mustacchi }; 446*35786f68SRobert Mustacchi 447*35786f68SRobert Mustacchi /* 8-byte device entry */ 448*35786f68SRobert Mustacchi 449*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] = 450*35786f68SRobert Mustacchi { 451*35786f68SRobert Mustacchi ACPI_DMT_IVRS_DE_HEADER, 452*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0}, 453*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 454*35786f68SRobert Mustacchi }; 455*35786f68SRobert Mustacchi 456*35786f68SRobert Mustacchi /* 8-byte device entry */ 457*35786f68SRobert Mustacchi 458*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] = 459*35786f68SRobert Mustacchi { 460*35786f68SRobert Mustacchi ACPI_DMT_IVRS_DE_HEADER, 461*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0}, 462*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0}, 463*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0}, 464*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 465*35786f68SRobert Mustacchi }; 466*35786f68SRobert Mustacchi 467*35786f68SRobert Mustacchi 468*35786f68SRobert Mustacchi /******************************************************************************* 469*35786f68SRobert Mustacchi * 470*35786f68SRobert Mustacchi * LPIT - Low Power Idle Table 471*35786f68SRobert Mustacchi * 472*35786f68SRobert Mustacchi ******************************************************************************/ 473*35786f68SRobert Mustacchi 474*35786f68SRobert Mustacchi /* Main table consists only of the standard ACPI table header */ 475*35786f68SRobert Mustacchi 476*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 477*35786f68SRobert Mustacchi 478*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] = 479*35786f68SRobert Mustacchi { 480*35786f68SRobert Mustacchi {ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0}, 481*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH}, 482*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0}, 483*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0}, 484*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 485*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0}, 486*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0}, 487*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 488*35786f68SRobert Mustacchi }; 489*35786f68SRobert Mustacchi 490*35786f68SRobert Mustacchi /* LPIT Subtables */ 491*35786f68SRobert Mustacchi 492*35786f68SRobert Mustacchi /* 0: Native C-state */ 493*35786f68SRobert Mustacchi 494*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] = 495*35786f68SRobert Mustacchi { 496*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0}, 497*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0}, 498*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0}, 499*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0}, 500*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0}, 501*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 502*35786f68SRobert Mustacchi }; 503*35786f68SRobert Mustacchi 504*35786f68SRobert Mustacchi 505*35786f68SRobert Mustacchi /******************************************************************************* 506*35786f68SRobert Mustacchi * 507*35786f68SRobert Mustacchi * MADT - Multiple APIC Description Table and subtables 508*35786f68SRobert Mustacchi * 509*35786f68SRobert Mustacchi ******************************************************************************/ 510*35786f68SRobert Mustacchi 511*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] = 512*35786f68SRobert Mustacchi { 513*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0}, 514*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 515*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0}, 516*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 517*35786f68SRobert Mustacchi }; 518*35786f68SRobert Mustacchi 519*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 520*35786f68SRobert Mustacchi 521*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] = 522*35786f68SRobert Mustacchi { 523*35786f68SRobert Mustacchi {ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0}, 524*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH}, 525*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 526*35786f68SRobert Mustacchi }; 527*35786f68SRobert Mustacchi 528*35786f68SRobert Mustacchi /* MADT Subtables */ 529*35786f68SRobert Mustacchi 530*35786f68SRobert Mustacchi /* 0: processor APIC */ 531*35786f68SRobert Mustacchi 532*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] = 533*35786f68SRobert Mustacchi { 534*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0}, 535*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0}, 536*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 537*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 538*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 539*35786f68SRobert Mustacchi }; 540*35786f68SRobert Mustacchi 541*35786f68SRobert Mustacchi /* 1: IO APIC */ 542*35786f68SRobert Mustacchi 543*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] = 544*35786f68SRobert Mustacchi { 545*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0}, 546*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0}, 547*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0}, 548*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0}, 549*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 550*35786f68SRobert Mustacchi }; 551*35786f68SRobert Mustacchi 552*35786f68SRobert Mustacchi /* 2: Interrupt Override */ 553*35786f68SRobert Mustacchi 554*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] = 555*35786f68SRobert Mustacchi { 556*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0}, 557*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0}, 558*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0}, 559*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 560*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 561*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 562*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 563*35786f68SRobert Mustacchi }; 564*35786f68SRobert Mustacchi 565*35786f68SRobert Mustacchi /* 3: NMI Sources */ 566*35786f68SRobert Mustacchi 567*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] = 568*35786f68SRobert Mustacchi { 569*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 570*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 571*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 572*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0}, 573*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 574*35786f68SRobert Mustacchi }; 575*35786f68SRobert Mustacchi 576*35786f68SRobert Mustacchi /* 4: Local APIC NMI */ 577*35786f68SRobert Mustacchi 578*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] = 579*35786f68SRobert Mustacchi { 580*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0}, 581*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 582*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 583*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 584*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0}, 585*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 586*35786f68SRobert Mustacchi }; 587*35786f68SRobert Mustacchi 588*35786f68SRobert Mustacchi /* 5: Address Override */ 589*35786f68SRobert Mustacchi 590*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] = 591*35786f68SRobert Mustacchi { 592*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0}, 593*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0}, 594*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 595*35786f68SRobert Mustacchi }; 596*35786f68SRobert Mustacchi 597*35786f68SRobert Mustacchi /* 6: I/O Sapic */ 598*35786f68SRobert Mustacchi 599*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] = 600*35786f68SRobert Mustacchi { 601*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0}, 602*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0}, 603*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 604*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0}, 605*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 606*35786f68SRobert Mustacchi }; 607*35786f68SRobert Mustacchi 608*35786f68SRobert Mustacchi /* 7: Local Sapic */ 609*35786f68SRobert Mustacchi 610*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] = 611*35786f68SRobert Mustacchi { 612*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0}, 613*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0}, 614*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0}, 615*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0}, 616*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 617*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 618*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0}, 619*35786f68SRobert Mustacchi {ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0}, 620*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 621*35786f68SRobert Mustacchi }; 622*35786f68SRobert Mustacchi 623*35786f68SRobert Mustacchi /* 8: Platform Interrupt Source */ 624*35786f68SRobert Mustacchi 625*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] = 626*35786f68SRobert Mustacchi { 627*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 628*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 629*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 630*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0}, 631*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0}, 632*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0}, 633*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0}, 634*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0}, 635*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 636*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0}, 637*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 638*35786f68SRobert Mustacchi }; 639*35786f68SRobert Mustacchi 640*35786f68SRobert Mustacchi /* 9: Processor Local X2_APIC (ACPI 4.0) */ 641*35786f68SRobert Mustacchi 642*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] = 643*35786f68SRobert Mustacchi { 644*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0}, 645*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0}, 646*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG}, 647*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0}, 648*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0}, 649*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 650*35786f68SRobert Mustacchi }; 651*35786f68SRobert Mustacchi 652*35786f68SRobert Mustacchi /* 10: Local X2_APIC NMI (ACPI 4.0) */ 653*35786f68SRobert Mustacchi 654*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] = 655*35786f68SRobert Mustacchi { 656*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG}, 657*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0}, 658*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0}, 659*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0}, 660*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0}, 661*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0}, 662*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 663*35786f68SRobert Mustacchi }; 664*35786f68SRobert Mustacchi 665*35786f68SRobert Mustacchi /* 11: Generic Interrupt Controller (ACPI 5.0) */ 666*35786f68SRobert Mustacchi 667*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] = 668*35786f68SRobert Mustacchi { 669*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0}, 670*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0}, 671*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0}, 672*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 673*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0}, 674*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0}, 675*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0}, 676*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0}, 677*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0}, 678*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0}, 679*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0}, 680*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0}, 681*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0}, 682*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0}, 683*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0}, 684*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0}, 685*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0}, 686*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0}, 687*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 688*35786f68SRobert Mustacchi }; 689*35786f68SRobert Mustacchi 690*35786f68SRobert Mustacchi /* 12: Generic Interrupt Distributor (ACPI 5.0) */ 691*35786f68SRobert Mustacchi 692*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] = 693*35786f68SRobert Mustacchi { 694*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0}, 695*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0}, 696*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0}, 697*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0}, 698*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0}, 699*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0}, 700*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 701*35786f68SRobert Mustacchi }; 702*35786f68SRobert Mustacchi 703*35786f68SRobert Mustacchi /* 13: Generic MSI Frame (ACPI 5.1) */ 704*35786f68SRobert Mustacchi 705*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] = 706*35786f68SRobert Mustacchi { 707*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0}, 708*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0}, 709*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0}, 710*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 711*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0}, 712*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0}, 713*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0}, 714*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 715*35786f68SRobert Mustacchi }; 716*35786f68SRobert Mustacchi 717*35786f68SRobert Mustacchi /* 14: Generic Redistributor (ACPI 5.1) */ 718*35786f68SRobert Mustacchi 719*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] = 720*35786f68SRobert Mustacchi { 721*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0}, 722*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0}, 723*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0}, 724*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 725*35786f68SRobert Mustacchi }; 726*35786f68SRobert Mustacchi 727*35786f68SRobert Mustacchi /* 15: Generic Translator (ACPI 6.0) */ 728*35786f68SRobert Mustacchi 729*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] = 730*35786f68SRobert Mustacchi { 731*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0}, 732*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0}, 733*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0}, 734*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0}, 735*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 736*35786f68SRobert Mustacchi }; 737*35786f68SRobert Mustacchi 738*35786f68SRobert Mustacchi 739*35786f68SRobert Mustacchi /******************************************************************************* 740*35786f68SRobert Mustacchi * 741*35786f68SRobert Mustacchi * MCFG - PCI Memory Mapped Configuration table and Subtable 742*35786f68SRobert Mustacchi * 743*35786f68SRobert Mustacchi ******************************************************************************/ 744*35786f68SRobert Mustacchi 745*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] = 746*35786f68SRobert Mustacchi { 747*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0}, 748*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 749*35786f68SRobert Mustacchi }; 750*35786f68SRobert Mustacchi 751*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] = 752*35786f68SRobert Mustacchi { 753*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0}, 754*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0}, 755*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0}, 756*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0}, 757*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0}, 758*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 759*35786f68SRobert Mustacchi }; 760*35786f68SRobert Mustacchi 761*35786f68SRobert Mustacchi 762*35786f68SRobert Mustacchi /******************************************************************************* 763*35786f68SRobert Mustacchi * 764*35786f68SRobert Mustacchi * MCHI - Management Controller Host Interface table 765*35786f68SRobert Mustacchi * 766*35786f68SRobert Mustacchi ******************************************************************************/ 767*35786f68SRobert Mustacchi 768*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] = 769*35786f68SRobert Mustacchi { 770*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0}, 771*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0}, 772*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0}, 773*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0}, 774*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0}, 775*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0}, 776*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0}, 777*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0}, 778*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0}, 779*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0}, 780*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0}, 781*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0}, 782*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 783*35786f68SRobert Mustacchi }; 784*35786f68SRobert Mustacchi 785*35786f68SRobert Mustacchi 786*35786f68SRobert Mustacchi /******************************************************************************* 787*35786f68SRobert Mustacchi * 788*35786f68SRobert Mustacchi * MPST - Memory Power State Table 789*35786f68SRobert Mustacchi * 790*35786f68SRobert Mustacchi ******************************************************************************/ 791*35786f68SRobert Mustacchi 792*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] = 793*35786f68SRobert Mustacchi { 794*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0}, 795*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0}, 796*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0}, 797*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0}, 798*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 799*35786f68SRobert Mustacchi }; 800*35786f68SRobert Mustacchi 801*35786f68SRobert Mustacchi /* MPST subtables */ 802*35786f68SRobert Mustacchi 803*35786f68SRobert Mustacchi /* 0: Memory Power Node Structure */ 804*35786f68SRobert Mustacchi 805*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] = 806*35786f68SRobert Mustacchi { 807*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 808*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0}, 809*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0}, 810*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0}, 811*35786f68SRobert Mustacchi 812*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0}, 813*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0}, 814*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0}, 815*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0}, 816*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0}, 817*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0}, 818*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0}, 819*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 820*35786f68SRobert Mustacchi }; 821*35786f68SRobert Mustacchi 822*35786f68SRobert Mustacchi /* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */ 823*35786f68SRobert Mustacchi 824*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] = 825*35786f68SRobert Mustacchi { 826*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0}, 827*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0}, 828*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 829*35786f68SRobert Mustacchi }; 830*35786f68SRobert Mustacchi 831*35786f68SRobert Mustacchi /* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */ 832*35786f68SRobert Mustacchi 833*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] = 834*35786f68SRobert Mustacchi { 835*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0}, 836*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 837*35786f68SRobert Mustacchi }; 838*35786f68SRobert Mustacchi 839*35786f68SRobert Mustacchi /* 01: Power Characteristics Count (follows all Power Node(s) above) */ 840*35786f68SRobert Mustacchi 841*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] = 842*35786f68SRobert Mustacchi { 843*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0}, 844*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0}, 845*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 846*35786f68SRobert Mustacchi }; 847*35786f68SRobert Mustacchi 848*35786f68SRobert Mustacchi /* 02: Memory Power State Characteristics Structure */ 849*35786f68SRobert Mustacchi 850*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] = 851*35786f68SRobert Mustacchi { 852*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0}, 853*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 854*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0}, 855*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0}, 856*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0}, 857*35786f68SRobert Mustacchi 858*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0}, 859*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0}, 860*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0}, 861*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0}, 862*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0}, 863*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 864*35786f68SRobert Mustacchi }; 865*35786f68SRobert Mustacchi 866*35786f68SRobert Mustacchi 867*35786f68SRobert Mustacchi /******************************************************************************* 868*35786f68SRobert Mustacchi * 869*35786f68SRobert Mustacchi * MSCT - Maximum System Characteristics Table (ACPI 4.0) 870*35786f68SRobert Mustacchi * 871*35786f68SRobert Mustacchi ******************************************************************************/ 872*35786f68SRobert Mustacchi 873*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] = 874*35786f68SRobert Mustacchi { 875*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0}, 876*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0}, 877*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0}, 878*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0}, 879*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 880*35786f68SRobert Mustacchi }; 881*35786f68SRobert Mustacchi 882*35786f68SRobert Mustacchi /* Subtable - Maximum Proximity Domain Information. Version 1 */ 883*35786f68SRobert Mustacchi 884*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] = 885*35786f68SRobert Mustacchi { 886*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0}, 887*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH}, 888*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0}, 889*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0}, 890*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0}, 891*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0}, 892*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 893*35786f68SRobert Mustacchi }; 894*35786f68SRobert Mustacchi 895*35786f68SRobert Mustacchi 896*35786f68SRobert Mustacchi /******************************************************************************* 897*35786f68SRobert Mustacchi * 898*35786f68SRobert Mustacchi * MTMR - MID Timer Table 899*35786f68SRobert Mustacchi * 900*35786f68SRobert Mustacchi ******************************************************************************/ 901*35786f68SRobert Mustacchi 902*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr[] = 903*35786f68SRobert Mustacchi { 904*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 905*35786f68SRobert Mustacchi }; 906*35786f68SRobert Mustacchi 907*35786f68SRobert Mustacchi /* MTMR Subtables - MTMR Entry */ 908*35786f68SRobert Mustacchi 909*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoMtmr0[] = 910*35786f68SRobert Mustacchi { 911*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_MTMR0_OFFSET (PhysicalAddress), "PhysicalAddress", 0}, 912*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Frequency), "Frequency", 0}, 913*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_MTMR0_OFFSET (Irq), "IRQ", 0}, 914*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 915*35786f68SRobert Mustacchi }; 916*35786f68SRobert Mustacchi 917*35786f68SRobert Mustacchi 918*35786f68SRobert Mustacchi /******************************************************************************* 919*35786f68SRobert Mustacchi * 920*35786f68SRobert Mustacchi * NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0) 921*35786f68SRobert Mustacchi * 922*35786f68SRobert Mustacchi ******************************************************************************/ 923*35786f68SRobert Mustacchi 924*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] = 925*35786f68SRobert Mustacchi { 926*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0}, 927*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 928*35786f68SRobert Mustacchi }; 929*35786f68SRobert Mustacchi 930*35786f68SRobert Mustacchi /* Common Subtable header */ 931*35786f68SRobert Mustacchi 932*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] = 933*35786f68SRobert Mustacchi { 934*35786f68SRobert Mustacchi {ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0}, 935*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH}, 936*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 937*35786f68SRobert Mustacchi }; 938*35786f68SRobert Mustacchi 939*35786f68SRobert Mustacchi /* 0: System Physical Address Range Structure */ 940*35786f68SRobert Mustacchi 941*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] = 942*35786f68SRobert Mustacchi { 943*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0}, 944*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 945*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0}, 946*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0}, 947*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0}, 948*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0}, 949*35786f68SRobert Mustacchi {ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Address Range GUID", 0}, 950*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0}, 951*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0}, 952*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0}, 953*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 954*35786f68SRobert Mustacchi }; 955*35786f68SRobert Mustacchi 956*35786f68SRobert Mustacchi /* 1: Memory Device to System Address Range Map Structure */ 957*35786f68SRobert Mustacchi 958*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] = 959*35786f68SRobert Mustacchi { 960*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0}, 961*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0}, 962*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0}, 963*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0}, 964*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0}, 965*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0}, 966*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0}, 967*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0}, 968*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0}, 969*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0}, 970*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG}, 971*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0}, 972*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0}, 973*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0}, 974*35786f68SRobert Mustacchi {ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0}, 975*35786f68SRobert Mustacchi {ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0}, 976*35786f68SRobert Mustacchi {ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0}, 977*35786f68SRobert Mustacchi {ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0}, 978*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0}, 979*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 980*35786f68SRobert Mustacchi }; 981*35786f68SRobert Mustacchi 982*35786f68SRobert Mustacchi /* 2: Interleave Structure */ 983*35786f68SRobert Mustacchi 984*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] = 985*35786f68SRobert Mustacchi { 986*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0}, 987*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0}, 988*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0}, 989*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0}, 990*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 991*35786f68SRobert Mustacchi }; 992*35786f68SRobert Mustacchi 993*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] = 994*35786f68SRobert Mustacchi { 995*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL}, 996*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 997*35786f68SRobert Mustacchi }; 998*35786f68SRobert Mustacchi 999*35786f68SRobert Mustacchi /* 3: SMBIOS Management Information Structure */ 1000*35786f68SRobert Mustacchi 1001*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] = 1002*35786f68SRobert Mustacchi { 1003*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0}, 1004*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1005*35786f68SRobert Mustacchi }; 1006*35786f68SRobert Mustacchi 1007*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] = 1008*35786f68SRobert Mustacchi { 1009*35786f68SRobert Mustacchi {ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL}, 1010*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1011*35786f68SRobert Mustacchi }; 1012*35786f68SRobert Mustacchi 1013*35786f68SRobert Mustacchi /* 4: NVDIMM Control Region Structure */ 1014*35786f68SRobert Mustacchi 1015*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] = 1016*35786f68SRobert Mustacchi { 1017*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0}, 1018*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0}, 1019*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0}, 1020*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0}, 1021*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0}, 1022*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0}, 1023*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0}, 1024*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0}, 1025*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0}, 1026*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0}, 1027*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0}, 1028*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0}, 1029*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0}, 1030*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0}, 1031*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0}, 1032*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0}, 1033*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0}, 1034*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0}, 1035*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0}, 1036*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG}, 1037*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0}, 1038*35786f68SRobert Mustacchi {ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0}, 1039*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1040*35786f68SRobert Mustacchi }; 1041*35786f68SRobert Mustacchi 1042*35786f68SRobert Mustacchi /* 5: NVDIMM Block Data Window Region Structure */ 1043*35786f68SRobert Mustacchi 1044*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] = 1045*35786f68SRobert Mustacchi { 1046*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0}, 1047*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0}, 1048*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0}, 1049*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0}, 1050*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0}, 1051*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0}, 1052*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1053*35786f68SRobert Mustacchi }; 1054*35786f68SRobert Mustacchi 1055*35786f68SRobert Mustacchi /* 6: Flush Hint Address Structure */ 1056*35786f68SRobert Mustacchi 1057*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] = 1058*35786f68SRobert Mustacchi { 1059*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0}, 1060*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0}, 1061*35786f68SRobert Mustacchi {ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0}, 1062*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1063*35786f68SRobert Mustacchi }; 1064*35786f68SRobert Mustacchi 1065*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] = 1066*35786f68SRobert Mustacchi { 1067*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL}, 1068*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1069*35786f68SRobert Mustacchi }; 1070*35786f68SRobert Mustacchi 1071*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoNfit7[] = 1072*35786f68SRobert Mustacchi { 1073*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_NFIT7_OFFSET (HighestCapability), "Highest Capability", 0}, 1074*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_NFIT7_OFFSET (Reserved[0]), "Reserved", 0}, 1075*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Capabilities), "Capabilities (decoded below)", DT_FLAG}, 1076*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Cache Flush to NVDIMM", 0}, 1077*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Flush to NVDIMM", 0}, 1078*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Mirroring", 0}, 1079*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Reserved2), "Reserved", 0}, 1080*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1081*35786f68SRobert Mustacchi }; 1082*35786f68SRobert Mustacchi 1083*35786f68SRobert Mustacchi 1084*35786f68SRobert Mustacchi /******************************************************************************* 1085*35786f68SRobert Mustacchi * 1086*35786f68SRobert Mustacchi * PCCT - Platform Communications Channel Table (ACPI 5.0) 1087*35786f68SRobert Mustacchi * 1088*35786f68SRobert Mustacchi ******************************************************************************/ 1089*35786f68SRobert Mustacchi 1090*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] = 1091*35786f68SRobert Mustacchi { 1092*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1093*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Platform", 0}, 1094*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0}, 1095*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1096*35786f68SRobert Mustacchi }; 1097*35786f68SRobert Mustacchi 1098*35786f68SRobert Mustacchi /* PCCT subtables */ 1099*35786f68SRobert Mustacchi 1100*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] = 1101*35786f68SRobert Mustacchi { 1102*35786f68SRobert Mustacchi {ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0}, 1103*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH}, 1104*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1105*35786f68SRobert Mustacchi }; 1106*35786f68SRobert Mustacchi 1107*35786f68SRobert Mustacchi /* 0: Generic Communications Subspace */ 1108*35786f68SRobert Mustacchi 1109*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] = 1110*35786f68SRobert Mustacchi { 1111*35786f68SRobert Mustacchi {ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0}, 1112*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0}, 1113*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0}, 1114*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1115*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0}, 1116*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0}, 1117*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0}, 1118*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1119*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1120*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1121*35786f68SRobert Mustacchi }; 1122*35786f68SRobert Mustacchi 1123*35786f68SRobert Mustacchi /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1124*35786f68SRobert Mustacchi 1125*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] = 1126*35786f68SRobert Mustacchi { 1127*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1128*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1129*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1130*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0}, 1131*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0}, 1132*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0}, 1133*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0}, 1134*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1135*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0}, 1136*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0}, 1137*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0}, 1138*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1139*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1140*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1141*35786f68SRobert Mustacchi }; 1142*35786f68SRobert Mustacchi 1143*35786f68SRobert Mustacchi /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1144*35786f68SRobert Mustacchi 1145*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] = 1146*35786f68SRobert Mustacchi { 1147*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1148*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1149*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1150*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0}, 1151*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0}, 1152*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0}, 1153*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0}, 1154*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1155*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0}, 1156*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0}, 1157*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0}, 1158*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1159*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1160*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1161*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1162*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0}, 1163*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1164*35786f68SRobert Mustacchi }; 1165*35786f68SRobert Mustacchi 1166*35786f68SRobert Mustacchi /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1167*35786f68SRobert Mustacchi 1168*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct3[] = 1169*35786f68SRobert Mustacchi { 1170*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1171*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1172*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1173*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Mode", 0}, 1174*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Reserved1), "Reserved", 0}, 1175*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (BaseAddress), "Base Address", 0}, 1176*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Length), "Address Length", 0}, 1177*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1178*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (PreserveMask), "Preserve Mask", 0}, 1179*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (WriteMask), "Write Mask", 0}, 1180*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Command Latency", 0}, 1181*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1182*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1183*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1184*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1185*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1186*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (Reserved2), "Reserved", 0}, 1187*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1188*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1189*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1190*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1191*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1192*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1193*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1194*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1195*35786f68SRobert Mustacchi }; 1196*35786f68SRobert Mustacchi 1197*35786f68SRobert Mustacchi /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1198*35786f68SRobert Mustacchi 1199*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPcct4[] = 1200*35786f68SRobert Mustacchi { 1201*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (PlatformInterrupt), "Platform Interrupt", 0}, 1202*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1203*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Polarity", 0}, 1204*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Mode", 0}, 1205*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Reserved1), "Reserved", 0}, 1206*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (BaseAddress), "Base Address", 0}, 1207*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Length), "Address Length", 0}, 1208*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (DoorbellRegister), "Doorbell Register", 0}, 1209*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (PreserveMask), "Preserve Mask", 0}, 1210*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (WriteMask), "Write Mask", 0}, 1211*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Latency), "Command Latency", 0}, 1212*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MaxAccessRate), "Maximum Access Rate", 0}, 1213*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0}, 1214*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (PlatformAckRegister), "Platform ACK Register", 0}, 1215*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0}, 1216*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckSetMask), "ACK Set Mask", 0}, 1217*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (Reserved2), "Reserved", 0}, 1218*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdCompleteRegister), "Command Complete Register", 0}, 1219*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0}, 1220*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdUpdateRegister), "Command Update Register", 0}, 1221*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0}, 1222*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0}, 1223*35786f68SRobert Mustacchi {ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (ErrorStatusRegister), "Error Status Register", 0}, 1224*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (ErrorStatusMask), "Error Status Mask", 0}, 1225*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1226*35786f68SRobert Mustacchi }; 1227*35786f68SRobert Mustacchi 1228*35786f68SRobert Mustacchi 1229*35786f68SRobert Mustacchi /******************************************************************************* 1230*35786f68SRobert Mustacchi * 1231*35786f68SRobert Mustacchi * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1232*35786f68SRobert Mustacchi * 1233*35786f68SRobert Mustacchi ******************************************************************************/ 1234*35786f68SRobert Mustacchi 1235*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt[] = 1236*35786f68SRobert Mustacchi { 1237*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PDTT_OFFSET (TriggerCount), "Trigger Count", 0}, 1238*35786f68SRobert Mustacchi {ACPI_DMT_UINT24, ACPI_PDTT_OFFSET (Reserved), "Reserved", 0}, 1239*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PDTT_OFFSET (ArrayOffset), "Array Offset", 0}, 1240*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1241*35786f68SRobert Mustacchi }; 1242*35786f68SRobert Mustacchi 1243*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt0[] = 1244*35786f68SRobert Mustacchi { 1245*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (SubchannelId), "Subchannel Id", 0}, 1246*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG}, 1247*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Runtime Trigger", 0}, 1248*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Wait for Completion", 0}, 1249*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1250*35786f68SRobert Mustacchi }; 1251*35786f68SRobert Mustacchi 1252*35786f68SRobert Mustacchi 1253*35786f68SRobert Mustacchi /******************************************************************************* 1254*35786f68SRobert Mustacchi * 1255*35786f68SRobert Mustacchi * PMTT - Platform Memory Topology Table 1256*35786f68SRobert Mustacchi * 1257*35786f68SRobert Mustacchi ******************************************************************************/ 1258*35786f68SRobert Mustacchi 1259*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] = 1260*35786f68SRobert Mustacchi { 1261*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (Reserved), "Reserved", 0}, 1262*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1263*35786f68SRobert Mustacchi }; 1264*35786f68SRobert Mustacchi 1265*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 1266*35786f68SRobert Mustacchi 1267*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmttHdr[] = 1268*35786f68SRobert Mustacchi { 1269*35786f68SRobert Mustacchi {ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, 1270*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, 1271*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, 1272*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, 1273*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, 1274*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, 1275*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, 1276*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, 1277*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1278*35786f68SRobert Mustacchi }; 1279*35786f68SRobert Mustacchi 1280*35786f68SRobert Mustacchi /* PMTT Subtables */ 1281*35786f68SRobert Mustacchi 1282*35786f68SRobert Mustacchi /* 0: Socket */ 1283*35786f68SRobert Mustacchi 1284*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] = 1285*35786f68SRobert Mustacchi { 1286*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0}, 1287*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0}, 1288*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1289*35786f68SRobert Mustacchi }; 1290*35786f68SRobert Mustacchi 1291*35786f68SRobert Mustacchi /* 1: Memory Controller */ 1292*35786f68SRobert Mustacchi 1293*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] = 1294*35786f68SRobert Mustacchi { 1295*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadLatency), "Read Latency", 0}, 1296*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteLatency), "Write Latency", 0}, 1297*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (ReadBandwidth), "Read Bandwidth", 0}, 1298*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT1_OFFSET (WriteBandwidth), "Write Bandwidth", 0}, 1299*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (AccessWidth), "Access Width", 0}, 1300*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Alignment), "Alignment", 0}, 1301*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0}, 1302*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (DomainCount), "Domain Count", 0}, 1303*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1304*35786f68SRobert Mustacchi }; 1305*35786f68SRobert Mustacchi 1306*35786f68SRobert Mustacchi /* 1a: Proximity Domain */ 1307*35786f68SRobert Mustacchi 1308*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1a[] = 1309*35786f68SRobert Mustacchi { 1310*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT1A_OFFSET (ProximityDomain), "Proximity Domain", 0}, 1311*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1312*35786f68SRobert Mustacchi }; 1313*35786f68SRobert Mustacchi 1314*35786f68SRobert Mustacchi /* 2: Physical Component */ 1315*35786f68SRobert Mustacchi 1316*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] = 1317*35786f68SRobert Mustacchi { 1318*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (ComponentId), "Component ID", 0}, 1319*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PMTT2_OFFSET (Reserved), "Reserved", 0}, 1320*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (MemorySize), "Memory Size", 0}, 1321*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0}, 1322*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1323*35786f68SRobert Mustacchi }; 1324*35786f68SRobert Mustacchi 1325*35786f68SRobert Mustacchi 1326*35786f68SRobert Mustacchi /******************************************************************************* 1327*35786f68SRobert Mustacchi * 1328*35786f68SRobert Mustacchi * PPTT - Processor Properties Topology Table (ACPI 6.2) 1329*35786f68SRobert Mustacchi * 1330*35786f68SRobert Mustacchi ******************************************************************************/ 1331*35786f68SRobert Mustacchi 1332*35786f68SRobert Mustacchi /* Main table consists of only the standard ACPI header - subtables follow */ 1333*35786f68SRobert Mustacchi 1334*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 1335*35786f68SRobert Mustacchi 1336*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPpttHdr[] = 1337*35786f68SRobert Mustacchi { 1338*35786f68SRobert Mustacchi {ACPI_DMT_PPTT, ACPI_PPTTH_OFFSET (Type), "Subtable Type", 0}, 1339*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PPTTH_OFFSET (Length), "Length", 0}, 1340*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1341*35786f68SRobert Mustacchi }; 1342*35786f68SRobert Mustacchi 1343*35786f68SRobert Mustacchi /* 0: Processor hierarchy node */ 1344*35786f68SRobert Mustacchi 1345*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0[] = 1346*35786f68SRobert Mustacchi { 1347*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT0_OFFSET (Reserved), "Reserved", 0}, 1348*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Flags), "Flags (decoded below)", 0}, 1349*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Physical package", 0}, 1350*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "ACPI Processor ID valid", 0}, 1351*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Parent), "Parent", 0}, 1352*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (AcpiProcessorId), "ACPI Processor ID", 0}, 1353*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (NumberOfPrivResources), "Private Resource Number", 0}, 1354*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1355*35786f68SRobert Mustacchi }; 1356*35786f68SRobert Mustacchi 1357*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0a[] = 1358*35786f68SRobert Mustacchi { 1359*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, 0, "Private Resource", DT_OPTIONAL}, 1360*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1361*35786f68SRobert Mustacchi }; 1362*35786f68SRobert Mustacchi 1363*35786f68SRobert Mustacchi /* 1: Cache type */ 1364*35786f68SRobert Mustacchi 1365*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1[] = 1366*35786f68SRobert Mustacchi { 1367*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (Reserved), "Reserved", 0}, 1368*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Flags), "Flags (decoded below)", 0}, 1369*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Size valid", 0}, 1370*35786f68SRobert Mustacchi {ACPI_DMT_FLAG1, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0}, 1371*35786f68SRobert Mustacchi {ACPI_DMT_FLAG2, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Associativity valid", 0}, 1372*35786f68SRobert Mustacchi {ACPI_DMT_FLAG3, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0}, 1373*35786f68SRobert Mustacchi {ACPI_DMT_FLAG4, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache Type valid", 0}, 1374*35786f68SRobert Mustacchi {ACPI_DMT_FLAG5, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Write Policy valid", 0}, 1375*35786f68SRobert Mustacchi {ACPI_DMT_FLAG6, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Line Size valid", 0}, 1376*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NextLevelOfCache), "Next Level of Cache", 0}, 1377*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Size), "Size", 0}, 1378*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NumberOfSets), "Number of Sets", 0}, 1379*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Associativity), "Associativity", 0}, 1380*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Attributes), "Attributes", 0}, 1381*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS0, ACPI_PPTT1_OFFSET (Attributes), "Allocation Type", 0}, 1382*35786f68SRobert Mustacchi {ACPI_DMT_FLAGS2, ACPI_PPTT1_OFFSET (Attributes), "Cache Type", 0}, 1383*35786f68SRobert Mustacchi {ACPI_DMT_FLAG4, ACPI_PPTT1_OFFSET (Attributes), "Write Policy", 0}, 1384*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (LineSize), "Line Size", 0}, 1385*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1386*35786f68SRobert Mustacchi }; 1387*35786f68SRobert Mustacchi 1388*35786f68SRobert Mustacchi /* 2: ID */ 1389*35786f68SRobert Mustacchi 1390*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoPptt2[] = 1391*35786f68SRobert Mustacchi { 1392*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (Reserved), "Reserved", 0}, 1393*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_PPTT2_OFFSET (VendorId), "VENDOR_ID", 0}, 1394*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level1Id), "LEVEL_1_ID", 0}, 1395*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level2Id), "LEVEL_2_ID", 0}, 1396*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MajorRev), "MAJOR_REV", 0}, 1397*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MinorRev), "MINOR_REV", 0}, 1398*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (SpinRev), "SPIN_REV", 0}, 1399*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1400*35786f68SRobert Mustacchi }; 1401*35786f68SRobert Mustacchi 1402*35786f68SRobert Mustacchi 1403*35786f68SRobert Mustacchi /******************************************************************************* 1404*35786f68SRobert Mustacchi * 1405*35786f68SRobert Mustacchi * RASF - RAS Feature table 1406*35786f68SRobert Mustacchi * 1407*35786f68SRobert Mustacchi ******************************************************************************/ 1408*35786f68SRobert Mustacchi 1409*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] = 1410*35786f68SRobert Mustacchi { 1411*35786f68SRobert Mustacchi {ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0}, 1412*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1413*35786f68SRobert Mustacchi }; 1414*35786f68SRobert Mustacchi 1415*35786f68SRobert Mustacchi 1416*35786f68SRobert Mustacchi /******************************************************************************* 1417*35786f68SRobert Mustacchi * 1418*35786f68SRobert Mustacchi * S3PT - S3 Performance Table 1419*35786f68SRobert Mustacchi * 1420*35786f68SRobert Mustacchi ******************************************************************************/ 1421*35786f68SRobert Mustacchi 1422*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] = 1423*35786f68SRobert Mustacchi { 1424*35786f68SRobert Mustacchi {ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0}, 1425*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH}, 1426*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1427*35786f68SRobert Mustacchi }; 1428*35786f68SRobert Mustacchi 1429*35786f68SRobert Mustacchi /* S3PT subtable header */ 1430*35786f68SRobert Mustacchi 1431*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] = 1432*35786f68SRobert Mustacchi { 1433*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0}, 1434*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH}, 1435*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0}, 1436*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1437*35786f68SRobert Mustacchi }; 1438*35786f68SRobert Mustacchi 1439*35786f68SRobert Mustacchi /* 0: Basic S3 Resume Performance Record */ 1440*35786f68SRobert Mustacchi 1441*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] = 1442*35786f68SRobert Mustacchi { 1443*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0}, 1444*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0}, 1445*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0}, 1446*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1447*35786f68SRobert Mustacchi }; 1448*35786f68SRobert Mustacchi 1449*35786f68SRobert Mustacchi /* 1: Basic S3 Suspend Performance Record */ 1450*35786f68SRobert Mustacchi 1451*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] = 1452*35786f68SRobert Mustacchi { 1453*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0}, 1454*35786f68SRobert Mustacchi {ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0}, 1455*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1456*35786f68SRobert Mustacchi }; 1457*35786f68SRobert Mustacchi 1458*35786f68SRobert Mustacchi 1459*35786f68SRobert Mustacchi /******************************************************************************* 1460*35786f68SRobert Mustacchi * 1461*35786f68SRobert Mustacchi * SBST - Smart Battery Specification Table 1462*35786f68SRobert Mustacchi * 1463*35786f68SRobert Mustacchi ******************************************************************************/ 1464*35786f68SRobert Mustacchi 1465*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] = 1466*35786f68SRobert Mustacchi { 1467*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0}, 1468*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0}, 1469*35786f68SRobert Mustacchi {ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0}, 1470*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1471*35786f68SRobert Mustacchi }; 1472*35786f68SRobert Mustacchi 1473*35786f68SRobert Mustacchi 1474*35786f68SRobert Mustacchi /******************************************************************************* 1475*35786f68SRobert Mustacchi * 1476*35786f68SRobert Mustacchi * SDEI - Software Delegated Execption Interface Descriptor Table 1477*35786f68SRobert Mustacchi * 1478*35786f68SRobert Mustacchi ******************************************************************************/ 1479*35786f68SRobert Mustacchi 1480*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdei[] = 1481*35786f68SRobert Mustacchi { 1482*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1483*35786f68SRobert Mustacchi }; 1484*35786f68SRobert Mustacchi 1485*35786f68SRobert Mustacchi 1486*35786f68SRobert Mustacchi /******************************************************************************* 1487*35786f68SRobert Mustacchi * 1488*35786f68SRobert Mustacchi * SDEV - Secure Devices Table (ACPI 6.2) 1489*35786f68SRobert Mustacchi * 1490*35786f68SRobert Mustacchi ******************************************************************************/ 1491*35786f68SRobert Mustacchi 1492*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev[] = 1493*35786f68SRobert Mustacchi { 1494*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1495*35786f68SRobert Mustacchi }; 1496*35786f68SRobert Mustacchi 1497*35786f68SRobert Mustacchi /* Common Subtable header (one per Subtable) */ 1498*35786f68SRobert Mustacchi 1499*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdevHdr[] = 1500*35786f68SRobert Mustacchi { 1501*35786f68SRobert Mustacchi {ACPI_DMT_SDEV, ACPI_SDEVH_OFFSET (Type), "Subtable Type", 0}, 1502*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_SDEVH_OFFSET (Flags), "Flags (decoded below)", 0}, 1503*35786f68SRobert Mustacchi {ACPI_DMT_FLAG0, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Allow handoff to unsecure OS", 0}, 1504*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEVH_OFFSET (Length), "Length", 0}, 1505*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1506*35786f68SRobert Mustacchi }; 1507*35786f68SRobert Mustacchi 1508*35786f68SRobert Mustacchi /* SDEV Subtables */ 1509*35786f68SRobert Mustacchi 1510*35786f68SRobert Mustacchi /* 0: Namespace Device Based Secure Device Structure */ 1511*35786f68SRobert Mustacchi 1512*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0[] = 1513*35786f68SRobert Mustacchi { 1514*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdOffset), "Device ID Offset", 0}, 1515*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdLength), "Device ID Length", 0}, 1516*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 1517*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 1518*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1519*35786f68SRobert Mustacchi }; 1520*35786f68SRobert Mustacchi 1521*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0a[] = 1522*35786f68SRobert Mustacchi { 1523*35786f68SRobert Mustacchi {ACPI_DMT_STRING, 0, "Namepath", 0}, 1524*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1525*35786f68SRobert Mustacchi }; 1526*35786f68SRobert Mustacchi 1527*35786f68SRobert Mustacchi /* 1: PCIe Endpoint Device Based Device Structure */ 1528*35786f68SRobert Mustacchi 1529*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1[] = 1530*35786f68SRobert Mustacchi { 1531*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (Segment), "Segment", 0}, 1532*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (StartBus), "Start Bus", 0}, 1533*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathOffset), "Path Offset", 0}, 1534*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathLength), "Path Length", 0}, 1535*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataOffset), "Vendor Data Offset", 0}, 1536*35786f68SRobert Mustacchi {ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataLength), "Vendor Data Length", 0}, 1537*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1538*35786f68SRobert Mustacchi }; 1539*35786f68SRobert Mustacchi 1540*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1a[] = 1541*35786f68SRobert Mustacchi { 1542*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Device), "Device", 0}, 1543*35786f68SRobert Mustacchi {ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Function), "Function", 0}, 1544*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1545*35786f68SRobert Mustacchi }; 1546*35786f68SRobert Mustacchi 1547*35786f68SRobert Mustacchi ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1b[] = 1548*35786f68SRobert Mustacchi { 1549*35786f68SRobert Mustacchi {ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, /*, DT_OPTIONAL}, */ 1550*35786f68SRobert Mustacchi ACPI_DMT_TERMINATOR 1551*35786f68SRobert Mustacchi }; 1552*35786f68SRobert Mustacchi /*! [End] no source code translation !*/ 1553