xref: /illumos-gate/usr/src/boot/efi/include/efipciio.h (revision 22028508)
1 /* $FreeBSD$ */
2 /** @file
3   EFI PCI I/O Protocol provides the basic Memory, I/O, PCI configuration,
4   and DMA interfaces that a driver uses to access its PCI controller.
5 
6   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
7   This program and the accompanying materials
8   are licensed and made available under the terms and conditions of the BSD License
9   which accompanies this distribution.  The full text of the license may be found at
10   http://opensource.org/licenses/bsd-license.php
11 
12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 
15 **/
16 
17 #ifndef __PCI_IO_H__
18 #define __PCI_IO_H__
19 
20 #define EFI_PCI_ROOT_IO_GUID \
21   { 0x2F707EBB, 0x4A1A, 0x11d4, { 0x9A, 0x38, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D }}
22 
23 ///
24 /// Global ID for the PCI I/O Protocol
25 ///
26 #define EFI_PCI_IO_PROTOCOL_GUID \
27     { 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a} }
28 
29 typedef struct _EFI_PCI_IO_PROTOCOL  EFI_PCI_IO_PROTOCOL;
30 
31 ///
32 /// *******************************************************
33 /// EFI_PCI_IO_PROTOCOL_WIDTH
34 /// *******************************************************
35 ///
36 typedef enum {
37   EfiPciIoWidthUint8      = 0,
38   EfiPciIoWidthUint16,
39   EfiPciIoWidthUint32,
40   EfiPciIoWidthUint64,
41   EfiPciIoWidthFifoUint8,
42   EfiPciIoWidthFifoUint16,
43   EfiPciIoWidthFifoUint32,
44   EfiPciIoWidthFifoUint64,
45   EfiPciIoWidthFillUint8,
46   EfiPciIoWidthFillUint16,
47   EfiPciIoWidthFillUint32,
48   EfiPciIoWidthFillUint64,
49   EfiPciIoWidthMaximum
50 } EFI_PCI_IO_PROTOCOL_WIDTH;
51 
52 //
53 // Complete PCI address generater
54 //
55 #define EFI_PCI_IO_PASS_THROUGH_BAR               0xff    ///< Special BAR that passes a memory or I/O cycle through unchanged
56 #define EFI_PCI_IO_ATTRIBUTE_MASK                 0x077f  ///< All the following I/O and Memory cycles
57 #define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO   0x0001  ///< I/O cycles 0x0000-0x00FF (10 bit decode)
58 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO               0x0002  ///< I/O cycles 0x0100-0x03FF or greater (10 bit decode)
59 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO       0x0004  ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
60 #define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY           0x0008  ///< MEM cycles 0xA0000-0xBFFFF (24 bit decode)
61 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO               0x0010  ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
62 #define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO       0x0020  ///< I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
63 #define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO     0x0040  ///< I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
64 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080  ///< Map a memory range so writes are combined
65 #define EFI_PCI_IO_ATTRIBUTE_IO                   0x0100  ///< Enable the I/O decode bit in the PCI Config Header
66 #define EFI_PCI_IO_ATTRIBUTE_MEMORY               0x0200  ///< Enable the Memory decode bit in the PCI Config Header
67 #define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER           0x0400  ///< Enable the DMA bit in the PCI Config Header
68 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED        0x0800  ///< Map a memory range so all r/w accesses are cached
69 #define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE       0x1000  ///< Disable a memory range
70 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE      0x2000  ///< Clear for an add-in PCI Device
71 #define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM         0x4000  ///< Clear for a physical PCI Option ROM accessed through ROM BAR
72 #define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE   0x8000  ///< Clear for PCI controllers that can not genrate a DAC
73 #define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16            0x10000 ///< I/O cycles 0x0100-0x03FF or greater (16 bit decode)
74 #define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16    0x20000 ///< I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
75 #define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16            0x40000 ///< I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
76 
77 #define EFI_PCI_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
78 #define EFI_VGA_DEVICE_ENABLE                     (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
79 
80 ///
81 /// *******************************************************
82 /// EFI_PCI_IO_PROTOCOL_OPERATION
83 /// *******************************************************
84 ///
85 typedef enum {
86   ///
87   /// A read operation from system memory by a bus master.
88   ///
89   EfiPciIoOperationBusMasterRead,
90   ///
91   /// A write operation from system memory by a bus master.
92   ///
93   EfiPciIoOperationBusMasterWrite,
94   ///
95   /// Provides both read and write access to system memory by both the processor and a
96   /// bus master. The buffer is coherent from both the processor's and the bus master's point of view.
97   ///
98   EfiPciIoOperationBusMasterCommonBuffer,
99   EfiPciIoOperationMaximum
100 } EFI_PCI_IO_PROTOCOL_OPERATION;
101 
102 ///
103 /// *******************************************************
104 /// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
105 /// *******************************************************
106 ///
107 typedef enum {
108   ///
109   /// Retrieve the PCI controller's current attributes, and return them in Result.
110   ///
111   EfiPciIoAttributeOperationGet,
112   ///
113   /// Set the PCI controller's current attributes to Attributes.
114   ///
115   EfiPciIoAttributeOperationSet,
116   ///
117   /// Enable the attributes specified by the bits that are set in Attributes for this PCI controller.
118   ///
119   EfiPciIoAttributeOperationEnable,
120   ///
121   /// Disable the attributes specified by the bits that are set in Attributes for this PCI controller.
122   ///
123   EfiPciIoAttributeOperationDisable,
124   ///
125   /// Retrieve the PCI controller's supported attributes, and return them in Result.
126   ///
127   EfiPciIoAttributeOperationSupported,
128   EfiPciIoAttributeOperationMaximum
129 } EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
130 
131 /**
132   Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
133   satisfied or after a defined duration.
134 
135   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
136   @param  Width                 Signifies the width of the memory or I/O operations.
137   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
138                                 base address for the memory operation to perform.
139   @param  Offset                The offset within the selected BAR to start the memory operation.
140   @param  Mask                  Mask used for the polling criteria.
141   @param  Value                 The comparison value used for the polling exit criteria.
142   @param  Delay                 The number of 100 ns units to poll.
143   @param  Result                Pointer to the last value read from the memory location.
144 
145   @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.
146   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
147   @retval EFI_UNSUPPORTED       Offset is not valid for the BarIndex of this PCI controller.
148   @retval EFI_TIMEOUT           Delay expired before a match occurred.
149   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
150   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
151 
152 **/
153 typedef
154 EFI_STATUS
155 (EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM)(
156   IN EFI_PCI_IO_PROTOCOL           *This,
157   IN  EFI_PCI_IO_PROTOCOL_WIDTH    Width,
158   IN  UINT8                        BarIndex,
159   IN  UINT64                       Offset,
160   IN  UINT64                       Mask,
161   IN  UINT64                       Value,
162   IN  UINT64                       Delay,
163   OUT UINT64                       *Result
164   );
165 
166 /**
167   Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
168 
169   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
170   @param  Width                 Signifies the width of the memory or I/O operations.
171   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
172                                 base address for the memory or I/O operation to perform.
173   @param  Offset                The offset within the selected BAR to start the memory or I/O operation.
174   @param  Count                 The number of memory or I/O operations to perform.
175   @param  Buffer                For read operations, the destination buffer to store the results. For write
176                                 operations, the source buffer to write data from.
177 
178   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
179   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
180   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
181                                 valid for the PCI BAR specified by BarIndex.
182   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
183   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
184 
185 **/
186 typedef
187 EFI_STATUS
188 (EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM)(
189   IN EFI_PCI_IO_PROTOCOL              *This,
190   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
191   IN     UINT8                        BarIndex,
192   IN     UINT64                       Offset,
193   IN     UINTN                        Count,
194   IN OUT VOID                         *Buffer
195   );
196 
197 typedef struct {
198   ///
199   /// Read PCI controller registers in the PCI memory or I/O space.
200   ///
201   EFI_PCI_IO_PROTOCOL_IO_MEM  Read;
202   ///
203   /// Write PCI controller registers in the PCI memory or I/O space.
204   ///
205   EFI_PCI_IO_PROTOCOL_IO_MEM  Write;
206 } EFI_PCI_IO_PROTOCOL_ACCESS;
207 
208 /**
209   Enable a PCI driver to access PCI controller registers in PCI configuration space.
210 
211   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
212   @param  Width                 Signifies the width of the memory operations.
213   @param  Offset                The offset within the PCI configuration space for the PCI controller.
214   @param  Count                 The number of PCI configuration operations to perform.
215   @param  Buffer                For read operations, the destination buffer to store the results. For write
216                                 operations, the source buffer to write data from.
217 
218 
219   @retval EFI_SUCCESS           The data was read from or written to the PCI controller.
220   @retval EFI_UNSUPPORTED       The address range specified by Offset, Width, and Count is not
221                                 valid for the PCI configuration header of the PCI controller.
222   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
223   @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
224 
225 **/
226 typedef
227 EFI_STATUS
228 (EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG)(
229   IN EFI_PCI_IO_PROTOCOL              *This,
230   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
231   IN     UINT32                       Offset,
232   IN     UINTN                        Count,
233   IN OUT VOID                         *Buffer
234   );
235 
236 typedef struct {
237   ///
238   /// Read PCI controller registers in PCI configuration space.
239   ///
240   EFI_PCI_IO_PROTOCOL_CONFIG  Read;
241   ///
242   /// Write PCI controller registers in PCI configuration space.
243   ///
244   EFI_PCI_IO_PROTOCOL_CONFIG  Write;
245 } EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
246 
247 /**
248   Enables a PCI driver to copy one region of PCI memory space to another region of PCI
249   memory space.
250 
251   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
252   @param  Width                 Signifies the width of the memory operations.
253   @param  DestBarIndex          The BAR index in the standard PCI Configuration header to use as the
254                                 base address for the memory operation to perform.
255   @param  DestOffset            The destination offset within the BAR specified by DestBarIndex to
256                                 start the memory writes for the copy operation.
257   @param  SrcBarIndex           The BAR index in the standard PCI Configuration header to use as the
258                                 base address for the memory operation to perform.
259   @param  SrcOffset             The source offset within the BAR specified by SrcBarIndex to start
260                                 the memory reads for the copy operation.
261   @param  Count                 The number of memory operations to perform. Bytes moved is Width
262                                 size * Count, starting at DestOffset and SrcOffset.
263 
264   @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.
265   @retval EFI_UNSUPPORTED       DestBarIndex not valid for this PCI controller.
266   @retval EFI_UNSUPPORTED       SrcBarIndex not valid for this PCI controller.
267   @retval EFI_UNSUPPORTED       The address range specified by DestOffset, Width, and Count
268                                 is not valid for the PCI BAR specified by DestBarIndex.
269   @retval EFI_UNSUPPORTED       The address range specified by SrcOffset, Width, and Count is
270                                 not valid for the PCI BAR specified by SrcBarIndex.
271   @retval EFI_INVALID_PARAMETER Width is invalid.
272   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
273 
274 **/
275 typedef
276 EFI_STATUS
277 (EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM)(
278   IN EFI_PCI_IO_PROTOCOL              *This,
279   IN     EFI_PCI_IO_PROTOCOL_WIDTH    Width,
280   IN     UINT8                        DestBarIndex,
281   IN     UINT64                       DestOffset,
282   IN     UINT8                        SrcBarIndex,
283   IN     UINT64                       SrcOffset,
284   IN     UINTN                        Count
285   );
286 
287 /**
288   Provides the PCI controller-specific addresses needed to access system memory.
289 
290   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
291   @param  Operation             Indicates if the bus master is going to read or write to system memory.
292   @param  HostAddress           The system memory address to map to the PCI controller.
293   @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes
294                                 that were mapped.
295   @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to
296                                 access the hosts HostAddress.
297   @param  Mapping               A resulting value to pass to Unmap().
298 
299   @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.
300   @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.
301   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
302   @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.
303   @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.
304 
305 **/
306 typedef
307 EFI_STATUS
308 (EFIAPI *EFI_PCI_IO_PROTOCOL_MAP)(
309   IN EFI_PCI_IO_PROTOCOL                *This,
310   IN     EFI_PCI_IO_PROTOCOL_OPERATION  Operation,
311   IN     VOID                           *HostAddress,
312   IN OUT UINTN                          *NumberOfBytes,
313   OUT    EFI_PHYSICAL_ADDRESS           *DeviceAddress,
314   OUT    VOID                           **Mapping
315   );
316 
317 /**
318   Completes the Map() operation and releases any corresponding resources.
319 
320   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
321   @param  Mapping               The mapping value returned from Map().
322 
323   @retval EFI_SUCCESS           The range was unmapped.
324   @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.
325 
326 **/
327 typedef
328 EFI_STATUS
329 (EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP)(
330   IN EFI_PCI_IO_PROTOCOL           *This,
331   IN  VOID                         *Mapping
332   );
333 
334 /**
335   Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
336   mapping.
337 
338   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
339   @param  Type                  This parameter is not used and must be ignored.
340   @param  MemoryType            The type of memory to allocate, EfiBootServicesData or
341                                 EfiRuntimeServicesData.
342   @param  Pages                 The number of pages to allocate.
343   @param  HostAddress           A pointer to store the base system memory address of the
344                                 allocated range.
345   @param  Attributes            The requested bit mask of attributes for the allocated range.
346 
347   @retval EFI_SUCCESS           The requested memory pages were allocated.
348   @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are
349                                 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
350   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
351   @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.
352 
353 **/
354 typedef
355 EFI_STATUS
356 (EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER)(
357   IN EFI_PCI_IO_PROTOCOL           *This,
358   IN  EFI_ALLOCATE_TYPE            Type,
359   IN  EFI_MEMORY_TYPE              MemoryType,
360   IN  UINTN                        Pages,
361   OUT VOID                         **HostAddress,
362   IN  UINT64                       Attributes
363   );
364 
365 /**
366   Frees memory that was allocated with AllocateBuffer().
367 
368   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
369   @param  Pages                 The number of pages to free.
370   @param  HostAddress           The base system memory address of the allocated range.
371 
372   @retval EFI_SUCCESS           The requested memory pages were freed.
373   @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
374                                 was not allocated with AllocateBuffer().
375 
376 **/
377 typedef
378 EFI_STATUS
379 (EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER)(
380   IN EFI_PCI_IO_PROTOCOL           *This,
381   IN  UINTN                        Pages,
382   IN  VOID                         *HostAddress
383   );
384 
385 /**
386   Flushes all PCI posted write transactions from a PCI host bridge to system memory.
387 
388   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
389 
390   @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host
391                                 bridge to system memory.
392   @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI
393                                 host bridge due to a hardware error.
394 
395 **/
396 typedef
397 EFI_STATUS
398 (EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH)(
399   IN EFI_PCI_IO_PROTOCOL  *This
400   );
401 
402 /**
403   Retrieves this PCI controller's current PCI bus number, device number, and function number.
404 
405   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
406   @param  SegmentNumber         The PCI controller's current PCI segment number.
407   @param  BusNumber             The PCI controller's current PCI bus number.
408   @param  DeviceNumber          The PCI controller's current PCI device number.
409   @param  FunctionNumber        The PCI controller's current PCI function number.
410 
411   @retval EFI_SUCCESS           The PCI controller location was returned.
412   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
413 
414 **/
415 typedef
416 EFI_STATUS
417 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION)(
418   IN EFI_PCI_IO_PROTOCOL          *This,
419   OUT UINTN                       *SegmentNumber,
420   OUT UINTN                       *BusNumber,
421   OUT UINTN                       *DeviceNumber,
422   OUT UINTN                       *FunctionNumber
423   );
424 
425 /**
426   Performs an operation on the attributes that this PCI controller supports. The operations include
427   getting the set of supported attributes, retrieving the current attributes, setting the current
428   attributes, enabling attributes, and disabling attributes.
429 
430   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
431   @param  Operation             The operation to perform on the attributes for this PCI controller.
432   @param  Attributes            The mask of attributes that are used for Set, Enable, and Disable
433                                 operations.
434   @param  Result                A pointer to the result mask of attributes that are returned for the Get
435                                 and Supported operations.
436 
437   @retval EFI_SUCCESS           The operation on the PCI controller's attributes was completed.
438   @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
439   @retval EFI_UNSUPPORTED       one or more of the bits set in
440                                 Attributes are not supported by this PCI controller or one of
441                                 its parent bridges when Operation is Set, Enable or Disable.
442 
443 **/
444 typedef
445 EFI_STATUS
446 (EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES)(
447   IN EFI_PCI_IO_PROTOCOL                       *This,
448   IN  EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION  Operation,
449   IN  UINT64                                   Attributes,
450   OUT UINT64                                   *Result OPTIONAL
451   );
452 
453 /**
454   Gets the attributes that this PCI controller supports setting on a BAR using
455   SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
456 
457   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
458   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
459                                 base address for resource range. The legal range for this field is 0..5.
460   @param  Supports              A pointer to the mask of attributes that this PCI controller supports
461                                 setting for this BAR with SetBarAttributes().
462   @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current
463                                 configuration of this BAR of the PCI controller.
464 
465   @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI
466                                 controller supports are returned in Supports. If Resources
467                                 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
468                                 controller is currently using are returned in Resources.
469   @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
470   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
471   @retval EFI_OUT_OF_RESOURCES  There are not enough resources available to allocate
472                                 Resources.
473 
474 **/
475 typedef
476 EFI_STATUS
477 (EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES)(
478   IN EFI_PCI_IO_PROTOCOL             *This,
479   IN  UINT8                          BarIndex,
480   OUT UINT64                         *Supports, OPTIONAL
481   OUT VOID                           **Resources OPTIONAL
482   );
483 
484 /**
485   Sets the attributes for a range of a BAR on a PCI controller.
486 
487   @param  This                  A pointer to the EFI_PCI_IO_PROTOCOL instance.
488   @param  Attributes            The mask of attributes to set for the resource range specified by
489                                 BarIndex, Offset, and Length.
490   @param  BarIndex              The BAR index of the standard PCI Configuration header to use as the
491                                 base address for resource range. The legal range for this field is 0..5.
492   @param  Offset                A pointer to the BAR relative base address of the resource range to be
493                                 modified by the attributes specified by Attributes.
494   @param  Length                A pointer to the length of the resource range to be modified by the
495                                 attributes specified by Attributes.
496 
497   @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource
498                                 range specified by BarIndex, Offset, and Length were
499                                 set on the PCI controller, and the actual resource range is returned
500                                 in Offset and Length.
501   @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
502   @retval EFI_UNSUPPORTED       BarIndex not valid for this PCI controller.
503   @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the
504                                 resource range specified by BarIndex, Offset, and
505                                 Length.
506 
507 **/
508 typedef
509 EFI_STATUS
510 (EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES)(
511   IN EFI_PCI_IO_PROTOCOL              *This,
512   IN     UINT64                       Attributes,
513   IN     UINT8                        BarIndex,
514   IN OUT UINT64                       *Offset,
515   IN OUT UINT64                       *Length
516   );
517 
518 ///
519 /// The EFI_PCI_IO_PROTOCOL provides the basic Memory, I/O, PCI configuration,
520 /// and DMA interfaces used to abstract accesses to PCI controllers.
521 /// There is one EFI_PCI_IO_PROTOCOL instance for each PCI controller on a PCI bus.
522 /// A device driver that wishes to manage a PCI controller in a system will have to
523 /// retrieve the EFI_PCI_IO_PROTOCOL instance that is associated with the PCI controller.
524 ///
525 struct _EFI_PCI_IO_PROTOCOL {
526   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollMem;
527   EFI_PCI_IO_PROTOCOL_POLL_IO_MEM         PollIo;
528   EFI_PCI_IO_PROTOCOL_ACCESS              Mem;
529   EFI_PCI_IO_PROTOCOL_ACCESS              Io;
530   EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS       Pci;
531   EFI_PCI_IO_PROTOCOL_COPY_MEM            CopyMem;
532   EFI_PCI_IO_PROTOCOL_MAP                 Map;
533   EFI_PCI_IO_PROTOCOL_UNMAP               Unmap;
534   EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER     AllocateBuffer;
535   EFI_PCI_IO_PROTOCOL_FREE_BUFFER         FreeBuffer;
536   EFI_PCI_IO_PROTOCOL_FLUSH               Flush;
537   EFI_PCI_IO_PROTOCOL_GET_LOCATION        GetLocation;
538   EFI_PCI_IO_PROTOCOL_ATTRIBUTES          Attributes;
539   EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES  GetBarAttributes;
540   EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES  SetBarAttributes;
541 
542   ///
543   /// The size, in bytes, of the ROM image.
544   ///
545   UINT64                                  RomSize;
546 
547   ///
548   /// A pointer to the in memory copy of the ROM image. The PCI Bus Driver is responsible
549   /// for allocating memory for the ROM image, and copying the contents of the ROM to memory.
550   /// The contents of this buffer are either from the PCI option ROM that can be accessed
551   /// through the ROM BAR of the PCI controller, or it is from a platform-specific location.
552   /// The Attributes() function can be used to determine from which of these two sources
553   /// the RomImage buffer was initialized.
554   ///
555   VOID                                    *RomImage;
556 };
557 
558 extern EFI_GUID gEfiPciIoProtocolGuid;
559 
560 #endif
561