1199767f8SToomas Soome /* 2199767f8SToomas Soome * Copyright (c) 1996, Sujal M. Patel 3199767f8SToomas Soome * All rights reserved. 4199767f8SToomas Soome * 5199767f8SToomas Soome * Redistribution and use in source and binary forms, with or without 6199767f8SToomas Soome * modification, are permitted provided that the following conditions 7199767f8SToomas Soome * are met: 8199767f8SToomas Soome * 1. Redistributions of source code must retain the above copyright 9199767f8SToomas Soome * notice, this list of conditions and the following disclaimer. 10199767f8SToomas Soome * 2. Redistributions in binary form must reproduce the above copyright 11199767f8SToomas Soome * notice, this list of conditions and the following disclaimer in the 12199767f8SToomas Soome * documentation and/or other materials provided with the distribution. 13199767f8SToomas Soome * 3. All advertising materials mentioning features or use of this software 14199767f8SToomas Soome * must display the following acknowledgement: 15199767f8SToomas Soome * This product includes software developed by Sujal M. Patel 16199767f8SToomas Soome * 4. Neither the name of the author nor the names of any co-contributors 17199767f8SToomas Soome * may be used to endorse or promote products derived from this software 18199767f8SToomas Soome * without specific prior written permission. 19199767f8SToomas Soome * 20199767f8SToomas Soome * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21199767f8SToomas Soome * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22199767f8SToomas Soome * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23199767f8SToomas Soome * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24199767f8SToomas Soome * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25199767f8SToomas Soome * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26199767f8SToomas Soome * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27199767f8SToomas Soome * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28199767f8SToomas Soome * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29199767f8SToomas Soome * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30199767f8SToomas Soome * SUCH DAMAGE. 31199767f8SToomas Soome */ 32199767f8SToomas Soome 33199767f8SToomas Soome #ifndef _I386_ISA_PNP_H_ 34199767f8SToomas Soome #define _I386_ISA_PNP_H_ 35199767f8SToomas Soome 36199767f8SToomas Soome /* Maximum Number of PnP Devices. 8 should be plenty */ 37199767f8SToomas Soome #define MAX_PNP_CARDS 8 38199767f8SToomas Soome /* 39199767f8SToomas Soome * the following is the maximum number of PnP Logical devices that 40199767f8SToomas Soome * userconfig can handle. 41199767f8SToomas Soome */ 42199767f8SToomas Soome #define MAX_PNP_LDN 20 43199767f8SToomas Soome 44199767f8SToomas Soome /* Static ports to access PnP state machine */ 45199767f8SToomas Soome #ifndef _KERNEL 46199767f8SToomas Soome /* pnp.h is included from pnpinfo.c. */ 47199767f8SToomas Soome #define _PNP_ADDRESS 0x279 48199767f8SToomas Soome #define _PNP_WRITE_DATA 0xa79 49199767f8SToomas Soome #endif 50199767f8SToomas Soome 51199767f8SToomas Soome /* PnP Registers. Write to ADDRESS and then use WRITE/READ_DATA */ 52199767f8SToomas Soome #define SET_RD_DATA 0x00 53199767f8SToomas Soome /*** 54199767f8SToomas Soome Writing to this location modifies the address of the port used for 55199767f8SToomas Soome reading from the Plug and Play ISA cards. Bits[7:0] become I/O 56199767f8SToomas Soome read port address bits[9:2]. Reads from this register are ignored. 57199767f8SToomas Soome ***/ 58199767f8SToomas Soome 59199767f8SToomas Soome #define SERIAL_ISOLATION 0x01 60199767f8SToomas Soome /*** 61199767f8SToomas Soome A read to this register causes a Plug and Play cards in the Isolation 62199767f8SToomas Soome state to compare one bit of the boards ID. 63199767f8SToomas Soome This register is read only. 64199767f8SToomas Soome ***/ 65199767f8SToomas Soome 66199767f8SToomas Soome #define CONFIG_CONTROL 0x02 67199767f8SToomas Soome /*** 68199767f8SToomas Soome Bit[2] Reset CSN to 0 69199767f8SToomas Soome Bit[1] Return to the Wait for Key state 70199767f8SToomas Soome Bit[0] Reset all logical devices and restore configuration 71199767f8SToomas Soome registers to their power-up values. 72199767f8SToomas Soome 73199767f8SToomas Soome A write to bit[0] of this register performs a reset function on 74199767f8SToomas Soome all logical devices. This resets the contents of configuration 75199767f8SToomas Soome registers to their default state. All card's logical devices 76199767f8SToomas Soome enter their default state and the CSN is preserved. 77*55fea89dSDan Cross 78199767f8SToomas Soome A write to bit[1] of this register causes all cards to enter the 79199767f8SToomas Soome Wait for Key state but all CSNs are preserved and logical devices 80199767f8SToomas Soome are not affected. 81*55fea89dSDan Cross 82199767f8SToomas Soome A write to bit[2] of this register causes all cards to reset their 83199767f8SToomas Soome CSN to zero . 84*55fea89dSDan Cross 85199767f8SToomas Soome This register is write-only. The values are not sticky, that is, 86199767f8SToomas Soome hardware will automatically clear them and there is no need for 87199767f8SToomas Soome software to clear the bits. 88199767f8SToomas Soome ***/ 89199767f8SToomas Soome 90199767f8SToomas Soome #define WAKE 0x03 91199767f8SToomas Soome /*** 92199767f8SToomas Soome A write to this port will cause all cards that have a CSN that 93199767f8SToomas Soome matches the write data[7:0] to go from the Sleep state to the either 94199767f8SToomas Soome the Isolation state if the write data for this command is zero or 95199767f8SToomas Soome the Config state if the write data is not zero. Additionally, the 96*55fea89dSDan Cross pointer to the byte-serial device is reset. This register is 97199767f8SToomas Soome writeonly. 98199767f8SToomas Soome ***/ 99199767f8SToomas Soome 100199767f8SToomas Soome #define RESOURCE_DATA 0x04 101199767f8SToomas Soome /*** 102199767f8SToomas Soome A read from this address reads the next byte of resource information. 103199767f8SToomas Soome The Status register must be polled until bit[0] is set before this 104199767f8SToomas Soome register may be read. This register is read only. 105199767f8SToomas Soome ***/ 106199767f8SToomas Soome 107199767f8SToomas Soome #define STATUS 0x05 108199767f8SToomas Soome /*** 109*55fea89dSDan Cross Bit[0] when set indicates it is okay to read the next data byte 110199767f8SToomas Soome from the Resource Data register. This register is readonly. 111199767f8SToomas Soome ***/ 112199767f8SToomas Soome 113199767f8SToomas Soome #define SET_CSN 0x06 114199767f8SToomas Soome /*** 115199767f8SToomas Soome A write to this port sets a card's CSN. The CSN is a value uniquely 116199767f8SToomas Soome assigned to each ISA card after the serial identification process 117199767f8SToomas Soome so that each card may be individually selected during a Wake[CSN] 118*55fea89dSDan Cross command. This register is read/write. 119199767f8SToomas Soome ***/ 120199767f8SToomas Soome 121199767f8SToomas Soome #define SET_LDN 0x07 122199767f8SToomas Soome /*** 123199767f8SToomas Soome Selects the current logical device. All reads and writes of memory, 124199767f8SToomas Soome I/O, interrupt and DMA configuration information access the registers 125199767f8SToomas Soome of the logical device written here. In addition, the I/O Range 126199767f8SToomas Soome Check and Activate commands operate only on the selected logical 127199767f8SToomas Soome device. This register is read/write. If a card has only 1 logical 128199767f8SToomas Soome device, this location should be a read-only value of 0x00. 129199767f8SToomas Soome ***/ 130199767f8SToomas Soome 131199767f8SToomas Soome /*** addresses 0x08 - 0x1F Card Level Reserved for future use ***/ 132199767f8SToomas Soome /*** addresses 0x20 - 0x2F Card Level, Vendor Defined ***/ 133199767f8SToomas Soome 134199767f8SToomas Soome #define ACTIVATE 0x30 135199767f8SToomas Soome /*** 136199767f8SToomas Soome For each logical device there is one activate register that controls 137199767f8SToomas Soome whether or not the logical device is active on the ISA bus. Bit[0], 138199767f8SToomas Soome if set, activates the logical device. Bits[7:1] are reserved and 139199767f8SToomas Soome must return 0 on reads. This is a read/write register. Before a 140199767f8SToomas Soome logical device is activated, I/O range check must be disabled. 141199767f8SToomas Soome ***/ 142199767f8SToomas Soome 143199767f8SToomas Soome #define IO_RANGE_CHECK 0x31 144199767f8SToomas Soome /*** 145199767f8SToomas Soome This register is used to perform a conflict check on the I/O port 146199767f8SToomas Soome range programmed for use by a logical device. 147199767f8SToomas Soome 148199767f8SToomas Soome Bit[7:2] Reserved and must return 0 on reads 149199767f8SToomas Soome Bit[1] Enable I/O Range check, if set then I/O Range Check 150199767f8SToomas Soome is enabled. I/O range check is only valid when the logical 151199767f8SToomas Soome device is inactive. 152199767f8SToomas Soome 153199767f8SToomas Soome Bit[0], if set, forces the logical device to respond to I/O reads 154199767f8SToomas Soome of the logical device's assigned I/O range with a 0x55 when I/O 155199767f8SToomas Soome range check is in operation. If clear, the logical device drives 156199767f8SToomas Soome 0xAA. This register is read/write. 157199767f8SToomas Soome ***/ 158199767f8SToomas Soome 159199767f8SToomas Soome /*** addr 0x32 - 0x37 Logical Device Control Reserved for future use ***/ 160199767f8SToomas Soome /*** addr 0x38 - 0x3F Logical Device Control Vendor Define ***/ 161199767f8SToomas Soome 162199767f8SToomas Soome #define MEM_CONFIG 0x40 163199767f8SToomas Soome /*** 164199767f8SToomas Soome Four memory resource registers per range, four ranges. 165199767f8SToomas Soome Fill with 0 if no ranges are enabled. 166199767f8SToomas Soome 167199767f8SToomas Soome Offset 0: RW Memory base address bits[23:16] 168199767f8SToomas Soome Offset 1: RW Memory base address bits[15:8] 169199767f8SToomas Soome Offset 2: Memory control 170199767f8SToomas Soome Bit[1] specifies 8/16-bit control. This bit is set to indicate 171199767f8SToomas Soome 16-bit memory, and cleared to indicate 8-bit memory. 172199767f8SToomas Soome Bit[0], if cleared, indicates the next field can be used as a range 173199767f8SToomas Soome length for decode (implies range length and base alignment of memory 174199767f8SToomas Soome descriptor are equal). 175199767f8SToomas Soome Bit[0], if set, indicates the next field is the upper limit for 176199767f8SToomas Soome the address. - - Bit[0] is read-only. 177199767f8SToomas Soome Offset 3: RW upper limit or range len, bits[23:16] 178199767f8SToomas Soome Offset 4: RW upper limit or range len, bits[15:8] 179199767f8SToomas Soome Offset 5-Offset 7: filler, unused. 180199767f8SToomas Soome ***/ 181199767f8SToomas Soome 182199767f8SToomas Soome #define IO_CONFIG_BASE 0x60 183199767f8SToomas Soome /*** 184199767f8SToomas Soome Eight ranges, two bytes per range. 185199767f8SToomas Soome Offset 0: I/O port base address bits[15:8] 186199767f8SToomas Soome Offset 1: I/O port base address bits[7:0] 187199767f8SToomas Soome ***/ 188199767f8SToomas Soome 189199767f8SToomas Soome #define IRQ_CONFIG 0x70 190199767f8SToomas Soome /*** 191199767f8SToomas Soome Two entries, two bytes per entry. 192199767f8SToomas Soome Offset 0: RW interrupt level (1..15, 0=unused). 193199767f8SToomas Soome Offset 1: Bit[1]: level(1:hi, 0:low), 194199767f8SToomas Soome Bit[0]: type (1:level, 0:edge) 195199767f8SToomas Soome byte 1 can be readonly if 1 type of int is used. 196199767f8SToomas Soome ***/ 197199767f8SToomas Soome 198199767f8SToomas Soome #define DRQ_CONFIG 0x74 199199767f8SToomas Soome /*** 200199767f8SToomas Soome Two entries, one byte per entry. Bits[2:0] select 201199767f8SToomas Soome which DMA channel is in use for DMA 0. Zero selects DMA channel 202199767f8SToomas Soome 0, seven selects DMA channel 7. DMA channel 4, the cascade channel 203199767f8SToomas Soome is used to indicate no DMA channel is active. 204199767f8SToomas Soome ***/ 205199767f8SToomas Soome 206199767f8SToomas Soome /*** 32-bit memory accesses are at 0x76 ***/ 207199767f8SToomas Soome 208199767f8SToomas Soome /* Macros to parse Resource IDs */ 209199767f8SToomas Soome #define PNP_RES_TYPE(a) (a >> 7) 210199767f8SToomas Soome #define PNP_SRES_NUM(a) (a >> 3) 211199767f8SToomas Soome #define PNP_SRES_LEN(a) (a & 0x07) 212199767f8SToomas Soome #define PNP_LRES_NUM(a) (a & 0x7f) 213199767f8SToomas Soome 214199767f8SToomas Soome /* Small Resource Item names */ 215199767f8SToomas Soome #define PNP_VERSION 0x1 216199767f8SToomas Soome #define LOG_DEVICE_ID 0x2 217199767f8SToomas Soome #define COMP_DEVICE_ID 0x3 218199767f8SToomas Soome #define IRQ_FORMAT 0x4 219199767f8SToomas Soome #define DMA_FORMAT 0x5 220199767f8SToomas Soome #define START_DEPEND_FUNC 0x6 221199767f8SToomas Soome #define END_DEPEND_FUNC 0x7 222199767f8SToomas Soome #define IO_PORT_DESC 0x8 223199767f8SToomas Soome #define FIXED_IO_PORT_DESC 0x9 224199767f8SToomas Soome #define SM_RES_RESERVED 0xa-0xd 225199767f8SToomas Soome #define SM_VENDOR_DEFINED 0xe 226199767f8SToomas Soome #define END_TAG 0xf 227199767f8SToomas Soome 228199767f8SToomas Soome /* Large Resource Item names */ 229199767f8SToomas Soome #define MEMORY_RANGE_DESC 0x1 230199767f8SToomas Soome #define ID_STRING_ANSI 0x2 231199767f8SToomas Soome #define ID_STRING_UNICODE 0x3 232199767f8SToomas Soome #define LG_VENDOR_DEFINED 0x4 233199767f8SToomas Soome #define _32BIT_MEM_RANGE_DESC 0x5 234199767f8SToomas Soome #define _32BIT_FIXED_LOC_DESC 0x6 235199767f8SToomas Soome #define LG_RES_RESERVED 0x7-0x7f 236199767f8SToomas Soome 237199767f8SToomas Soome /* 238199767f8SToomas Soome * pnp_cinfo contains Configuration Information. They are used 239199767f8SToomas Soome * to communicate to the device driver the actual configuration 240199767f8SToomas Soome * of the device, and also by the userconfig menu to let the 241199767f8SToomas Soome * operating system override any configuration set by the bios. 242199767f8SToomas Soome * 243199767f8SToomas Soome */ 244199767f8SToomas Soome struct pnp_cinfo { 245199767f8SToomas Soome u_int vendor_id; /* board id */ 246199767f8SToomas Soome u_int serial; /* Board's Serial Number */ 247199767f8SToomas Soome u_long flags; /* OS-reserved flags */ 248199767f8SToomas Soome u_char csn; /* assigned Card Select Number */ 249199767f8SToomas Soome u_char ldn; /* Logical Device Number */ 250199767f8SToomas Soome u_char enable; /* pnp enable */ 251199767f8SToomas Soome u_char override; /* override bios parms (in userconfig) */ 252199767f8SToomas Soome u_char irq[2]; /* IRQ Number */ 253199767f8SToomas Soome u_char irq_type[2]; /* IRQ Type */ 254199767f8SToomas Soome u_char drq[2]; 255199767f8SToomas Soome u_short port[8]; /* The Base Address of the Port */ 256199767f8SToomas Soome struct { 257199767f8SToomas Soome u_long base; /* Memory Base Address */ 258199767f8SToomas Soome int control; /* Memory Control Register */ 259199767f8SToomas Soome u_long range; /* Memory Range *OR* Upper Limit */ 260199767f8SToomas Soome } mem[4]; 261199767f8SToomas Soome }; 262199767f8SToomas Soome 263199767f8SToomas Soome #ifdef _KERNEL 264199767f8SToomas Soome 265199767f8SToomas Soome struct pnp_device { 266199767f8SToomas Soome char *pd_name; 267199767f8SToomas Soome char * (*pd_probe ) (u_long csn, u_long vendor_id); 268*55fea89dSDan Cross void (*pd_attach ) (u_long csn, u_long vend_id, char * name, 269199767f8SToomas Soome struct isa_device *dev); 270199767f8SToomas Soome u_long *pd_count; 271199767f8SToomas Soome u_int *imask ; 272199767f8SToomas Soome }; 273199767f8SToomas Soome 274199767f8SToomas Soome struct _pnp_id { 275199767f8SToomas Soome u_long vendor_id; 276199767f8SToomas Soome u_long serial; 277199767f8SToomas Soome u_char checksum; 278199767f8SToomas Soome } ; 279199767f8SToomas Soome 280199767f8SToomas Soome struct pnp_dlist_node { 281199767f8SToomas Soome struct pnp_device *pnp; 282199767f8SToomas Soome struct isa_device dev; 283199767f8SToomas Soome struct pnp_dlist_node *next; 284199767f8SToomas Soome }; 285199767f8SToomas Soome 286199767f8SToomas Soome typedef struct _pnp_id pnp_id; 287199767f8SToomas Soome extern struct pnp_dlist_node *pnp_device_list; 288199767f8SToomas Soome extern pnp_id pnp_devices[MAX_PNP_CARDS]; 289199767f8SToomas Soome extern struct pnp_cinfo pnp_ldn_overrides[MAX_PNP_LDN]; 290199767f8SToomas Soome extern int pnp_overrides_valid; 291199767f8SToomas Soome 292199767f8SToomas Soome /* 293199767f8SToomas Soome * these two functions are for use in drivers 294199767f8SToomas Soome */ 295199767f8SToomas Soome int read_pnp_parms(struct pnp_cinfo *d, int ldn); 296199767f8SToomas Soome int write_pnp_parms(struct pnp_cinfo *d, int ldn); 297199767f8SToomas Soome int enable_pnp_card(void); 298199767f8SToomas Soome 299199767f8SToomas Soome /* 300199767f8SToomas Soome * used by autoconfigure to actually probe and attach drivers 301199767f8SToomas Soome */ 302199767f8SToomas Soome void pnp_configure(void); 303199767f8SToomas Soome 304199767f8SToomas Soome #endif /* _KERNEL */ 305199767f8SToomas Soome 306199767f8SToomas Soome #endif /* !_I386_ISA_PNP_H_ */ 307