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Searched refs:inl (Results 1 – 25 of 47) sorted by path

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/illumos-gate/usr/src/boot/sys/amd64/include/
H A Dcpufunc.h214 inl(u_int port) in inl() function
819 u_int inl(u_int port);
/illumos-gate/usr/src/boot/sys/i386/include/
H A Dcpufunc.h222 inl(u_int port) in inl() function
730 u_int inl(u_int port);
/illumos-gate/usr/src/cmd/mdb/intel/amd64/kmdb/
H A Dkmdb_asmutil.S143 4: inl (%dx)
/illumos-gate/usr/src/grub/grub-0.97/
H A DChangeLog7036 (inl): Likewise.
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A D3c595.c373 vx_connector = (inl(BASE + VX_W3_INTERNAL_CFG) in vxgetlink()
413 j = inl(BASE + VX_W3_INTERNAL_CFG) & ~INTERNAL_CONNECTOR_MASK; in vxsetlink()
H A D3c90x.c402 cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); in a3c90x_reset()
525 while(inl(INF_3C90X.IOAddr + regDnListPtr_l) != 0) in a3c90x_transmit()
912 cfg = inl(INF_3C90X.IOAddr + regInternalConfig_3_l); in a3c90x_probe()
H A Ddavicom.c97 #define eeprom_delay() inl(ee_addr)
317 phy_data=(inl(ee_addr)>>19) & 0x1; in phy_read_1bit()
414 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); in read_eeprom()
482 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); in davicom_reset()
509 outl(inl(ioaddr + CSR6) | 0x00002000, ioaddr + CSR6); in davicom_reset()
530 outl(inl(ioaddr + CSR6) | 0x00000002, ioaddr + CSR6); in davicom_reset()
629 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); in davicom_disable()
632 (volatile unsigned long)inl(ioaddr + CSR8); in davicom_disable()
676 outl(inl(ioaddr + CSR6) & ~0x00002002, ioaddr + CSR6); in davicom_probe()
679 (volatile unsigned long)inl(ioaddr + CSR8); in davicom_probe()
H A De1000.c173 return inl(port); in e1000_io_read()
H A Deepro100.c295 val = inl(ioaddr + SCBCtrlMDI); in mdio_write()
316 val = inl(ioaddr + SCBCtrlMDI); in mdio_read()
H A Depic100.c478 retval = (retval << 1) | ((inl(eectl) & EE_DATA_READ) ? 1 : 0); in read_eeprom()
502 if ((inl(mmctl) & MII_READOP) == 0) in mii_read()
H A Dio.h229 #define inl(port) \ macro
H A Dnatsemi.c295 u32 chip_config = inl(ioaddr + ChipConfig); in natsemi_probe()
304 nic_name, (int)inl(ioaddr + 0x84), advertising); in natsemi_probe()
312 SavedClkRun = inl(ioaddr + ClkRun); in natsemi_probe()
333 #define eeprom_delay(ee_addr) inl(ee_addr)
372 retval |= (inl(ee_addr) & EE_DataOut) ? 1 << i : 0; in eeprom_read()
391 return inl(ioaddr + 0x80 + (location<<2)) & 0xffff; in mdio_read()
462 if (inl(ioaddr + SiliconRev) == 0x302) { in natsemi_reset()
515 inl(ioaddr + TxRingPtr)); in natsemi_init_txd()
549 inl(ioaddr + RxRingPtr)); in natsemi_init_rxd()
573 int duplex = inl(ioaddr + ChipConfig) & 0x20000000 ? 1 : 0; in natsemi_check_duplex()
[all …]
H A Dpci_io.c48 *value = inl(0xCFC); in pcibios_read_config_dword()
H A Dpcnet32.c350 return (inl(addr + PCNET32_DWIO_RDP) & 0xffff); in pcnet32_dwio_read_csr()
362 return (inl(addr + PCNET32_DWIO_BDP) & 0xffff); in pcnet32_dwio_read_bcr()
373 return (inl(addr + PCNET32_DWIO_RAP) & 0xffff); in pcnet32_dwio_read_rap()
383 inl(addr + PCNET32_DWIO_RESET); in pcnet32_dwio_reset()
389 return ((inl(addr + PCNET32_DWIO_RAP) & 0xffff) == 88); in pcnet32_dwio_check()
H A Drtl8139.c249 #define eeprom_delay() inl(ee_addr)
406 txstatus = inl(nic->ioaddr+ TxStatus0 + cur_tx*4); in rtl_transmit()
H A Dsis900.c210 if(inl(ee_addr) & EEGNT) { in sis96x_get_mac_addr()
282 rfcrSave = inl(rfcr + ioaddr); in sis635_get_mac_addr()
431 #define eeprom_delay() inl(ee_addr)
486 #define sis900_mdio_delay() inl(mdio_addr)
612 outl(RxENA| inl(ioaddr + cr), ioaddr + cr); in sis900_init()
663 rfcrSave = inl(rfcr + ioaddr); in sis900_init_rxfilter()
678 i, inl(ioaddr + rfdr)); in sis900_init_rxfilter()
706 inl(ioaddr + txdp)); in sis900_init_txd()
740 inl(ioaddr + rxdp)); in sis900_init_rxd()
803 if( inl(ioaddr + cfg) & EDB_MASTER_EN ) { in sis900_check_mode()
[all …]
H A Dsundance.c412 outl(inl(BASE + ASICCtrl) | 0x0c, BASE + ASICCtrl); in sundance_reset()
440 sdc->nic_name, (int) inl(BASE + RxStatus), in sundance_reset()
441 (int) inw(BASE + TxStatus), (int) inl(BASE + MACCtrl0), in sundance_reset()
680 if (inl(BASE + ASICCtrl) & 0x80) { in sundance_probe()
705 dprintf(("ASIC Control is %x.\n", inl(BASE + ASICCtrl))); in sundance_probe()
707 dprintf(("ASIC Control is now %x.\n", inl(BASE + ASICCtrl))); in sundance_probe()
H A Dtlan.c344 data = inl(BASE + TLAN_HOST_CMD); in TLan_ResetAdapter()
352 data = inl(BASE + TLAN_HOST_CMD); in TLan_ResetAdapter()
904 data = inl(BASE + TLAN_HOST_CMD);
H A Dtlan.h419 return (inl(base_addr + TLAN_DIO_DATA)); in TLan_DioRead32()
H A Dtulip.c361 #define eeprom_delay() inl(ee_addr)
549 #define mdio_delay() inl(mdio_addr)
580 inl(ioaddr + 0xA0); in mdio_read()
581 inl(ioaddr + 0xA0); in mdio_read()
593 return inl(ioaddr + 0xD0); in mdio_read()
935 int csr6 = inl(ioaddr + CSR6) & ~0x00D5; in set_rx_mode()
1075 u32 csr6 = inl(ioaddr + CSR6); in tulip_transmit()
1699 u32 phy_reg = inl(ioaddr + 0xB8); in pnic_do_nway()
1884 inl(ioaddr + CSR12)); in select_media()
1922 int csr12 = inl(ioaddr + CSR12); in select_media()
[all …]
H A Dw89c840.c161 #define readl inl
/illumos-gate/usr/src/lib/libkmf/libkmf/common/
H A Dpem_encode.c140 unsigned char *in, int inl) in PEM_EncodeUpdate() argument
146 if (inl == 0) in PEM_EncodeUpdate()
148 if ((ctx->num+inl) < ctx->length) { in PEM_EncodeUpdate()
150 ctx->num += inl; in PEM_EncodeUpdate()
157 inl -= i; in PEM_EncodeUpdate()
166 while (inl >= ctx->length) { in PEM_EncodeUpdate()
169 inl -= ctx->length; in PEM_EncodeUpdate()
176 if (inl != 0) in PEM_EncodeUpdate()
178 ctx->num = inl; in PEM_EncodeUpdate()
321 unsigned char *in, int inl) in PEM_DecodeUpdate() argument
[all …]
/illumos-gate/usr/src/man/man9f/
H A DMakefile938 inl.9f \
1749 inl.9f := LINKSRC = inb.9f
/illumos-gate/usr/src/pkg/manifests/
H A Dsystem-kernel.man9f.inc701 link path=usr/share/man/man9f/inl.9f target=inb.9f
/illumos-gate/usr/src/test/bhyve-tests/tests/common/
H A Dpayload_utils.S58 ENTRY(inl) function
60 inl (%dx)
62 SET_SIZE(inl)

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