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Searched refs:u32 (Results 76 – 100 of 364) sorted by relevance

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/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_82598.c257 u32 regval; in ixgbe_start_hw_82598()
258 u32 i; in ixgbe_start_hw_82598()
414 u32 reg; in ixgbe_fc_enable_82598()
563 u32 i; in ixgbe_start_mac_link_82598()
648 u32 i; in ixgbe_check_mac_link_82598()
815 u32 ctrl; in ixgbe_reset_hw_82598()
817 u32 i; in ixgbe_reset_hw_82598()
818 u32 autoc; in ixgbe_reset_hw_82598()
1010 u32 bits; in ixgbe_set_vfta_82598()
1135 u32 i; in ixgbe_read_i2c_phy_82598()
[all …]
H A Dixgbe_api.c529 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg()
912 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, in ixgbe_set_rar()
913 u32 enable_addr) in ixgbe_set_rar()
938 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) in ixgbe_set_vmdq()
962 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) in ixgbe_clear_vmdq()
1099 u32 *vfta_delta, u32 vfta, bool vlvf_bypass) in ixgbe_set_vlvf()
1240 u32 device_type, u32 *phy_data) in ixgbe_read_iosf_sb_reg()
1256 u32 device_type, u32 phy_data) in ixgbe_write_iosf_sb_reg()
1347 s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status) in ixgbe_bypass_rw()
1365 bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg) in ixgbe_bypass_valid_rd()
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H A Dixgbe_common.c462 u32 i; in ixgbe_start_hw_gen2()
1614 u32 i; in ixgbe_read_eerd_buffer_generic()
1787 u32 i; in ixgbe_poll_eerd_eewr_done()
1824 u32 i; in ixgbe_acquire_eeprom()
1878 u32 i; in ixgbe_get_eeprom_semaphore()
2054 u32 i; in ixgbe_shift_out_eeprom_bits()
2108 u32 i; in ixgbe_shift_in_eeprom_bits()
2479 u32 i; in ixgbe_init_rx_addrs_generic()
2590 u32 i; in ixgbe_update_uc_addr_list_generic()
2733 u32 i; in ixgbe_update_mc_addr_list_generic()
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H A Dixgbe_vf.c101 u32 vfsrrctl; in ixgbe_virt_clr_reg()
254 u32 reg_val; in ixgbe_stop_adapter_vf()
352 u32 msgbuf[3]; in ixgbe_set_rar_vf()
391 u32 vector; in ixgbe_update_mc_addr_list_vf()
392 u32 cnt, i; in ixgbe_update_mc_addr_list_vf()
393 u32 vmdq; in ixgbe_update_mc_addr_list_vf()
432 u32 msgbuf[2]; in ixgbevf_update_xcast_mode()
473 u32 msgbuf[2]; in ixgbe_set_vfta_vf()
588 u32 links_reg; in ixgbe_check_mac_link_vf()
707 u32 msg[3]; in ixgbevf_negotiate_api_version()
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H A Dixgbe_82598.h39 u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw);
43 s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
44 s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
46 s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
47 s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
54 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_82599.c121 u32 esdp; in ixgbe_init_phy_ops_82599()
421 u32 autoc = 0; in ixgbe_get_link_capabilities_82599()
617 u32 i; in ixgbe_start_mac_link_82599()
903 u32 i; in ixgbe_setup_mac_link_82599()
1037 u32 ctrl = 0; in ixgbe_reset_hw_82599()
1235 u32 fdircmd; in ixgbe_reinit_fdir_tables_82599()
1548 u32 fdircmd; in ixgbe_fdir_add_signature_filter_82599()
1621 u32 i = 0; in ixgbe_atr_compute_perfect_hash_82599()
1970 u32 fdircmd; in ixgbe_fdir_erase_perfect_filter_82599()
2538 u32 esdp; in ixgbe_read_i2c_byte_82599()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/
H A Decore_init.h27 u32 size;
31 u32 page_size;
41 u32 start_line;
83 u32 mask_addr;
84 u32 sts_clr_addr;
87 u32 e1; /* 57710 */
88 u32 e1h; /* 57711 */
89 u32 e2; /* 57712 */
180 u32 addr;
181 u32 bits;
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/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dcudbg.h335 u32 signature;
342 u32 hdr_len;
343 u32 data_len;
344 u32 hdr_flags;
345 u32 sec_seq_no;
346 u32 reserved[22];
354 u32 memtype; /* which memory (EDC0, EDC1, MC) */
356 u32 size; /* size of log */
399 u32 verbose:1; /* Turn on verbose print */
406 u32 info:1; /* Show just the info, Dont
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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_roce.h207 u32 last_tid;
211 u32 num_qps;
212 u32 num_mrs;
213 u32 num_srqs;
255 u32 dest_qp;
263 u32 ack_timeout;
276 u32 sq_psn;
287 u32 rq_psn;
295 u32 cq_prod;
349 u32 tcp_cid;
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H A Decore_ooo.h51 u32 rx_buffer_size;
69 u32 head_idx;
70 u32 num_of_cqes;
80 u32 cur_isles_number;
81 u32 max_isles_number;
82 u32 gen_isles_number;
99 u32 cid);
123 u32 cid,
129 u32 cid,
135 u32 cid,
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H A Decore_hw.h135 u32 ecore_ptt_get_hw_addr(struct ecore_hwfn *p_hwfn,
146 u32 ecore_ptt_get_bar_addr(struct ecore_ptt *p_ptt);
157 u32 new_hw_addr);
180 u32 hw_addr,
181 u32 val);
191 u32 ecore_rd(struct ecore_hwfn *p_hwfn,
193 u32 hw_addr);
208 u32 hw_addr,
223 u32 hw_addr,
271 u32 ecore_vfid_to_concrete(struct ecore_hwfn *p_hwfn, u8 vfid);
H A Decore_dev_api.h44 u32 wk_info;
45 u32 wk_details;
46 u32 wk_pkt_len;
59 u32 dp_module,
244 u32 epoch;
288 u32 reg_idx,
289 u32 pattern_size,
290 u32 crc);
471 u32 flags);
489 u32 flags);
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/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_hw.h122 #define __le32 u32
357 void (*write_vfta)(struct igc_hw *, u32, u32);
359 int (*rar_set)(struct igc_hw *, u8*, u32);
429 u32 mc_filter_type;
441 u32 mta_shadow[MAX_MTA_REG];
449 u32 max_frame_size;
458 u32 addr;
459 u32 id;
460 u32 reset_delay_us; /* in usec */
461 u32 revision;
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H A Digc_mac.h15 void igc_null_update_mc(struct igc_hw *hw, u8 *h, u32 a);
16 void igc_null_write_vfta(struct igc_hw *hw, u32 a, u32 b);
17 int igc_null_rar_set(struct igc_hw *hw, u8 *h, u32 a);
29 u8 *mc_addr_list, u32 mc_addr_count);
30 int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index);
35 u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr);
43 void igc_set_pcie_no_snoop_generic(struct igc_hw *hw, u32 no_snoop);
44 void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value);
H A Digc_mac.c91 u32 IGC_UNUSEDARG a, u32 IGC_UNUSEDARG b) in igc_null_write_vfta()
132 u32 offset; in igc_clear_vfta_generic()
170 u32 i; in igc_init_rx_addrs_generic()
200 u32 i; in igc_check_alt_mac_addr_generic()
271 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) | in igc_rar_set_generic()
272 ((u32) addr[2] << 16) | ((u32) addr[3] << 24)); in igc_rar_set_generic()
274 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8)); in igc_rar_set_generic()
582 u32 tctl; in igc_config_collision_dist_generic()
644 u32 ctrl; in igc_force_mac_fc_generic()
922 u32 swsm; in igc_get_hw_semaphore_generic()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A Dhw_dump.h184 u32 time_stamp;
185 u32 diag_ver;
210 u32 reserved;
211 u32 error;
219 u32 data[2];
231 u32 read_size;
239 u32 array_size;
243 u32 addr;
244 u32 size;
249 u32 addr;
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/illumos-gate/usr/src/uts/common/io/chxge/com/
H A Dmc5.c178 static inline void dbgi_wr_addr3(adapter_t *adapter, u32 v1, u32 v2, u32 v3) in dbgi_wr_addr3()
185 static inline void dbgi_wr_data3(adapter_t *adapter, u32 v1, u32 v2, u32 v3) in dbgi_wr_data3()
192 static inline void dbgi_rd_rsp3(adapter_t *adapter, u32 *v1, u32 *v2, u32 *v3) in dbgi_rd_rsp3()
204 static int mc5_write(adapter_t *adapter, u32 addr_lo, u32 cmd) in mc5_write()
215 u32 data_array_base, u32 write_cmd) in init_mask_data_array()
404 u32 cfg; in t1_mc5_init()
464 u32 read_cmd; in t1_read_mc5_range()
501 u32 mask = MC5_INT_MASK; in t1_mc5_intr_enable()
670 const u32 *pii = (const u32 *)pi; in mc5_cmp()
671 const u32 *pjj = (const u32 *)pj; in mc5_cmp()
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H A Dtp.c43 static inline u32 pm_num_pages(u32 size, u32 pg_size) in pm_num_pages()
45 u32 num = size / pg_size; in pm_num_pages()
52 u32 num; in tp_pm_configure()
74 u32 mm_base = (cm_size >> 1); in tp_cm_configure()
75 u32 mm_sub_size = (cm_size >> 5); in tp_cm_configure()
105 u32 tps = t1_tp_ticks_per_sec(adapter, tp_clk); in tp_set_tcp_time_params()
106 u32 tp_scnt; in tp_set_tcp_time_params()
134 u32 val; in t1_tp_set_coalescing_size()
161 u32 *data = (u32 *)tps; in t1_tp_get_mib_statistics()
175 u32 val; in tp_init()
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/illumos-gate/usr/src/tools/smatch/src/validation/optim/
H A Dmuldiv-minus-one.c1 typedef unsigned int u32; typedef
4 u32 umulm1(u32 a) { return a * (u32) -1; } in umulm1()
6 u32 udivm1(u32 a) { return a / (u32) -1; } in udivm1()
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_prototype.h102 u32 time, u32 interval);
426 u32 reg_addr0, u32 *reg_val0,
427 u32 reg_addr1, u32 *reg_val1);
429 u32 addr, u32 dw_count, void *buffer);
431 u32 reg_addr0, u32 reg_val0,
432 u32 reg_addr1, u32 reg_val1);
569 u32 reg_addr, u32 *reg_val,
573 u32 reg_addr, u32 reg_val,
580 u32 reg_addr, u32 reg_val,
586 u32 reg_addr, u32 *reg_val,
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_mac.h44 void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);
45 void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);
46 int e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);
47 s32 e1000_null_set_obff_timer(struct e1000_hw *hw, u32 a);
72 u8 *mc_addr_list, u32 mc_addr_count);
79 s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
80 u32 offset, u8 data);
82 u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
91 void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
93 void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
H A De1000_api.h54 s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
63 void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
72 int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
73 u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
75 u32 mc_addr_count);
87 s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
88 s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
89 s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,
101 s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size);
106 s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
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H A De1000_manage.c46 u32 i; in e1000_calculate_checksum()
72 u32 hicr; in e1000_mng_enable_host_if_generic()
132 u32 *buffer = (u32 *)&hw->mng_cookie; in e1000_enable_tx_pkt_filtering_generic()
133 u32 offset; in e1000_enable_tx_pkt_filtering_generic()
204 *((u32 *) hdr + i)); in e1000_mng_write_cmd_header_generic()
228 u32 data = 0; in e1000_mng_host_if_write_generic()
300 u32 hicr; in e1000_mng_write_dhcp_info_generic()
342 u32 manc; in e1000_enable_mng_pass_thru()
343 u32 fwsm, factps; in e1000_enable_mng_pass_thru()
396 u32 hicr, i; in e1000_host_interface_command()
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H A De1000_mac.c141 u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b) in e1000_null_write_vfta()
281 u32 reg; in e1000_set_lan_id_multi_port_pcie()
372 u32 i; in e1000_init_rx_addrs_generic()
402 u32 i; in e1000_check_alt_mac_addr_generic()
487 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) | in e1000_rar_set_generic()
490 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8)); in e1000_rar_set_generic()
777 u32 rxcw; in e1000_check_for_fiber_link_generic()
778 u32 ctrl; in e1000_check_for_fiber_link_generic()
844 u32 rxcw; in e1000_check_for_serdes_link_generic()
1954 u32 i; in e1000_blink_led_generic()
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/illumos-gate/usr/src/uts/common/kiconv/kiconv_ja/
H A Dkiconv_ja.c241 if (u32 <= 0x7f) { in write_unicode()
248 } else if ((u32 >= 0xd800) && (u32 <= 0xdfff)) { in write_unicode()
351 KICONV_JA_PUTU(u32); in _do_kiconv_fr_eucjp()
364 KICONV_JA_PUTU(u32); in _do_kiconv_fr_eucjp()
373 KICONV_JA_PUTU(u32); in _do_kiconv_fr_eucjp()
404 u32 = ic1; in _do_kiconv_fr_eucjp()
405 KICONV_JA_PUTU(u32); in _do_kiconv_fr_eucjp()
546 KICONV_JA_PUTU(u32); in _do_kiconvstr_fr_eucjp()
563 KICONV_JA_PUTU(u32); in _do_kiconvstr_fr_eucjp()
636 u32 = ic1; in _do_kiconvstr_fr_eucjp()
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