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/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Dvirtchnl.h195 u32 major;
196 u32 minor;
272 u32 vf_cap_flags;
273 u32 rss_key_size;
274 u32 rss_lut_size;
314 u32 pad1;
317 u32 pad2;
340 u32 pad;
397 u32 rx_queues;
398 u32 tx_queues;
[all …]
H A Di40e_adminq.h65 u32 head;
66 u32 tail;
67 u32 len;
68 u32 bah;
69 u32 bal;
98 u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
105 u32 fw_build; /* firmware build number */
154 if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) in i40e_aq_rc_to_posix()
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/
H A Dmfw_hsi.h56 u32 signature; /* Help to identify that the trace is valid */
57 u32 size; /* the size of the trace buffer in bytes*/
58 u32 curr_level; /* 2 - all will be written to the buffer
62 u32 modules_mask[2];/* a bit per module, 1 means write it, 0 means mask it */
65 u32 trace_prod; /* The next trace will be written to this offset */
66 …u32 trace_oldest; /* The oldest valid trace starts at this offset (usually very close after the cu…
/illumos-gate/usr/src/grub/grub-0.97/netboot/
H A Deepro100.c108 typedef unsigned int u32; typedef
211 u32 tx_late_colls;
212 u32 tx_underruns;
214 u32 tx_deferred;
215 u32 tx_one_colls;
219 u32 rx_crc_errs;
220 u32 rx_align_errs;
223 u32 rx_colls_errs;
224 u32 rx_runt_errs;
225 u32 done_marker;
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H A Dns83820.c361 u32 cmdsts;
366 u32 link;
367 u32 bufptr;
368 u32 cmdsts;
399 u32 cur_rx;
400 u32 *descs;
591 u32 data; in ns83820_getmac()
607 u32 val; in ns83820_set_multicast()
619 u32 enable, u32 done, u32 fail) in ns83820_run_bist()
623 u32 status; in ns83820_run_bist()
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/illumos-gate/usr/src/uts/common/io/chxge/com/
H A Dmv88e1xxx.c43 u32 val; in mdio_set_bit()
54 u32 val; in mdio_clear_bit()
74 u32 ctl; in mv88e1xxx_reset()
97 u32 elmer; in mv88e1xxx_interrupt_enable()
116 u32 elmer; in mv88e1xxx_interrupt_disable()
130 u32 elmer; in mv88e1xxx_interrupt_clear()
153 u32 ctl; in mv88e1xxx_set_speed_duplex()
176 u32 data32; in mv88e1xxx_crossover_set()
187 u32 ctl; in mv88e1xxx_autoneg_enable()
200 u32 ctl; in mv88e1xxx_autoneg_disable()
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H A Dvsc7321.c50 u32 addr;
51 u32 data;
57 u32 mac_base;
58 u32 index;
59 u32 version;
64 static void vsc_read(adapter_t *adapter, u32 addr, u32 *val) in vsc_read()
82 static void vsc_write(adapter_t *adapter, u32 addr, u32 data) in vsc_write()
91 u32 val; in vsc7321_full_reset()
241 u32 val; in vsc7321_mac_create()
377 u32 val; in mac_enable()
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H A Dcommon.h236 int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp);
237 int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
238 int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
239 int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
240 int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity,
253 int t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
H A Dpm3393.c123 u32 elmer; in pm3393_interrupt_enable()
125 u32 pl_intr; in pm3393_interrupt_enable()
173 u32 elmer; in pm3393_interrupt_disable()
212 u32 elmer; in pm3393_interrupt_clear()
214 u32 val32; in pm3393_interrupt_clear()
451 u32 crc = (u32)~0; in calc_crc()
643 lo = ((u32) ma[1] << 8) | (u32) ma[0]; in pm3393_macaddress_set()
644 mid = ((u32) ma[3] << 8) | (u32) ma[2]; in pm3393_macaddress_set()
645 hi = ((u32) ma[5] << 8) | (u32) ma[4]; in pm3393_macaddress_set()
828 u32 val; in pm3393_mac_reset()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/include/vm/
H A Dvfpf_if.h42 u32 resp_msg_offset;
97 u32 rss_flags;
109 u32 rss_key[10];
114 u32 rsc_ipv4_state;
128 u32 chip_num;
130 u32 pf_cap;
240 u32 flags;
253 u32 flags;
275 u32 rx_mask;
321 u32 req_sz;
[all …]
H A Dhw_channel.h123 u32 resp_msg_offset;
178 u32 rss_flags;
193 u32 rss_key[T_ETH_RSS_KEY]; /* hash values */
200 u32 chip_num;
201 u32 pf_cap;
241 u32 pf_link_supported;
263 u32 flags;
264 u32 padding [2];
311 u32 flags; /* VFPF_QUEUE_FLG_X flags */
326 u32 flags;
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/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_vf.c263 u32 ctrl, msgbuf[3]; in e1000_reset_hw_vf()
324 u32 E1000_UNUSEDARG index) in e1000_rar_set_vf()
327 u32 msgbuf[3]; in e1000_rar_set_vf()
359 u32 hash_value, hash_mask; in e1000_hash_mc_addr_vf()
381 u32 *msg, u16 size) in e1000_write_msg_read_ack()
384 u32 retmsg[E1000_VFMAILBOX_SIZE]; in e1000_write_msg_read_ack()
405 u32 hash_value; in e1000_update_mc_addr_list_vf()
406 u32 i; in e1000_update_mc_addr_list_vf()
447 u32 msgbuf[2]; in e1000_vfta_set_vf()
464 u32 msgbuf[2]; in e1000_rlpml_set_vf()
[all …]
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dfastlz.h62 int write_to_buf(void *, u32, u32 *, void *, u32);
63 int read_from_buf(void *, u32, u32 *, void *, u32);
H A Dcudbg_lib.c89 u32 t = *(u32 *)a; in u32_swap()
91 *(u32 *)a = *(u32 *)b; in u32_swap()
645 u32 size; in collect_rss()
683 u32 size; in collect_sw_state()
719 u32 size; in collect_ddp_stats()
803 u32 size; in collect_ulprx_la()
836 u32 size; in collect_cpl_stats()
2227 (u32 *)((u32 *)scratch_buff.data + in read_cim_obq()
2350 (u32 *)((u32 *)scratch_buff.data + in read_cim_ibq()
2943 u32 i; in dump_up_cim()
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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Decore_dev.c96 u32 val; in ecore_hw_bar_size()
130 u32 i; in ecore_init_dp()
239 u32 flags; in ecore_get_pq_flags()
2364 u32 addr, u32 expected_val) in ecore_verify_reg_val()
2965 u32 *p_resc_num, u32 *p_resc_start) in ecore_hw_get_dflt_resc()
4294 u32 i; in ecore_chain_alloc_next_ptr()
4560 u32 high, u32 low, u32 *p_entry_num) in ecore_llh_add_mac_filter_e5()
4684 u32 high, u32 low, u32 *p_entry_num) in ecore_llh_add_protocol_filter_bb_ah()
4725 u32 high, u32 low, u32 *p_entry_num) in ecore_llh_add_protocol_filter_e5()
4826 u32 high, u32 low, u32 *p_entry_num) in ecore_llh_remove_protocol_filter_bb_ah()
[all …]
H A Decore_dcbx_api.h78 u32 peer_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];
79 u32 peer_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];
82 u32 tx_interval;
83 u32 max_credit;
87 u32 local_chassis_id[ECORE_LLDP_CHASSIS_ID_STAT_LEN];
88 u32 local_port_id[ECORE_LLDP_PORT_ID_STAT_LEN];
157 u32 err;
186 u32 override_flags;
189 u32 ver_num;
H A Decore_fcoe_api.h46 u32 icid;
47 u32 fw_cid;
91 u32 fcoe_silent_drop_pkt_cmdq_full_cnt;
92 u32 fcoe_silent_drop_pkt_rq_full_cnt;
93 u32 fcoe_silent_drop_pkt_crc_error_cnt;
94 u32 fcoe_silent_drop_pkt_task_invalid_cnt;
95 u32 fcoe_silent_drop_total_pkt_cnt;
110 u32 cid);
H A Decore_sriov.h85 u32 vf_addr_lo;
86 u32 vf_addr_hi;
150 u32 concrete_fid;
213 u32 mbx_msg_size;
216 u32 mbx_reply_size;
219 u32 bulletins_size;
311 u32 *disabled_vfs);
348 static OSAL_INLINE u32 ecore_crc32(u32 crc, u8 *ptr, u32 length) {return 0;} in ecore_crc32()
349 static OSAL_INLINE bool ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *disabled_vfs) {return… in ecore_iov_mark_vf_flr()
H A Decore_int_api.h58 u32 sb_ack; /* Last given ack */
72 u32 igu_prod;
73 u32 igu_cons;
91 u32 prod = 0; in ecore_sb_update_sb_idx()
148 int size, u32 *data) in __internal_ram_wr()
152 int size, u32 *data) in __internal_ram_wr()
159 DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]); in __internal_ram_wr()
165 int size, u32 *data) in internal_ram_wr()
171 int size, u32 *data) in internal_ram_wr()
200 u32 pi_index,
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/mcp/
H A Dcode_swap_def.h20 u32 nvm_offset;
21 u32 image_size;
22 u32 stat_times_loaded;
23 u32 stat_times_load_not_required;
24 u32 stat_times_load_failed;
25 u32 stored_gp_val;
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.c7 int mtype, u32 maddr, u32 len, in t4_memory_rw()
29 u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2]; in hash_mac_addr()
30 u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5]; in hash_mac_addr()
/illumos-gate/usr/src/uts/common/io/qede/
H A Dqede_osal.c531 u32
532 LOG2(u32 v) in LOG2()
534 u32 r = 0; in LOG2()
551 qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val) in qede_osal_pci_write32()
574 u32
579 u32 val = 0; in qede_osal_pci_read32()
590 qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val) in qede_osal_pci_bar2_write32()
600 u32
618 u32 *
678 u32
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/illumos-gate/usr/src/uts/common/io/ntxn/
H A Dunm_nic_ctx.c116 u32 done = 0, timeout = 0; in netxen_api_lock()
143 u32 val; in netxen_api_unlock()
150 static u32
172 static u32
174 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd) in netxen_issue_cmd()
176 u32 rsp; in netxen_issue_cmd()
177 u32 signature = 0; in netxen_issue_cmd()
260 u32 cap, reg; in nx_fw_cmd_create_rx_ctx()
334 (u32)(phys_addr >> 32), in nx_fw_cmd_create_rx_ctx()
403 u32 temp; in nx_fw_cmd_create_tx_ctx()
[all …]
/illumos-gate/usr/src/uts/common/io/igc/core/
H A Digc_phy.h11 s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);
14 s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);
24 s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,
25 u32 usec_interval, bool *success);
26 enum igc_phy_type igc_get_phy_type_from_id(u32 phy_id);
32 s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data);
33 s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data);
39 s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data);
40 s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data);
/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_vf.h124 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);
125 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);
131 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
132 u32 enable_addr);
133 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
135 u32 mc_addr_count, ixgbe_mc_addr_itr,
138 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

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