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/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_api.h53 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
54 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
56 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
61 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
69 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
126 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
127 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
128 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
134 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
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H A Dixgbe_common.h55 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
56 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
57 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
58 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
109 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
110 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
115 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
118 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
120 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
144 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
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H A Dixgbe_x550.h40 s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
41 s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
42 s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
44 s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);
50 s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw);
71 s32 ixgbe_get_phy_token(struct ixgbe_hw *);
72 s32 ixgbe_put_phy_token(struct ixgbe_hw *);
86 s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw);
88 s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw);
89 s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw);
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H A Dixgbe_phy.h160 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
163 s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
164 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
165 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
174 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
181 s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
184 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
187 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
193 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
195 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);
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H A Dixgbe_x540.h41 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
46 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);
47 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);
50 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);
51 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
57 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw);
59 s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw);
60 s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);
62 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
66 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
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H A Dixgbe_api.c88 s32 status; in ixgbe_init_shared_code()
132 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) in ixgbe_set_mac_type()
134 s32 ret_val = IXGBE_SUCCESS; in ixgbe_set_mac_type()
232 s32 ixgbe_init_hw(struct ixgbe_hw *hw) in ixgbe_init_hw()
245 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) in ixgbe_reset_hw()
261 s32 ixgbe_start_hw(struct ixgbe_hw *hw) in ixgbe_start_hw()
475 s32 status = IXGBE_SUCCESS; in ixgbe_identify_phy()
489 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) in ixgbe_reset_phy()
491 s32 status = IXGBE_SUCCESS; in ixgbe_reset_phy()
512 s32 status = IXGBE_SUCCESS; in ixgbe_get_phy_firmware_version()
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H A Dixgbe_82599.h39 s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
47 s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
50 s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
54 s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);
56 s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);
57 s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
58 s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
59 s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw);
60 s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw);
61 s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);
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H A Dixgbe_mbx.c117 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_read_posted_mbx()
147 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_write_posted_mbx()
207 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_bit_vf()
226 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_msg_vf()
248 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_ack_vf()
270 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_rst_vf()
292 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_obtain_mbx_lock_vf()
318 s32 ret_val; in ixgbe_write_mbx_vf()
417 static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) in ixgbe_check_for_bit_pf()
558 s32 ret_val; in ixgbe_write_mbx_pf()
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H A Dixgbe_dcb.h140 s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *);
143 s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int);
144 s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *,
148 s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *);
149 s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *);
152 s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *);
153 s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
157 s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *,
159 s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *,
161 s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *,
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H A Dixgbe_vf.h119 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
120 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);
121 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);
122 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);
123 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw);
126 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);
133 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
134 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
137 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode);
138 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
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H A Dixgbe_82598.h40 s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw);
41 s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw);
43 s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
44 s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
46 s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);
47 s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);
48 s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
51 s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw);
54 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
/illumos-gate/usr/src/uts/common/io/e1000api/
H A De1000_phy.h49 s32 e1000_check_polarity_m88(struct e1000_hw *hw);
50 s32 e1000_check_polarity_igp(struct e1000_hw *hw);
51 s32 e1000_check_polarity_ife(struct e1000_hw *hw);
53 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
54 s32 e1000_copper_link_autoneg(struct e1000_hw *hw);
61 s32 e1000_get_cable_length_m88(struct e1000_hw *hw);
65 s32 e1000_get_phy_id(struct e1000_hw *hw);
66 s32 e1000_get_phy_info_igp(struct e1000_hw *hw);
67 s32 e1000_get_phy_info_m88(struct e1000_hw *hw);
68 s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
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H A De1000_api.h55 s32 e1000_set_mac_type(struct e1000_hw *hw);
66 s32 e1000_reset_hw(struct e1000_hw *hw);
67 s32 e1000_init_hw(struct e1000_hw *hw);
68 s32 e1000_setup_link(struct e1000_hw *hw);
76 s32 e1000_setup_led(struct e1000_hw *hw);
77 s32 e1000_cleanup_led(struct e1000_hw *hw);
79 s32 e1000_blink_led(struct e1000_hw *hw);
80 s32 e1000_led_on(struct e1000_hw *hw);
81 s32 e1000_led_off(struct e1000_hw *hw);
82 s32 e1000_id_led_init(struct e1000_hw *hw);
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H A De1000_mac.h41 s32 e1000_null_ops_generic(struct e1000_hw *hw);
48 s32 e1000_blink_led_generic(struct e1000_hw *hw);
52 s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
57 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);
58 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
68 s32 e1000_id_led_init_generic(struct e1000_hw *hw);
69 s32 e1000_led_on_generic(struct e1000_hw *hw);
70 s32 e1000_led_off_generic(struct e1000_hw *hw);
73 s32 e1000_set_default_fc_generic(struct e1000_hw *hw);
76 s32 e1000_setup_led_generic(struct e1000_hw *hw);
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H A De1000_nvm.h47 s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
49 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);
51 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
52 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
56 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
59 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
61 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
64 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,
69 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);
70 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,
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H A De1000_mbx.c75 s32 ret_val = -E1000_ERR_MBX; in e1000_read_mbx()
101 s32 ret_val = E1000_SUCCESS; in e1000_write_mbx()
124 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_msg()
144 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_ack()
164 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_rst()
249 s32 ret_val = -E1000_ERR_MBX; in e1000_read_posted_mbx()
278 s32 ret_val = -E1000_ERR_MBX; in e1000_write_posted_mbx()
460 s32 ret_val; in e1000_write_mbx_vf()
501 s32 ret_val = E1000_SUCCESS; in e1000_read_mbx_vf()
682 s32 ret_val; in e1000_write_mbx_pf()
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H A De1000_api.c46 s32 ret_val = E1000_SUCCESS; in e1000_init_mac_params()
72 s32 ret_val = E1000_SUCCESS; in e1000_init_nvm_params()
98 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params()
124 s32 ret_val = E1000_SUCCESS; in e1000_init_mbx_params()
153 s32 ret_val = E1000_SUCCESS; in e1000_set_mac_type()
420 s32 ret_val; in e1000_setup_init_funcs()
665 s32 e1000_reset_hw(struct e1000_hw *hw) in e1000_reset_hw()
680 s32 e1000_init_hw(struct e1000_hw *hw) in e1000_init_hw()
730 s32 e1000_setup_led(struct e1000_hw *hw) in e1000_setup_led()
791 s32 e1000_led_on(struct e1000_hw *hw) in e1000_led_on()
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H A De1000_hw.h741 s32 (*led_on)(struct e1000_hw *);
742 s32 (*led_off)(struct e1000_hw *);
744 s32 (*reset_hw)(struct e1000_hw *);
745 s32 (*init_hw)(struct e1000_hw *);
777 s32 (*acquire)(struct e1000_hw *);
781 s32 (*commit)(struct e1000_hw *);
785 s32 (*get_info)(struct e1000_hw *);
791 s32 (*reset)(struct e1000_hw *);
806 s32 (*acquire)(struct e1000_hw *);
810 s32 (*update)(struct e1000_hw *);
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H A De1000_i210.c57 s32 ret_val; in e1000_acquire_nvm_i210()
93 s32 ret_val = E1000_SUCCESS; in e1000_acquire_swfw_sync_i210()
166 s32 i = 0; in e1000_get_hw_semaphore_i210()
238 s32 status = E1000_SUCCESS; in e1000_read_nvm_srrd_i210()
539 s32 ret_val; in e1000_update_nvm_checksum_i210()
618 s32 ret_val; in e1000_update_flash_i210()
674 s32 ret_val; in e1000_init_nvm_params_i210()
723 s32 ret_val; in e1000_valid_led_default_i210()
759 s32 ret_val; in __e1000_access_xmdio_reg()
828 s32 ret_val; in e1000_pll_workaround_i210()
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H A De1000_vf.c42 static s32 e1000_acquire_vf(struct e1000_hw *hw);
43 static s32 e1000_setup_link_vf(struct e1000_hw *hw);
49 static s32 e1000_init_hw_vf(struct e1000_hw *hw);
50 static s32 e1000_reset_hw_vf(struct e1000_hw *hw);
224 s32 status; in e1000_get_link_up_info_vf()
258 static s32 e1000_reset_hw_vf(struct e1000_hw *hw) in e1000_reset_hw_vf()
262 s32 ret_val = -E1000_ERR_MAC_INIT; in e1000_reset_hw_vf()
307 static s32 e1000_init_hw_vf(struct e1000_hw *hw) in e1000_init_hw_vf()
329 s32 ret_val; in e1000_rar_set_vf()
482 s32 ret_val; in e1000_promisc_set_vf()
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H A De1000_vf.h201 s32 (*init_params)(struct e1000_hw *);
202 s32 (*check_for_link)(struct e1000_hw *);
204 s32 (*get_bus_info)(struct e1000_hw *);
207 s32 (*reset_hw)(struct e1000_hw *);
208 s32 (*init_hw)(struct e1000_hw *);
209 s32 (*setup_link)(struct e1000_hw *);
212 s32 (*read_mac_addr)(struct e1000_hw *);
229 s32 (*init_params)(struct e1000_hw *hw);
234 s32 (*check_for_msg)(struct e1000_hw *, u16);
235 s32 (*check_for_ack)(struct e1000_hw *, u16);
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H A De1000_82575.c1174 s32 ret_val; in e1000_get_link_up_info_82575()
1197 s32 ret_val; in e1000_check_for_link_82575()
1237 s32 ret_val; in e1000_check_for_link_media_swap()
1430 s32 ret_val; in e1000_reset_hw_82575()
1494 s32 ret_val; in e1000_init_hw_82575()
1551 s32 ret_val; in e1000_setup_copper_link_82575()
1928 s32 ret_val; in e1000_valid_led_default_82575()
2011 s32 ret_val; in e1000_read_mac_addr_82575()
3491 s32 i; in e1000_clock_in_i2c_byte()
3515 s32 i; in e1000_clock_out_i2c_byte()
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H A De1000_80003es2lan.c92 s32 ret_val; in e1000_init_phy_params_80003es2lan()
364 s32 ret_val; in e1000_acquire_nvm_80003es2lan()
407 s32 i = 0; in e1000_acquire_swfw_sync_80003es2lan()
476 s32 ret_val; in e1000_read_phy_reg_gg82563_80003es2lan()
547 s32 ret_val; in e1000_write_phy_reg_gg82563_80003es2lan()
664 s32 ret_val; in e1000_phy_force_speed_duplex_80003es2lan()
760 s32 ret_val; in e1000_get_cable_length_80003es2lan()
796 s32 ret_val; in e1000_get_link_up_info_80003es2lan()
822 s32 ret_val; in e1000_reset_hw_80003es2lan()
888 s32 ret_val; in e1000_init_hw_80003es2lan()
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H A De1000_phy.c261 s32 ret_val; in e1000_phy_reset_dsp_generic()
650 s32 ret_val; in e1000_read_phy_reg_m88()
680 s32 ret_val; in e1000_write_phy_reg_m88()
1010 s32 ret_val; in e1000_set_master_slave_mode()
1050 s32 ret_val; in e1000_copper_link_setup_82577()
1115 s32 ret_val; in e1000_copper_link_setup_m88()
1267 s32 ret_val; in e1000_copper_link_setup_m88_gen2()
1364 s32 ret_val; in e1000_copper_link_setup_igp()
1474 s32 ret_val; in e1000_phy_setup_autoneg()
1627 s32 ret_val; in e1000_copper_link_autoneg()
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/illumos-gate/usr/src/grub/grub-0.97/stage2/
H A Djfs.h102 typedef int s32; typedef
177 s32 s_bsize; /* 4: aggregate block size in bytes;
182 s32 s_pbsize; /* 4: hardware/LVM block size in bytes */
194 s32 s_compress; /* 4: > 0 if data compression */
452 s32 di_fileset; /* 4: fileset number */
477 s32 di_next_index; /* 4: Next available dir_table index */
479 s32 di_acltype; /* 4: Type of ACL */
573 s32 iagnum; /* 4: inode allocation group number */
578 s32 iagfree; /* 4: iag free list */
591 s32 nfreeinos; /* 4: number of free inodes */
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