/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/ |
H A D | bnxe_fw_funcs.c | 48 u32_t reg_addr, reg_bit_map, vnic; in ecore_map_q_cos() local 69 reg_addr = ECORE_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); in ecore_map_q_cos() 70 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos() 71 REG_WR(pdev, reg_addr, reg_bit_map & (~q_bit_map)); in ecore_map_q_cos() 74 reg_addr = ECORE_VOQ_Q_REG_ADDR(new_cos, pf_q_num); in ecore_map_q_cos() 75 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos() 76 REG_WR(pdev, reg_addr, reg_bit_map | q_bit_map); in ecore_map_q_cos() 81 reg_addr = ECORE_Q_CMDQ_REG_ADDR(pf_q_num); in ecore_map_q_cos() 82 reg_bit_map = REG_RD(pdev, reg_addr); in ecore_map_q_cos() 87 REG_WR(pdev, reg_addr, reg_bit_map); in ecore_map_q_cos()
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/illumos-gate/usr/src/uts/common/io/ixgbe/core/ |
H A D | ixgbe_x550.h | 65 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, 67 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, 73 s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, 75 s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, 105 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, 107 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
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H A D | ixgbe_phy.h | 166 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 168 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 170 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, 172 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
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H A D | ixgbe_api.c | 529 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg() argument 535 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, in ixgbe_read_phy_reg() 548 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_write_phy_reg() argument 554 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, in ixgbe_write_phy_reg() 1239 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg() argument 1242 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr, in ixgbe_read_iosf_sb_reg() 1255 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg() argument 1258 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr, in ixgbe_write_iosf_sb_reg()
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H A D | ixgbe_api.h | 70 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 72 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 212 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, 214 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
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H A D | ixgbe_phy.c | 584 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument 590 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi() 621 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi() 666 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument 677 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_generic() 692 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument 701 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi() 730 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi() 766 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument 775 status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
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H A D | ixgbe_x550.c | 524 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data); in ixgbe_read_phy_reg_x550em() 531 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data); in ixgbe_write_phy_reg_x550em() 1133 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg_x550() argument 1148 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | in ixgbe_write_iosf_sb_reg_x550() 1179 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg_x550() argument 1194 command = ((reg_addr << IXGBE_SB_IOSF_CTRL_ADDR_SHIFT) | in ixgbe_read_iosf_sb_reg_x550() 1307 write_cmd.address = IXGBE_CPU_TO_BE16(reg_addr); in ixgbe_write_iosf_sb_reg_x550a() 1340 hic.cmd.address = IXGBE_CPU_TO_BE16(reg_addr); in ixgbe_read_iosf_sb_reg_x550a() 4357 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_x550a() argument 4385 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_x550a() argument [all …]
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/illumos-gate/usr/src/uts/sun4u/io/ |
H A D | iocache.c | 185 volatile uint64_t *reg_addr; in sync_stream_buf() local 191 for (i = 0, reg_addr = softsp->str_buf_pg_tag_diag; in sync_stream_buf() 192 i < STREAM_CACHE_LINES; i++, reg_addr++) { in sync_stream_buf() 195 reg = *reg_addr; in sync_stream_buf() 204 (void *)reg_addr, hi, lo)); in sync_stream_buf()
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H A D | pmubus.c | 598 addr = regp->reg_addr & ~MAPPING_SHARED_BITS_MASK; in pmubus_apply_range() 623 if (regp->reg_addr & MAPPING_SHARED_BITS_MASK) in pmubus_apply_range() 709 pmubus_rp.reg_addr = ((uint64_t) in pmubus_map() 744 if ((pmubus_rp.reg_addr + off) > in pmubus_map() 745 (pmubus_rp.reg_addr + pmubus_rp.reg_size)) { in pmubus_map() 750 pmubus_rp.reg_addr += off; in pmubus_map() 776 pmubus_mapreqp->mapreq_addr = pmubus_rp.reg_addr; in pmubus_map()
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/illumos-gate/usr/src/uts/common/io/chxge/com/ |
H A D | cphy.h | 34 int reg_addr, unsigned int *val); 36 int reg_addr, unsigned int val); 91 int reg_addr, unsigned int *val); 93 int reg_addr, unsigned int val);
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H A D | ch_subr.c | 275 int reg_addr, unsigned int *val) in fpga_mdio_read() argument 287 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); in fpga_mdio_read() 294 int reg_addr, unsigned int val) in fpga_mdio_write() argument 306 V_MI0_PHY_REG_ADDR(reg_addr) | V_MI0_PHY_ADDR(phy_addr)); in fpga_mdio_write() 358 int reg_addr, unsigned int *valp) in mi1_mdio_read() argument 360 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); in mi1_mdio_read() 376 int reg_addr, unsigned int val) in mi1_mdio_write() argument 378 u32 addr = V_MI1_REG_ADDR(reg_addr) | V_MI1_PHY_ADDR(phy_addr); in mi1_mdio_write() 405 int reg_addr, unsigned int *valp) 431 int reg_addr, unsigned int *valp) in mi1_mdio_ext_read() argument [all …]
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/illumos-gate/usr/src/uts/common/io/cxgbe/common/ |
H A D | t4_regs.h | 20 #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) argument 23 #define PF0_REG(reg_addr) (PF0_BASE + (reg_addr)) argument 26 #define PF1_REG(reg_addr) (PF1_BASE + (reg_addr)) argument 29 #define PF2_REG(reg_addr) (PF2_BASE + (reg_addr)) argument 32 #define PF3_REG(reg_addr) (PF3_BASE + (reg_addr)) argument 35 #define PF4_REG(reg_addr) (PF4_BASE + (reg_addr)) argument 38 #define PF5_REG(reg_addr) (PF5_BASE + (reg_addr)) argument 41 #define PF6_REG(reg_addr) (PF6_BASE + (reg_addr)) argument 44 #define PF7_REG(reg_addr) (PF7_BASE + (reg_addr)) argument 57 #define VF_PL_REG(reg_addr) (VF_PL_BASE + (reg_addr)) argument [all …]
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/illumos-gate/usr/src/grub/grub-0.97/netboot/ |
H A D | e1000.c | 2814 uint32_t reg_addr, argument 2822 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 2836 uint32_t reg_addr, argument 2845 if(reg_addr > MAX_PHY_REG_ADDRESS) { 2855 mdic = ((reg_addr << E1000_MDIC_REG_SHIFT) | 2894 mdic = ((reg_addr) | (phy_addr << 5) | 2917 uint32_t reg_addr, argument 2925 (reg_addr > MAX_PHY_MULTI_PAGE_REG)) { 2939 uint32_t reg_addr, argument 2948 if(reg_addr > MAX_PHY_REG_ADDRESS) { [all …]
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/illumos-gate/usr/src/uts/common/io/i40e/core/ |
H A D | i40e_prototype.h | 126 u32 reg_addr, u64 reg_val, 129 u32 reg_addr, u64 *reg_val, 569 u32 reg_addr, u32 *reg_val, 571 u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr); 573 u32 reg_addr, u32 reg_val, 575 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val); 580 u32 reg_addr, u32 reg_val, 586 u32 reg_addr, u32 *reg_val,
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H A D | i40e_common.c | 3421 u32 reg_addr, u64 *reg_val, in i40e_aq_debug_read_register() argument 3456 u32 reg_addr, u64 reg_val, in i40e_aq_debug_write_register() argument 3466 cmd->address = CPU_TO_LE32(reg_addr); in i40e_aq_debug_write_register() 7159 u32 reg_addr, u32 *reg_val, in i40e_aq_rx_ctl_read_register() argument 7209 val = rd32(hw, reg_addr); in i40e_read_rx_ctl() 7225 u32 reg_addr, u32 reg_val, in i40e_aq_rx_ctl_write_register() argument 7235 cmd->address = CPU_TO_LE32(reg_addr); in i40e_aq_rx_ctl_write_register() 7271 wr32(hw, reg_addr, reg_val); in i40e_write_rx_ctl() 7318 u32 reg_addr, u32 reg_val, in i40e_aq_set_phy_register_ext() argument 7331 cmd->reg_address = CPU_TO_LE32(reg_addr); in i40e_aq_set_phy_register_ext() [all …]
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/ |
H A D | hw_dump.h | 242 struct reg_addr { struct 264 static const struct reg_addr reg_addrs[] = { argument 1340 static const struct reg_addr idle_addrs[] = { 1612 static const struct reg_addr split_reg_addrs[] = { 8179 static const struct reg_addr page_read_regs_e1[] = { 8194 static const struct reg_addr page_read_regs_e1h[] = { 8210 static const struct reg_addr page_read_regs_e2[] = { 8225 static const struct reg_addr page_read_regs_e3[] = {
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H A D | clc.h | 24 extern u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr); 25 extern void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val);
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/illumos-gate/usr/src/uts/sun4u/sys/ |
H A D | pmubus.h | 47 uint64_t reg_addr; member
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/illumos-gate/usr/src/lib/udapl/libdat/include/dat/ |
H A D | udat_redirection.h | 57 lmr, lmr_context, rmr_context, reg_len, reg_addr) \ argument 69 (reg_addr))
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/illumos-gate/usr/src/uts/common/io/audio/drv/audiots/ |
H A D | audiots.c | 1151 uint16_t *reg_addr = &state->ts_regs->aud_regs.ap_acrdwr_reg; in audiots_set_ac97() local 1170 if (!(ddi_get16(handle, reg_addr) & in audiots_set_ac97() 1173 ddi_put16(handle, reg_addr, reg); in audiots_set_ac97() 1187 if (!(ddi_get16(handle, reg_addr) & in audiots_set_ac97()
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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/ |
H A D | ecore_hw.c | 323 u32 OSAL_IOMEM *reg_addr; in ecore_memcpy_hw() local 338 reg_addr = (u32 OSAL_IOMEM *)OSAL_REG_ADDR(p_hwfn, hw_offset); in ecore_memcpy_hw() 342 DIRECT_REG_WR(p_hwfn, reg_addr++, *host_addr++); in ecore_memcpy_hw() 346 reg_addr++); in ecore_memcpy_hw()
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/illumos-gate/usr/src/cmd/bhyve/ |
H A D | pci_e82545.c | 408 e82545_write_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_write_mdi() argument 411 DPRINTF("Write mdi reg:0x%x phy:0x%x data: 0x%x", reg_addr, phy_addr, data); in e82545_write_mdi() 415 e82545_read_mdi(struct e82545_softc *sc __unused, uint8_t reg_addr, in e82545_read_mdi() argument 419 switch (reg_addr) { in e82545_read_mdi() 435 DPRINTF("Unknown mdi read reg:0x%x phy:0x%x", reg_addr, phy_addr); in e82545_read_mdi() 1834 uint8_t reg_addr = (uint8_t)((value & E1000_MDIC_REG_MASK) >> in e82545_write_register() local 1847 sc->mdi_control |= e82545_read_mdi(sc, reg_addr, phy_addr); in e82545_write_register() 1850 e82545_write_mdi(sc, reg_addr, phy_addr, in e82545_write_register()
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/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/mcp/ |
H A D | nvm_map.h | 286 u32 reg_addr; member
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/illumos-gate/usr/src/uts/sun4u/io/i2c/nexus/ |
H A D | smbus.c | 737 uint8_t *reg_addr = smbus->smbus_regaddr; in smbus_put() local 741 ddi_put8(hp, ®_addr[reg], data); in smbus_put() 744 ®_addr[reg], data)); in smbus_put()
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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_phy.c | 75 u32 elink_cb_reg_read(struct elink_dev *cb, u32 reg_addr ) in elink_cb_reg_read() argument 77 return REG_RD(cb, reg_addr); in elink_cb_reg_read() 80 void elink_cb_reg_write(struct elink_dev *cb, u32 reg_addr, u32 val ) in elink_cb_reg_write() argument 82 REG_WR(cb, reg_addr, val); in elink_cb_reg_write()
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