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Searched refs:reg (Results 1 – 25 of 656) sorted by relevance

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/illumos-gate/usr/src/common/vga/
H A Dvgasubr.c52 #define PUTB(reg, off, v) ddi_put8(reg->handle, reg->addr + (off), v) argument
53 #define GETB(reg, off) ddi_get8(reg->handle, reg->addr + (off)) argument
60 #define PUTB(reg, off, v) outb(reg + (off), v) argument
61 #define GETB(reg, off) inb(reg + (off)) argument
108 PUTB(reg, indexreg, v); in vga_set_reg()
153 PUTB(reg, VGA_ATR_AD, i); in vga_get_atr()
175 vgaregmap_t reg, in vga_set_indexed() argument
182 PUTB(reg, datareg, val); in vga_set_indexed()
187 vgaregmap_t reg, in vga_get_indexed() argument
203 vgaregmap_t reg, in vga_put_cmap() argument
[all …]
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dintel_nhm.h128 #define NUMBANK(reg) (((reg) & (3 << 7)) == 0 ? 4 : (((reg) >> 7) & 3) * 8) argument
129 #define NUMRANK(reg) (((reg) & (3 << 5)) == 0 ? 1 : (((reg) >> 5) & 3) * 2) argument
131 #define NUMCOL(reg) (((reg) & 3) + 10) argument
133 #define DIMMSIZE(reg) ((1ULL << (NUMCOL(reg) + NUMROW(reg))) * NUMRANK(reg) \ argument
140 #define REMOVE_6(reg) (((reg) >> 24) & 1) argument
141 #define REMOVE_7(reg) (((reg) >> 25) & 1) argument
142 #define REMOVE_8(reg) (((reg) >> 26) & 1) argument
165 #define RIR_DIMM_RANK(reg) ((reg) & 0xf) argument
166 #define RIR_RANK(reg) ((reg) & 0x3) argument
167 #define RIR_DIMM(reg) ((reg)>>2 & 0x03) argument
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H A Dnhm_pci_cfg.c45 pci_regspec_t reg; in nhm_pci_cfg_setup() local
48 reg.pci_phys_mid = 0; in nhm_pci_cfg_setup()
49 reg.pci_phys_low = 0; in nhm_pci_cfg_setup()
50 reg.pci_size_hi = 0; in nhm_pci_cfg_setup()
55 reg.pci_phys_hi = ((SOCKET_BUS(i)) in nhm_pci_cfg_setup()
61 (int *)&reg, sizeof (reg)/sizeof (int)) != in nhm_pci_cfg_setup()
113 return (cmi_pci_getb(bus, dev, func, reg, interpose, hdl)); in nhm_pci_getb()
122 return (cmi_pci_getw(bus, dev, func, reg, interpose, hdl)); in nhm_pci_getw()
140 cmi_pci_putb(bus, dev, func, reg, hdl, val); in nhm_pci_putb()
149 cmi_pci_putw(bus, dev, func, reg, hdl, val); in nhm_pci_putw()
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/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_dcb_82599.c126 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599() local
144 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599()
237 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82599() local
255 reg = 0; in ixgbe_dcb_config_tx_data_arbiter_82599()
385 u32 reg = 0; in ixgbe_dcb_config_tc_stats_82599() local
511 u32 reg; in ixgbe_dcb_config_82599() local
526 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
532 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
541 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
548 reg = (reg & ~IXGBE_MRQC_MRQE_MASK) | in ixgbe_dcb_config_82599()
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H A Dixgbe_dcb_82598.c124 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
136 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
138 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
150 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
183 u32 reg, max_credits; in ixgbe_dcb_config_tx_desc_arbiter_82598() local
190 reg |= IXGBE_DPMCS_TSOEF; in ixgbe_dcb_config_tx_desc_arbiter_82598()
201 reg |= refill[i]; in ixgbe_dcb_config_tx_desc_arbiter_82598()
230 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82598() local
243 reg = refill[i]; in ixgbe_dcb_config_tx_data_arbiter_82598()
273 u32 fcrtl, reg; in ixgbe_dcb_config_pfc_82598() local
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/illumos-gate/usr/src/uts/common/io/mii/
H A Dmii_marvell.c151 uint16_t reg; in mvphy_reset_88e3016() local
160 reg |= MV_PSC_LPNP; in mvphy_reset_88e3016()
184 uint16_t reg; in mvphy_loop_88e3016() local
200 reg |= MV_PSC_LPNP; in mvphy_loop_88e3016()
210 uint16_t reg; in mvphy_reset_88e3082() local
227 uint16_t reg; in mvphy_reset_88e1149() local
289 uint16_t reg; in mvphy_reset_88e1116() local
324 uint16_t reg; in mvphy_reset_88e1118() local
340 uint16_t reg; in mvphy_reset_88e1111() local
397 uint16_t reg; in mvphy_reset_88e1011() local
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/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_intr.c214 uint32_t reg; in i40e_intr_adminq_enable() local
227 uint32_t reg; in i40e_intr_adminq_disable() local
243 uint32_t reg; in i40e_intr_io_enable() local
256 uint32_t reg; in i40e_intr_io_disable() local
358 uint32_t reg; in i40e_intr_chip_fini() local
388 uint32_t reg; in i40e_set_lnklstn() local
407 uint32_t reg; in i40e_set_rqctl() local
429 uint32_t reg; in i40e_set_tqctl() local
496 uint32_t reg; in i40e_intr_init_queue_shared() local
530 uint32_t reg; in i40e_intr_rx_queue_enable() local
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/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dnb_pci_cfg.c49 pci_regspec_t reg; in nb_pci_cfg_setup() local
53 reg.pci_phys_mid = 0; in nb_pci_cfg_setup()
54 reg.pci_phys_low = 0; in nb_pci_cfg_setup()
55 reg.pci_size_hi = 0; in nb_pci_cfg_setup()
60 (int *)&reg, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS) in nb_pci_cfg_setup()
67 reg.pci_phys_hi += 1 << PCI_REG_FUNC_SHIFT; in nb_pci_cfg_setup()
72 (int *)&reg, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS) in nb_pci_cfg_setup()
83 (int *)&reg, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS) in nb_pci_cfg_setup()
90 (int *)&reg, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS) in nb_pci_cfg_setup()
98 (int *)&reg, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS) in nb_pci_cfg_setup()
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/illumos-gate/usr/src/uts/i86pc/sys/
H A Dpci_cfgspace_impl.h44 extern uint8_t pci_mech1_getb(int bus, int dev, int func, int reg);
45 extern uint16_t pci_mech1_getw(int bus, int dev, int func, int reg);
46 extern uint32_t pci_mech1_getl(int bus, int dev, int func, int reg);
58 extern void pci_mech1_amd_putb(int bus, int dev, int func, int reg,
60 extern void pci_mech1_amd_putw(int bus, int dev, int func, int reg,
62 extern void pci_mech1_amd_putl(int bus, int dev, int func, int reg,
68 extern uint8_t pci_mech2_getb(int bus, int dev, int func, int reg);
69 extern uint16_t pci_mech2_getw(int bus, int dev, int func, int reg);
70 extern uint32_t pci_mech2_getl(int bus, int dev, int func, int reg);
94 extern uint8_t pci_orion_getb(int bus, int dev, int func, int reg);
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/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_mech1.c50 pci_mech1_getb(int bus, int device, int function, int reg) in pci_mech1_getb() argument
58 if (reg > pci_iocfg_max_offset) { in pci_mech1_getb()
64 val = inb(PCI_CONFDATA | (reg & 0x3)); in pci_mech1_getb()
79 if (reg > pci_iocfg_max_offset) { in pci_mech1_getw()
85 val = inw(PCI_CONFDATA | (reg & 0x2)); in pci_mech1_getw()
100 if (reg > pci_iocfg_max_offset) { in pci_mech1_getl()
119 if (reg > pci_iocfg_max_offset) { in pci_mech1_putb()
125 outb(PCI_CONFDATA | (reg & 0x3), val); in pci_mech1_putb()
137 if (reg > pci_iocfg_max_offset) { in pci_mech1_putw()
143 outw(PCI_CONFDATA | (reg & 0x2), val); in pci_mech1_putw()
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H A Dpci_mech2.c76 pci_mech2_getb(int bus, int device, int function, int reg) in pci_mech2_getb() argument
81 if (device >= PCI_MAX_DEVS_2 || reg > pci_iocfg_max_offset) in pci_mech2_getb()
85 val = inb(PCI_CADDR2(device, reg)); in pci_mech2_getb()
92 pci_mech2_getw(int bus, int device, int function, int reg) in pci_mech2_getw() argument
97 if (device >= PCI_MAX_DEVS_2 || reg > pci_iocfg_max_offset) in pci_mech2_getw()
101 val = inw(PCI_CADDR2(device, reg)); in pci_mech2_getw()
108 pci_mech2_getl(int bus, int device, int function, int reg) in pci_mech2_getl() argument
117 val = inl(PCI_CADDR2(device, reg)); in pci_mech2_getl()
132 outb(PCI_CADDR2(device, reg), val); in pci_mech2_putb()
145 outw(PCI_CADDR2(device, reg), val); in pci_mech2_putw()
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H A Dpci_mech1_amd.c96 pci_mech1_amd_getb(int bus, int device, int function, int reg) in pci_mech1_amd_getb() argument
105 if (reg > pci_iocfg_max_offset) { in pci_mech1_amd_getb()
110 outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg)); in pci_mech1_amd_getb()
111 val = inb(PCI_CONFDATA | (reg & 0x3)); in pci_mech1_amd_getb()
117 pci_mech1_amd_getw(int bus, int device, int function, int reg) in pci_mech1_amd_getw() argument
126 if (reg > pci_iocfg_max_offset) { in pci_mech1_amd_getw()
132 val = inw(PCI_CONFDATA | (reg & 0x2)); in pci_mech1_amd_getw()
138 pci_mech1_amd_getl(int bus, int device, int function, int reg) in pci_mech1_amd_getl() argument
147 if (reg > pci_iocfg_max_offset) { in pci_mech1_amd_getl()
168 outb(PCI_CONFDATA | (reg & 0x3), val); in pci_mech1_amd_putb()
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/illumos-gate/usr/src/uts/common/io/audio/drv/audio1575/
H A Daudio1575.h395 #define GET8(reg) \ argument
398 #define GET16(reg) \ argument
401 #define GET32(reg) \ argument
404 #define PUT8(reg, val) \ argument
407 #define PUT16(reg, val) \ argument
413 #define SET8(reg, bit) PUT8(reg, GET8(reg) | (bit)) argument
414 #define SET16(reg, bit) PUT16(reg, GET16(reg) | (bit)) argument
415 #define SET32(reg, bit) PUT32(reg, GET32(reg) | (bit)) argument
416 #define CLR8(reg, bit) PUT8(reg, GET8(reg) & ~(bit)) argument
417 #define CLR16(reg, bit) PUT16(reg, GET16(reg) & ~(bit)) argument
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/illumos-gate/usr/src/cmd/rcm_daemon/common/
H A Dmpxio_rcm.c172 reg = reg_list; in rcm_mod_fini()
173 while (reg) { in rcm_mod_fini()
176 free(reg); in rcm_mod_fini()
177 reg = next; in rcm_mod_fini()
251 for (reg = reg_list; reg != NULL; reg = reg->next) { in mpxio_unregister()
516 for (reg = reg_list; reg != NULL; reg = reg->next) { in lookup_phci()
662 for (reg = reg_list; reg != NULL; reg = reg->next) in refresh_regs()
687 reg = (phci_list_t *)calloc(1, sizeof (*reg)); in refresh_regs()
696 free(reg); in refresh_regs()
717 while (reg) { in refresh_regs()
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/illumos-gate/usr/src/uts/common/sys/
H A Dvgasubr.h49 extern int vga_get_reg(vgaregmap_t reg, int i);
50 extern void vga_set_reg(vgaregmap_t reg, int i, int v);
51 extern int vga_get_crtc(vgaregmap_t reg, int i);
53 extern int vga_get_seq(vgaregmap_t reg, int i);
54 extern void vga_set_seq(vgaregmap_t reg, int i, int v);
55 extern int vga_get_grc(vgaregmap_t reg, int i);
57 extern int vga_get_atr(vgaregmap_t reg, int i);
59 extern void vga_put_cmap(vgaregmap_t reg,
61 extern void vga_get_cmap(vgaregmap_t reg,
63 extern void vga_get_hardware_settings(vgaregmap_t reg,
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/illumos-gate/usr/src/uts/common/io/usb/hcd/xhci/
H A Dxhci_hub.c248 uint32_t reg; in xhci_root_hub_handle_port_clear_feature() local
276 reg |= XHCI_PS_PED; in xhci_root_hub_handle_port_clear_feature()
279 reg &= ~XHCI_PS_PP; in xhci_root_hub_handle_port_clear_feature()
282 reg |= XHCI_PS_CSC; in xhci_root_hub_handle_port_clear_feature()
285 reg |= XHCI_PS_PRC; in xhci_root_hub_handle_port_clear_feature()
328 uint32_t reg; in xhci_root_hub_handle_port_set_feature() local
407 reg |= XHCI_PS_PR; in xhci_root_hub_handle_port_set_feature()
410 reg |= XHCI_PS_PP; in xhci_root_hub_handle_port_set_feature()
448 uint32_t reg; in xhci_root_hub_handle_port_get_status() local
624 uint32_t reg; in xhci_root_hub_psc_callback() local
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/illumos-gate/usr/src/tools/smatch/src/
H A Dexample.c430 if (reg && !reg->used) { in find_pseudo_storage()
494 if (reg && !reg->contains) in target_reg()
498 if (reg) in target_reg()
517 return reg; in target_reg()
544 if (reg) in flush_pseudo()
645 if (reg) in getreg()
670 if (reg && !reg->contains) { in copy_reg()
761 if (reg) { in get_generic_operand()
763 op->reg = reg; in get_generic_operand()
1269 reg = asm_arguments[index].reg; in generate_asm_inputs()
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/illumos-gate/usr/src/cmd/fm/modules/common/fabric-xlate/
H A Dfx_fire.c139 uint64_t reg; in fab_xlate_fire_ce() local
156 data->pcie_ce_status = (uint32_t)reg | (uint32_t)(reg >> 32); in fab_xlate_fire_ce()
167 uint64_t reg; in fab_xlate_fire_ue() local
196 data->pcie_ue_status = (uint32_t)reg | (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
227 data->pcie_ue_tgt_addr = reg; in fab_xlate_fire_ue()
258 uint64_t reg; in fab_xlate_fire_oe() local
319 uint64_t reg; in fab_xlate_fire_dmc() local
353 temp = (reg & 0x3F0000) >> 16; in fab_xlate_fire_dmc()
357 temp = (reg & 0xFFFF); in fab_xlate_fire_dmc()
365 data->pcie_ue_hdr[2] = reg; in fab_xlate_fire_dmc()
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/illumos-gate/usr/src/uts/common/io/e1000g/
H A De1000_osdep.h123 #define E1000_WRITE_REG(hw, reg, value) \ argument
132 e1000_translate_register_82542(reg)), \
136 #define E1000_READ_REG(hw, reg) (\ argument
142 e1000_translate_register_82542(reg))))
149 reg + ((offset) << 2)),\
165 e1000_translate_register_82542(reg) + \
172 E1000_READ_REG_ARRAY(a, reg, offset)
175 #define E1000_READ_FLASH_REG(hw, reg) \ argument
179 #define E1000_READ_FLASH_REG16(hw, reg) \ argument
233 #define E1000_WRITE_REG_IO(a, reg, val) { \ argument
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/illumos-gate/usr/src/uts/common/io/
H A Dsock_conf.c71 smod_register(const smod_reg_t *reg) in smod_register() argument
79 if (reg->smod_version != SOCKMOD_VERSION || in smod_register()
80 reg->smod_dc_version != SOCK_DC_VERSION || in smod_register()
81 reg->smod_uc_version != SOCK_UC_VERSION) { in smod_register()
84 reg->smod_name); in smod_register()
97 smodp = smod_create(reg->smod_name); in smod_register()
98 smodp->smod_version = reg->smod_version; in smod_register()
103 ASSERT(reg->__smod_priv != NULL); in smod_register()
110 if (reg->smod_proto_create_func == NULL || in smod_register()
111 (reg->__smod_priv != NULL && in smod_register()
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/illumos-gate/usr/src/uts/common/io/igb/
H A De1000_osdep.h113 #define E1000_WRITE_REG(hw, reg, value) \ argument
117 #define E1000_READ_REG(hw, reg) \ argument
126 #define E1000_READ_REG_ARRAY(hw, reg, offset) \ argument
131 E1000_WRITE_REG_ARRAY(a, reg, offset, value)
133 E1000_READ_REG_ARRAY(a, reg, offset)
136 #define E1000_READ_FLASH_REG(hw, reg) \ argument
140 #define E1000_READ_FLASH_REG16(hw, reg) \ argument
144 #define E1000_WRITE_FLASH_REG(hw, reg, value) \ argument
148 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \ argument
200 #define E1000_WRITE_REG_IO(a, reg, val) { \ argument
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/illumos-gate/usr/src/lib/libc/sparc/gen/
H A Dmakectxt.c57 greg_t *reg; in makecontext() local
64 reg = ucp->uc_mcontext.gregs; in makecontext()
65 reg[REG_PC] = (greg_t)func; in makecontext()
66 reg[REG_nPC] = reg[REG_PC] + 0x4; in makecontext()
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long); in makecontext()
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */ in makecontext()
110 greg_t *reg; in __makecontext_v2() local
117 reg = ucp->uc_mcontext.gregs; in __makecontext_v2()
118 reg[REG_PC] = (greg_t)func; in __makecontext_v2()
119 reg[REG_nPC] = reg[REG_PC] + 0x4; in __makecontext_v2()
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/illumos-gate/usr/src/lib/libc/sparcv9/gen/
H A Dmakectxt.c57 greg_t *reg; in makecontext() local
64 reg = ucp->uc_mcontext.gregs; in makecontext()
65 reg[REG_PC] = (greg_t)func; in makecontext()
66 reg[REG_nPC] = reg[REG_PC] + 0x4; in makecontext()
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long); in makecontext()
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */ in makecontext()
110 greg_t *reg; in __makecontext_v2() local
117 reg = ucp->uc_mcontext.gregs; in __makecontext_v2()
118 reg[REG_PC] = (greg_t)func; in __makecontext_v2()
119 reg[REG_nPC] = reg[REG_PC] + 0x4; in __makecontext_v2()
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/illumos-gate/usr/src/uts/common/io/ntxn/
H A Dniu.c443 &reg, 4); in unm_niu_set_promiscuous_mode()
446 reg.drop_gb0 = data; in unm_niu_set_promiscuous_mode()
462 &reg, 4); in unm_niu_set_promiscuous_mode()
549 long reg; in unm_niu_xg_set_promiscuous_mode() local
563 reg = 0; in unm_niu_xg_set_promiscuous_mode()
580 reg = 0x0200; in unm_niu_xg_set_promiscuous_mode()
598 } while (reg); in unm_niu_xg_set_promiscuous_mode()
605 reg = (reg | 0x2000UL); in unm_niu_xg_set_promiscuous_mode()
607 reg = (reg & ~0x2000UL); in unm_niu_xg_set_promiscuous_mode()
682 &reg, 4); in unm_niu_gbe_set_rx_flow_ctl()
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/illumos-gate/usr/src/lib/libdtrace/common/
H A Ddt_regset.c78 int reg; in dt_regset_assert_free() local
80 for (reg = 0; reg < drp->dr_size; reg++) { in dt_regset_assert_free()
81 if (BT_TEST(drp->dr_bitmap, reg) != 0) { in dt_regset_assert_free()
110 int reg; in dt_regset_alloc() local
114 reg = (int)((wx << BT_ULSHIFT) | bx); in dt_regset_alloc()
115 BT_SET(drp->dr_bitmap, reg); in dt_regset_alloc()
116 return (reg); in dt_regset_alloc()
127 dt_regset_free(dt_regset_t *drp, int reg) in dt_regset_free() argument
129 assert(reg >= 0 && reg < drp->dr_size); in dt_regset_free()
130 assert(BT_TEST(drp->dr_bitmap, reg) != 0); in dt_regset_free()
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