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Searched refs:rd32 (Results 1 – 6 of 6) sorted by relevance

/illumos-gate/usr/src/uts/common/io/i40e/
H A Di40e_osdep.h174 #define rd32(hw, reg) \ macro
178 #define I40E_READ_REG rd32
185 #define i40e_flush(hw) (void) rd32(hw, I40E_GLGEN_STAT)
/illumos-gate/usr/src/uts/common/io/i40e/core/
H A Di40e_adminq.c319 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
355 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
788 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
790 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
825 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40e_asq_done()
865 val = rd32(hw, hw->aq.asq.head); in i40e_asq_send_command()
1022 if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) { in i40e_asq_send_command()
1093 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
1095 ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK; in i40e_clean_arq_element()
H A Di40e_lan_hmc.c136 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); in i40e_init_lan_hmc()
139 size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); in i40e_init_lan_hmc()
156 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); in i40e_init_lan_hmc()
162 size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); in i40e_init_lan_hmc()
179 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX); in i40e_init_lan_hmc()
185 size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); in i40e_init_lan_hmc()
202 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX); in i40e_init_lan_hmc()
208 size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); in i40e_init_lan_hmc()
H A Di40e_common.c1307 reg = rd32(hw, I40E_GLGEN_RSTAT); in i40e_poll_globr()
1345 reg = rd32(hw, I40E_GLGEN_RSTAT); in i40e_pf_reset()
1357 reg = rd32(hw, I40E_GLNVM_ULD); in i40e_pf_reset()
1380 reg = rd32(hw, I40E_PFGEN_CTRL); in i40e_pf_reset()
1384 reg = rd32(hw, I40E_PFGEN_CTRL); in i40e_pf_reset()
1387 reg2 = rd32(hw, I40E_GLGEN_RSTAT); in i40e_pf_reset()
1426 val = rd32(hw, I40E_GLPCI_CNF2); in i40e_clear_hw()
1432 val = rd32(hw, I40E_PFLAN_QALLOC); in i40e_clear_hw()
1442 val = rd32(hw, I40E_PF_VT_PFALLOC); in i40e_clear_hw()
6752 i = rd32(hw, I40E_PFGEN_PORTNUM); in i40e_blink_phy_link_led()
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H A Di40e_nvm.c59 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
66 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
103 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
118 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
186 srctl = rd32(hw, I40E_GLNVM_SRCTL); in i40e_poll_sr_srctl_done_bit()
233 sr_reg = rd32(hw, I40E_GLNVM_SRDATA); in i40e_read_nvm_word_srctl()
1329 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_nvmupd_state_writing()
H A Di40e_dcb.c53 reg = rd32(hw, I40E_PRTDCB_GENS); in i40e_get_dcbx_status()