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Searched refs:pipestat (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_irq.c321 u32 pipestat = I915_READ(reg) & 0x7fff0000; in i915_enable_pipestat() local
323 if ((pipestat & mask) == mask) in i915_enable_pipestat()
327 pipestat |= mask | (mask >> 16); in i915_enable_pipestat()
328 I915_WRITE(reg, pipestat); in i915_enable_pipestat()
336 u32 pipestat = I915_READ(reg) & 0x7fff0000; in i915_disable_pipestat() local
338 if ((pipestat & mask) == 0) in i915_disable_pipestat()
341 pipestat &= ~mask; in i915_disable_pipestat()
342 I915_WRITE(reg, pipestat); in i915_disable_pipestat()
1874 error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); in i915_capture_error_state()
H A Di915_drv.h279 u32 pipestat[I915_MAX_PIPES]; member