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Searched refs:pci_phys_hi (Results 1 – 25 of 64) sorted by relevance

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/illumos-gate/usr/src/uts/intel/io/intel_nb5000/
H A Dnb_pci_cfg.c52 reg.pci_phys_hi = 16 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=16, Func=0 */ in nb_pci_cfg_setup()
67 reg.pci_phys_hi += 1 << PCI_REG_FUNC_SHIFT; in nb_pci_cfg_setup()
69 reg.pci_phys_hi = 17 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=17, Func=0 */ in nb_pci_cfg_setup()
79 reg.pci_phys_hi += 1 << PCI_REG_FUNC_SHIFT; in nb_pci_cfg_setup()
81 reg.pci_phys_hi = 21 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=21, Func=0 */ in nb_pci_cfg_setup()
88 reg.pci_phys_hi = 22 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=22, Func=0 */ in nb_pci_cfg_setup()
95 reg.pci_phys_hi = 0; /* Bus=0, Dev=0, Func=0 */ in nb_pci_cfg_setup()
105 reg.pci_phys_hi += 1 << PCI_REG_DEV_SHIFT; in nb_pci_cfg_setup()
/illumos-gate/usr/src/uts/sun4/io/efcode/
H A Dfcpci.c872 p.pci_phys_hi &= PCI_BDF_bits; in pfc_config_fetch()
1003 p.pci_phys_hi &= PCI_BDF_bits; in pfc_config_store()
1294 if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) { in pci_alloc_resource()
1324 assigned[i].pci_phys_hi, in pci_alloc_resource()
1325 phys_spec.pci_phys_hi); in pci_alloc_resource()
1348 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi; in pci_alloc_resource()
1575 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi; in pci_free_resource()
1678 phys_spec.pci_phys_hi); in pci_free_resource()
1825 if (assigned[i].pci_phys_hi == oldone->pci_phys_hi) { in pfc_remove_assigned_prop()
1835 oldone->pci_phys_hi); in pfc_remove_assigned_prop()
[all …]
/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_util.c146 uint32_t phys_hi = rp->pci_phys_hi; in px_reloc_reg()
150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
180 uint32_t assign_type = assign_p->pci_phys_hi & PCI_REG_ADDR_M; in px_reloc_reg()
181 uint32_t assign_addr = PCI_REG_BDFR_G(assign_p->pci_phys_hi); in px_reloc_reg()
194 rp->pci_phys_hi ^= PCI_ADDR_MEM64 ^ PCI_ADDR_MEM32; in px_reloc_reg()
200 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in px_reloc_reg()
214 uint32_t space_type = PCI_REG_ADDR_G(px_rp->pci_phys_hi); in px_xlate_reg()
226 reg_begin += px_rp->pci_phys_hi << 4; in px_xlate_reg()
349 func = PCI_REG_FUNC_G(pci_rp[0].pci_phys_hi); in px_name_child()
352 PCI_REG_DEV_G(pci_rp[0].pci_phys_hi), func); in px_name_child()
[all …]
/illumos-gate/usr/src/uts/intel/io/pciex/
H A Dpcie_nvidia.c207 regs[0].pci_phys_hi = devloc; in add_nvidia_isa_bridge_props()
213 assigned[0].pci_phys_hi = regs[0].pci_phys_hi = (PCI_RELOCAT_B | in add_nvidia_isa_bridge_props()
222 assigned[1].pci_phys_hi = regs[1].pci_phys_hi = (PCI_RELOCAT_B | in add_nvidia_isa_bridge_props()
/illumos-gate/usr/src/uts/common/io/
H A Dbusra.c1071 PCI_REG_ADDR_G(regs[i].pci_phys_hi)); in pci_resource_setup()
1225 if (avail_p->pci_phys_hi == -1u) in pci_resource_setup_avail()
1254 i, avail_p->pci_phys_hi); in pci_resource_setup_avail()
1386 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_get_available_prop()
1398 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_get_available_prop()
1600 newregs[j].pci_phys_hi = regs[i].pci_phys_hi; in pci_put_available_prop()
1614 newregs[k].pci_phys_hi = regs[i].pci_phys_hi; in pci_put_available_prop()
1638 newregs[j].pci_phys_hi = type; in pci_put_available_prop()
1639 newregs[j].pci_phys_hi |= PCI_REG_REL_M; in pci_put_available_prop()
1667 newregs[0].pci_phys_hi = type; in pci_put_available_prop()
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H A Dpci_intr_lib.c836 addr_space = rp->pci_phys_hi & PCI_ADDR_MASK; in pci_msix_init()
837 offset = PCI_REG_REG_G(rp->pci_phys_hi); in pci_msix_init()
885 addr_space = rp->pci_phys_hi & PCI_ADDR_MASK; in pci_msix_init()
886 offset = PCI_REG_REG_G(rp->pci_phys_hi); in pci_msix_init()
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_util.c161 register uint32_t phys_hi = rp->pci_phys_hi; in pci_reloc_reg()
164 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
184 uint32_t assign_type = assign_p->pci_phys_hi & PCI_REG_ADDR_M; in pci_reloc_reg()
185 uint32_t assign_addr = PCI_REG_BDFR_G(assign_p->pci_phys_hi); in pci_reloc_reg()
196 rp->pci_phys_hi ^= PCI_ADDR_MEM64 ^ PCI_ADDR_MEM32; in pci_reloc_reg()
202 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pci_reloc_reg()
217 uint32_t space_type = PCI_REG_ADDR_G(pci_rp->pci_phys_hi); in pci_xlate_reg()
227 reg_begin += pci_rp->pci_phys_hi; in pci_xlate_reg()
348 func = PCI_REG_FUNC_G(pci_rp[0].pci_phys_hi); in name_child()
351 PCI_REG_DEV_G(pci_rp[0].pci_phys_hi), func); in name_child()
[all …]
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_util.c144 register uint32_t phys_hi = rp->pci_phys_hi; in pcmu_reloc_reg()
150 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
171 if ((assign_p->pci_phys_hi & mask) == phys_addr) { in pcmu_reloc_reg()
179 rp->pci_phys_hi, rp->pci_phys_mid, rp->pci_phys_low, in pcmu_reloc_reg()
194 uint32_t space_type = PCI_REG_ADDR_G(pcmu_rp->pci_phys_hi); in pcmu_xlate_reg()
205 reg_begin += pcmu_rp->pci_phys_hi; in pcmu_xlate_reg()
316 func = PCI_REG_FUNC_G(pcmu_rp[0].pci_phys_hi); in name_child()
319 PCI_REG_DEV_G(pcmu_rp[0].pci_phys_hi), func); in name_child()
322 PCI_REG_DEV_G(pcmu_rp[0].pci_phys_hi)); in name_child()
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c2160 reg[i].pci_phys_hi ^= in pcicfg_device_assign()
3228 addition.pci_phys_hi = hiword; in pcicfg_update_reg_prop()
6238 if (assigned[j].pci_phys_hi == reg[i].pci_phys_hi) { in pcicfg_alloc_new_resources()
6244 reg[i].pci_phys_hi); in pcicfg_alloc_new_resources()
6285 reg[i].pci_phys_hi); in pcicfg_alloc_new_resources()
6324 reg[i].pci_phys_hi); in pcicfg_alloc_new_resources()
6378 if (assigned[i].pci_phys_hi == phys_spec.pci_phys_hi) { in pcicfg_alloc_resource()
6390 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi; in pcicfg_alloc_resource()
6569 config.pci_phys_hi = PCI_CONF_ADDR_MASK & phys_spec.pci_phys_hi; in pcicfg_free_resource()
6697 oldone->pci_phys_hi); in pcicfg_remove_assigned_prop()
[all …]
/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c1937 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()
1959 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()
1973 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_bridge_assign()
2105 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_device_assign()
2112 reg[i].pci_phys_hi ^= in pcicfg_device_assign()
2140 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_device_assign()
2167 reg[i].pci_phys_hi |= PCI_REG_REL_M; in pcicfg_device_assign()
3075 PCI_REG_DEV_G(reg->pci_phys_hi), in pcicfg_update_reg_prop()
3098 addition.pci_phys_hi = hiword; in pcicfg_update_reg_prop()
3154 PCI_REG_DEV_G(reg->pci_phys_hi), in pcicfg_update_assigned_prop_value()
[all …]
/illumos-gate/usr/src/uts/sparc/io/pciex/
H A Dpcieb_sparc.c105 PCI_REG_DEV_G(pci_rp[0].pci_phys_hi); in pcieb_plat_intr_ops()
383 if ((reg_spec[rnum].pci_phys_hi & PCI_ADDR_MASK) == in plx_ro_disable()
395 if ((addr_spec[anum].pci_phys_hi & PCI_ADDR_MASK) == in plx_ro_disable()
408 reg_spec[rnum].pci_phys_hi = (addr_spec[anum].pci_phys_hi & in plx_ro_disable()
/illumos-gate/usr/src/uts/common/io/scsi/adapters/smrt/
H A Dsmrt_device.c33 unsigned type = regs[i].pci_phys_hi & PCI_ADDR_MASK; in smrt_locate_bar()
75 unsigned type = regs[i].pci_phys_hi & PCI_ADDR_MASK; in smrt_locate_cfgtbl()
76 unsigned bar = PCI_REG_REG_G(regs[i].pci_phys_hi); in smrt_locate_cfgtbl()
/illumos-gate/usr/src/uts/common/io/cardbus/
H A Dcardbus_cfg.c3195 PCI_REG_BUS_G(reg->pci_phys_hi),
3196 PCI_REG_DEV_G(reg->pci_phys_hi),
3204 PCI_REG_BUS_G(reg->pci_phys_hi),
3205 PCI_REG_DEV_G(reg->pci_phys_hi),
3206 PCI_REG_FUNC_G(reg->pci_phys_hi),
3231 PCI_REG_BUS_G(reg->pci_phys_hi),
3232 PCI_REG_DEV_G(reg->pci_phys_hi),
3380 addition.pci_phys_hi = hi_type |
3382 PCI_REG_DEV_G(reg->pci_phys_hi),
3526 PCI_REG_DEV_G(reg->pci_phys_hi),
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H A Dcardbus_hp.c893 if (pci_rp->pci_phys_hi == 0) in cbus_configure()
897 bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in cbus_configure()
898 device = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in cbus_configure()
899 function = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in cbus_configure()
993 if (pci_rp->pci_phys_hi == 0) in cbus_unconfigure()
996 bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in cbus_unconfigure()
1001 device = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in cbus_unconfigure()
1002 func = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in cbus_unconfigure()
H A Dcardbus.c831 new_avail_p->pci_phys_hi = old_avail_p->phys_hi; in cardbus_convert_properties()
1000 if (pci_rp->pci_phys_hi == 0) in cardbus_ctlops()
1010 bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in cardbus_ctlops()
1011 device = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in cardbus_ctlops()
1012 function = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in cardbus_ctlops()
1341 bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in cardbus_name_child()
1342 device = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in cardbus_name_child()
1343 func = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in cardbus_name_child()
1891 if (PCI_REG_ADDR_G(pci_rp->pci_phys_hi) == in pcirp2rp()
/illumos-gate/usr/src/uts/i86pc/io/gfx_private/
H A Dgfxp_pci.c98 *bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in gfxp_pci_get_bsf()
99 *dev = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in gfxp_pci_get_bsf()
100 *func = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in gfxp_pci_get_bsf()
/illumos-gate/usr/src/uts/intel/io/pci/
H A Dpci_boot.c2569 regs->pci_phys_hi |= offset; in add_bar_reg_props()
2572 assigned->pci_phys_hi = PCI_RELOCAT_B | regs->pci_phys_hi; in add_bar_reg_props()
2706 regs->pci_phys_hi = assigned->pci_phys_hi = phys_hi; in add_bar_reg_props()
2859 assigned->pci_phys_hi, in add_bar_reg_props()
2897 regs[0].pci_phys_hi = devloc; in add_reg_props()
2996 regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi = in add_reg_props()
3006 regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi = in add_reg_props()
3016 regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi = in add_reg_props()
3036 regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi = in add_reg_props()
3046 regs[nreg].pci_phys_hi = assigned[nasgn].pci_phys_hi = in add_reg_props()
[all …]
/illumos-gate/usr/src/uts/i86pc/io/pci/
H A Dpci.c415 space = pci_rp->pci_phys_hi & PCI_REG_ADDR_M; in pci_bus_map()
479 cfp->c_busnum = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in pci_bus_map()
480 cfp->c_devnum = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in pci_bus_map()
481 cfp->c_funcnum = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in pci_bus_map()
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/oce/
H A Doce_hw.c204 dev->pci_bus = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in oce_get_bdf()
205 dev->pci_device = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in oce_get_bdf()
206 dev->pci_function = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in oce_get_bdf()
/illumos-gate/usr/src/uts/common/io/pciex/hotplug/
H A Dpcie_hp.c1059 pci_dev = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in pcie_hp_match_dev_func()
1060 pci_func = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in pcie_hp_match_dev_func()
1096 pci_dev = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in pcie_hp_match_dev()
1143 pci_dev = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in pcie_hp_list_occupants()
/illumos-gate/usr/src/uts/common/os/
H A Dpcifm.c460 phys_hi = pci_rp->pci_phys_hi; in pci_ereport_setup()
1235 PCI_REG_ADDR_G(drv_regp[rn].pci_phys_hi) && in pci_check_regs()
1238 (drv_regp[rn].pci_phys_hi & (PCI_REG_BUS_M | in pci_check_regs()
1258 if ((drv_regp[rn].pci_phys_hi & PCI_RELOCAT_B) && in pci_check_regs()
1261 PCI_REG_ADDR_G(drv_regp[rn].pci_phys_hi)) && in pci_check_regs()
1286 PCI_REG_ADDR_G(drv_regp[rn].pci_phys_hi)) && in pci_check_regs()
/illumos-gate/usr/src/uts/sun4u/io/
H A Dpmubus.c614 pci_regp->pci_phys_hi = rangep->rng_parent_hi; in pmubus_apply_range()
621 if (pci_regp->pci_phys_hi == pmubusp->pmubus_regp->pci_phys_hi) { in pmubus_apply_range()
/illumos-gate/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c577 space = pci_rp->pci_phys_hi & PCI_REG_ADDR_M; in npe_bus_map()
668 cfp->c_busnum = PCI_REG_BUS_G(pci_rp->pci_phys_hi); in npe_bus_map()
669 cfp->c_devnum = PCI_REG_DEV_G(pci_rp->pci_phys_hi); in npe_bus_map()
670 cfp->c_funcnum = PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in npe_bus_map()
/illumos-gate/usr/src/uts/i86pc/io/psm/
H A Dpsm_common.c244 *bus = (int)PCI_REG_BUS_G(pci_rp->pci_phys_hi); in get_bdf()
246 *device = (int)PCI_REG_DEV_G(pci_rp->pci_phys_hi); in get_bdf()
248 *func = (int)PCI_REG_FUNC_G(pci_rp->pci_phys_hi); in get_bdf()
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dnhm_pci_cfg.c59 reg.pci_phys_hi = PCI_REG_MAKE_BDFR( in nhm_pci_cfg_setup()

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