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Searched refs:off (Results 1 – 9 of 9) sorted by relevance

/gfx-drm/usr/src/uts/common/io/drm/
H A Ddrm_sunmod.c138 drm_devmap_unmap(devmap_cookie_t dhc, void *pvtp, offset_t off, size_t len, in drm_devmap_unmap() argument
142 _NOTE(ARGUNUSED(off, len)) in drm_devmap_unmap()
218 offset_t off, size_t len, void **pvtp) in drm_gem_map() argument
239 map = __find_local_map(dev, off); in drm_gem_map()
346 drm_gem_unmap(devmap_cookie_t dhc, void *pvt, offset_t off, size_t len, in drm_gem_unmap() argument
359 _NOTE(ARGUNUSED(off, len)) in drm_gem_unmap()
H A Ddrm_memory.c99 drm_get_pci_index_reg(dev_info_t *dip, uint_t paddr, uint_t size, off_t *off) in drm_get_pci_index_reg() argument
130 *off = (off_t)(paddr - regbase); in drm_get_pci_index_reg()
/gfx-drm/usr/src/uts/common/sys/
H A Dgfx_private.h55 offset_t off, size_t len, uint_t maxprot, uint_t flags,
101 extern int gfxp_vgatext_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off,
/gfx-drm/usr/src/uts/intel/io/radeon/
H A Dradeon_drv.h333 #define RADEON_CHECK_OFFSET(dev_priv, off) \ argument
334 (((off >= dev_priv->fb_location) && \
335 (off <= (dev_priv->fb_location + dev_priv->fb_size - 1))) || \
336 ((off >= dev_priv->gart_vm_start) && \
337 (off <= (dev_priv->gart_vm_start + dev_priv->gart_size - 1))))
H A Dradeon_state.c52 u64 off = *offset; in radeon_check_and_fixup_offset() local
76 if (RADEON_CHECK_OFFSET(dev_priv, off)) in radeon_check_and_fixup_offset()
84 if (off < (dev_priv->fb_size + dev_priv->gart_size)) { in radeon_check_and_fixup_offset()
86 off += radeon_priv->radeon_fb_delta; in radeon_check_and_fixup_offset()
90 if (off > fb_end) in radeon_check_and_fixup_offset()
91 off = off - fb_end - 1 + dev_priv->gart_vm_start; in radeon_check_and_fixup_offset()
94 if (RADEON_CHECK_OFFSET(dev_priv, off)) { in radeon_check_and_fixup_offset()
95 DRM_DEBUG("offset fixed up to 0x%x\n", off); in radeon_check_and_fixup_offset()
96 *offset = (uint32_t)off; in radeon_check_and_fixup_offset()
/gfx-drm/usr/src/uts/intel/io/agpmaster/
H A Dagpmaster.c74 #define AGPM_WRITE(x, off, val) \ argument
75 ddi_put32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)), (val));
77 #define AGPM_READ(x, off) \ argument
78 ddi_get32(MMIO_HANDLE(x), (uint32_t *)(MMIO_BASE(x) + (off)));
/gfx-drm/usr/src/uts/intel/io/agpgart/
H A Dagpgart.c148 offset_t off, size_t len, devmap_cookie_t new_handle1, in agp_devmap_unmap() argument
157 ASSERT(AGP_ALIGNED(len) && AGP_ALIGNED(off)); in agp_devmap_unmap()
175 newctxp2->actx_off = off + len; in agp_devmap_unmap()
182 agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(off)); in agp_devmap_unmap()
187 agp_find_bound_keyent(softstate, AGP_BYTES2PAGES(off)); in agp_devmap_unmap()
3277 agpgart_segmap(dev_t dev, off_t off, struct as *asp, in agpgart_segmap() argument
3297 rc = devmap_setup(dev, (offset_t)off, asp, addrp, in agpgart_segmap()
/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_drv.h381 void (*off)(struct drm_crtc *crtc); member
H A Dintel_display.c3810 dev_priv->display.off(crtc); in intel_crtc_disable()
9337 dev_priv->display.off = haswell_crtc_off; in intel_init_display()
9344 dev_priv->display.off = ironlake_crtc_off; in intel_init_display()
9351 dev_priv->display.off = i9xx_crtc_off; in intel_init_display()
9358 dev_priv->display.off = i9xx_crtc_off; in intel_init_display()