/illumos-gate/usr/src/test/bhyve-tests/tests/kdev/ |
H A D | payload_vlapic_msr_access.c | 111 for (uint32_t msr = MSR_X2APIC_BASE; msr <= MSR_X2APIC_MAX; msr++) { in start() local 114 if (reg_readable(msr)) { in start() 115 val = rdmsr(msr); in start() 118 if (reg_writable(msr)) { in start() 119 if (msr == 0x828) { in start() 126 wrmsr(msr, val); in start()
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/illumos-gate/usr/src/cmd/bhyve/ |
H A D | uart_emul.c | 353 uint8_t msr; in modem_status() local 360 msr = 0; in modem_status() 366 msr |= MSR_RI; in modem_status() 378 return (msr); in modem_status() 474 uint8_t msr; in uart_write() local 554 if ((msr & MSR_CTS) ^ (sc->msr & MSR_CTS)) in uart_write() 556 if ((msr & MSR_DSR) ^ (sc->msr & MSR_DSR)) in uart_write() 558 if ((msr & MSR_DCD) ^ (sc->msr & MSR_DCD)) in uart_write() 560 if ((sc->msr & MSR_RI) != 0 && (msr & MSR_RI) == 0) in uart_write() 568 sc->msr |= msr; in uart_write() [all …]
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/illumos-gate/usr/src/uts/intel/os/ |
H A D | hma.c | 403 uint64_t msr; in hma_vmx_query_details() local 406 msr = rdmsr(MSR_IA32_VMX_BASIC); in hma_vmx_query_details() 412 hma_vmx_revision = (uint32_t)msr; in hma_vmx_query_details() 421 msr = rdmsr(query_true_ctl ? in hma_vmx_query_details() 435 msr = rdmsr(MSR_IA32_VMX_EPT_VPID_CAP); in hma_vmx_query_details() 453 uint64_t msr; in hma_vmx_init() local 463 msr = rdmsr(MSR_IA32_FEAT_CTRL); in hma_vmx_init() 464 if ((msr & IA32_FEAT_CTRL_LOCK) != 0 && in hma_vmx_init() 675 uint64_t msr; in hma_svm_init() local 685 msr = rdmsr(MSR_AMD_VM_CR); in hma_svm_init() [all …]
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/illumos-gate/usr/src/uts/i86pc/io/apix/ |
H A D | apix_regops.c | 46 static uint64_t local_x2apic_read(uint32_t msr); 47 static void local_x2apic_write(uint32_t msr, uint64_t value); 80 local_x2apic_read(uint32_t msr) in local_x2apic_read() argument 84 i = (uint64_t)(rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2)) & 0xffffffff); in local_x2apic_read() 89 local_x2apic_write(uint32_t msr, uint64_t value) in local_x2apic_write() argument 93 if (msr != APIC_EOI_REG) { in local_x2apic_write() 94 tmp = rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2)); in local_x2apic_write() 100 wrmsr((REG_X2APIC_BASE_MSR + (msr >> 2)), tmp); in local_x2apic_write()
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/illumos-gate/usr/src/test/bhyve-tests/tests/vmm/ |
H A D | datarw_msrs.c | 129 uint32_t msr; in main() member 132 { .msr = MSR_AMD_EFER, .name = "EFER" }, in main() 133 { .msr = REG_TSC, .name = "TSC" }, in main() 134 { .msr = MSR_AMD_CSTAR, .name = "CSTAR" }, in main() 135 { .msr = MSR_AMD_KGSBASE, .name = "KGSBASE" }, in main() 139 if (spot_check[j].msr == entries[i].vfe_ident) { in main() 148 spot_check[j].name, spot_check[j].msr); in main()
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/illumos-gate/usr/src/uts/i86pc/os/ |
H A D | cmi_hw.c | 347 hep->msrie_msrnum = msr; in msri_addent() 784 uint_t msr = (uint_t)arg1; in ntv_rdmsr_xc() local 822 uint_t msr = (uint_t)arg1; in ntv_wrmsr_xc() local 857 msri_addent(hdl, msr, val); in ntv_msrinterpose() 1068 switch (msr) { in xpv_rdmsr() 1088 #define IS_MCA_INJ_MSR(msr) \ argument 1089 (((msr) >= IA32_MSR_MC(0, CTL) && (msr) <= IA32_MSR_MC(10, MISC)) || \ 1090 (msr) == IA32_MSR_MCG_STATUS) 1101 if (!IS_MCA_INJ_MSR(msr)) in xpv_wrmsr_cmn() 1110 mci->mcinj_msr[0].reg = msr; in xpv_wrmsr_cmn() [all …]
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H A D | mp_startup.c | 707 cp->cpu_id, rw, msr, error); in msr_warning() 924 const uint_t msr = MSR_AMD_PATCHLEVEL; in workaround_errata() local 927 if ((err = checked_rdmsr(msr, &value)) != 0) { in workaround_errata() 928 msr_warning(cpu, "rd", msr, err); in workaround_errata() 985 const uint_t msr = MSR_AMD_HWCR; in workaround_errata() local 1005 msr_warning(cpu, "rd", msr, error); in workaround_errata() 1011 msr_warning(cpu, "wr", msr, error); in workaround_errata() 1032 const uint_t msr = MSR_AMD_PATCHLEVEL; in workaround_errata() local 1048 msr_warning(cpu, "rd", msr, err); in workaround_errata() 1070 const uint_t msr = MSR_AMD_NB_CFG; in workaround_errata() local [all …]
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H A D | machdep.c | 1171 checked_rdmsr(uint_t msr, uint64_t *value) in checked_rdmsr() argument 1175 *value = rdmsr(msr); in checked_rdmsr() 1184 checked_wrmsr(uint_t msr, uint64_t value) in checked_wrmsr() argument 1188 wrmsr(msr, value); in checked_wrmsr()
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/illumos-gate/usr/src/uts/intel/io/vmm/intel/ |
H A D | vmx_msr.h | 64 #define guest_msr_rw(vmx, vcpuid, msr) \ argument 65 vmx_msr_bitmap_change_access((vmx), (vcpuid), (msr), MSR_BITMAP_ACCESS_RW) 67 #define guest_msr_ro(vmx, vcpuid, msr) \ argument 68 vmx_msr_bitmap_change_access((vmx), (vcpuid), (msr), MSR_BITMAP_ACCESS_READ)
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H A D | vmx_msr.c | 163 vmx_msr_bitmap_change_access(struct vmx *vmx, int vcpuid, uint_t msr, int acc) in vmx_msr_bitmap_change_access() argument 168 if (msr <= 0x00001FFF) { in vmx_msr_bitmap_change_access() 169 byte = msr / 8; in vmx_msr_bitmap_change_access() 170 } else if (msr >= 0xC0000000 && msr <= 0xC0001FFF) { in vmx_msr_bitmap_change_access() 171 byte = 1024 + (msr - 0xC0000000) / 8; in vmx_msr_bitmap_change_access() 173 panic("Invalid MSR for bitmap: %x", msr); in vmx_msr_bitmap_change_access() 176 bit = msr & 0x7; in vmx_msr_bitmap_change_access()
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H A D | vmcs.c | 166 vmcs_msr_encoding(uint32_t msr) in vmcs_msr_encoding() argument 168 switch (msr) { in vmcs_msr_encoding()
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/illumos-gate/usr/src/test/bhyve-tests/tests/inst_emul/ |
H A D | wrmsr.c | 68 if (vexit.u.msr.code != expected_code) { in main() 70 vexit.u.msr.code, expected_code); in main() 72 if (vexit.u.msr.wval != expected_wval) { in main() 74 vexit.u.msr.wval, expected_wval); in main()
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H A D | rdmsr.c | 67 if (vexit.u.msr.code != expected_code) { in main() 69 vexit.u.msr.code, expected_code); in main()
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/illumos-gate/usr/src/uts/common/io/axf/ |
H A D | axf_usbgem.c | 259 uint16_t msr; member 434 lp->msr = 0; in axf_init_chip() 608 uint16_t msr; in axf_set_media() local 616 msr = lp->msr; in axf_set_media() 632 msr |= MSR_PS; in axf_set_media() 642 msr &= ~MSR_FDPX; in axf_set_media() 644 msr |= MSR_FDPX; in axf_set_media() 648 msr &= ~MSR_FCEN; in axf_set_media() 660 msr |= MSR_TFC; in axf_set_media() 668 msr |= MSR_RFC; in axf_set_media() [all …]
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/illumos-gate/usr/src/grub/grub-0.97/netboot/ |
H A D | cpu.h | 193 #define rdmsr(msr,val1,val2) \ argument 196 : "c" (msr)) 198 #define wrmsr(msr,val1,val2) \ argument 201 : "c" (msr), "a" (val1), "d" (val2))
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/illumos-gate/usr/src/boot/sys/amd64/include/ |
H A D | cpufunc.h | 352 rdmsr(u_int msr) in rdmsr() argument 356 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); in rdmsr() 361 rdmsr32(u_int msr) in rdmsr32() argument 365 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "rdx"); in rdmsr32() 409 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument 415 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); in wrmsr() 853 uint64_t rdmsr(u_int msr); 854 uint32_t rdmsr32(u_int msr); 868 void wrmsr(u_int msr, uint64_t newval); 875 int rdmsr_safe(u_int msr, uint64_t *val); [all …]
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/illumos-gate/usr/src/boot/sys/i386/include/ |
H A D | cpufunc.h | 330 rdmsr(u_int msr) in rdmsr() argument 334 __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); in rdmsr() 339 rdmsr32(u_int msr) in rdmsr32() argument 343 __asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "edx"); in rdmsr32() 387 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument 389 __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); in wrmsr() 766 uint64_t rdmsr(u_int msr); 788 void wrmsr(u_int msr, uint64_t newval); 795 int rdmsr_safe(u_int msr, uint64_t *val); 796 int wrmsr_safe(u_int msr, uint64_t newval);
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/illumos-gate/usr/src/uts/intel/io/vmm/amd/ |
H A D | svm.c | 201 *bit = (msr % 4) * 2; in svm_msr_index() 204 if (msr <= MSR_PENTIUM_END) { in svm_msr_index() 205 *index = msr / 4; in svm_msr_index() 210 if (msr >= MSR_AMD6TH_START && msr <= MSR_AMD6TH_END) { in svm_msr_index() 211 off = (msr - MSR_AMD6TH_START); in svm_msr_index() 217 if (msr >= MSR_AMD7TH_START && msr <= MSR_AMD7TH_END) { in svm_msr_index() 218 off = (msr - MSR_AMD7TH_START); in svm_msr_index() 239 "msr %lx", __func__, bit, msr)); in svm_msr_perm() 1258 vmexit->u.msr.code = ecx; in svm_handle_msr() 1259 vmexit->u.msr.wval = val; in svm_handle_msr() [all …]
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H A D | vmcb.c | 154 vmcb_msr_ptr(struct vmcb *vmcb, uint32_t msr, uint32_t *dirtyp) in vmcb_msr_ptr() argument 160 switch (msr) { in vmcb_msr_ptr()
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/illumos-gate/usr/src/compat/bhyve/amd64/machine/ |
H A D | cpufunc.h | 119 rdmsr(u_int msr) in rdmsr() argument 123 __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); in rdmsr() 128 wrmsr(u_int msr, uint64_t newval) in wrmsr() argument 134 __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); in wrmsr()
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/illumos-gate/usr/src/uts/intel/io/vmm/ |
H A D | vmm_lapic.h | 47 int lapic_rdmsr(struct vm *vm, int cpu, uint_t msr, uint64_t *rval); 48 int lapic_wrmsr(struct vm *vm, int cpu, uint_t msr, uint64_t wval);
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/illumos-gate/usr/src/uts/intel/io/vmm/io/ |
H A D | vlapic.c | 1597 vlapic_msr_to_regoff(uint32_t msr) in vlapic_msr_to_regoff() argument 1599 ASSERT3U(msr, >=, MSR_APIC_000); in vlapic_msr_to_regoff() 1602 return ((msr - MSR_APIC_000) << 4); in vlapic_msr_to_regoff() 1606 vlapic_owned_msr(uint32_t msr) in vlapic_owned_msr() argument 1608 if (msr == MSR_APICBASE) { in vlapic_owned_msr() 1611 if (msr >= MSR_APIC_000 && in vlapic_owned_msr() 1612 msr < (MSR_APIC_000 + 0x100)) { in vlapic_owned_msr() 1621 ASSERT(vlapic_owned_msr(msr)); in vlapic_rdmsr() 1624 if (msr == MSR_APICBASE) { in vlapic_rdmsr() 1666 ASSERT(vlapic_owned_msr(msr)); in vlapic_wrmsr() [all …]
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/illumos-gate/usr/src/uts/intel/io/coretemp/ |
H A D | coretemp.c | 109 uint_t msr = (uint_t)arg1; in coretemp_rdmsr_xc() local 116 if (checked_rdmsr(msr, valp) == 0) { in coretemp_rdmsr_xc() 135 coretemp_rdmsr(coretemp_t *ct, cmi_hdl_t hdl, uint_t msr, uint64_t *valp) in coretemp_rdmsr() argument 143 (void) coretemp_rdmsr_xc((xc_arg_t)msr, (xc_arg_t)valp, in coretemp_rdmsr() 147 xc_call((xc_arg_t)msr, (xc_arg_t)valp, (xc_arg_t)&ret, in coretemp_rdmsr()
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/illumos-gate/usr/src/uts/sun4/io/ |
H A D | su_driver.c | 1920 if ((msr & DCD) == 0) in asy_ppsevent() 1926 } else if (msr & DCD) { in asy_ppsevent() 1979 int msr; in async_msint() local 1982 asy->asy_cached_msr = msr; in async_msint() 1987 (msr & DCTS) ? "CTS" : " ", in async_msint() 1988 (msr & DDSR) ? "DSR" : " ", in async_msint() 1989 (msr & DRI) ? "RI " : " ", in async_msint() 1990 (msr & DDCD) ? "DCD" : " ", in async_msint() 1991 (msr & CTS) ? "CTS" : " ", in async_msint() 2006 OUTB(MSR, (msr & 0xF0)); in async_msint() [all …]
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/illumos-gate/usr/src/uts/intel/pcbe/ |
H A D | core_pcbe.c | 174 #define WRMSR(msr, value) \ argument 175 wrmsr((msr), (value)); \ 176 DTRACE_PROBE2(wrmsr, uint64_t, (msr), uint64_t, (value)); 178 #define RDMSR(msr, value) \ argument 179 (value) = rdmsr((msr)); \ 180 DTRACE_PROBE2(rdmsr, uint64_t, (msr), uint64_t, (value));
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