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Searched refs:mmu (Results 1 – 25 of 26) sorted by relevance

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/illumos-gate/usr/src/uts/i86pc/vm/
H A Dhat_pte.h109 (pa_to_ma(pfn_to_pa(pfn)) | mmu.pte_bits[l]))
112 (pfn_to_pa(pfn) | mmu.ptp_bits[(l) + 1])
114 (pfn_to_pa(pfn) | mmu.pte_bits[l])
144 #define LEVEL_SHIFT(l) (mmu.level_shift[l])
145 #define LEVEL_SIZE(l) (mmu.level_size[l])
146 #define LEVEL_OFFSET(l) (mmu.level_offset[l])
147 #define LEVEL_MASK(l) (mmu.level_mask[l])
238 #define PWIN_PTE_VA(x) (mmu.pwin_pte_va + ((x) << mmu.pte_size_shift))
239 #define PWIN_PTE_PA(x) (mmu.pwin_pte_pa + ((x) << mmu.pte_size_shift))
253 #define IN_VA_HOLE(va) (mmu.hole_start <= (va) && (va) < mmu.hole_end)
[all …]
H A Di86_mmu.c137 mmu.kmap_htables = in hat_kmap_init()
149 mmu.kmap_htables[i] = ht; in hat_kmap_init()
164 mmu.kmap_addr = map_addr; in hat_kmap_init()
165 mmu.kmap_eaddr = map_eaddr; in hat_kmap_init()
166 mmu.kmap_ptes = (x86pte_t *)ptes; in hat_kmap_init()
242 level_t lpagel = mmu.max_page_level; in hat_kern_alloc()
292 nwindows = MAX(nwindows, mmu.max_level); in hat_kern_alloc()
313 mmu.pwin_pte_pa = paddr; in hat_kern_alloc()
316 kbm_read_only((uintptr_t)mmu.pwin_pte_va, mmu.pwin_pte_pa); in hat_kern_alloc()
318 kbm_map((uintptr_t)mmu.pwin_pte_va, mmu.pwin_pte_pa, 0, 1); in hat_kern_alloc()
[all …]
H A Dhat_i86.c786 shift = _userlimit >> mmu.level_shift[mmu.max_level]; in mmu_calc_user_slots()
806 mmu.num_copied_ents = mmu.top_level_uslots; in mmu_calc_user_slots()
868 mmu.hole_end = 0ul - mmu.hole_start - 1; in mmu_init()
871 mmu.hole_start = mmu.hole_end - 1; in mmu_init()
921 mmu.level_size[i] = 1UL << mmu.level_shift[i]; in mmu_init()
922 mmu.level_offset[i] = mmu.level_size[i] - 1; in mmu_init()
923 mmu.level_mask[i] = ~mmu.level_offset[i]; in mmu_init()
959 mmu.hat32_hash_cnt = mmu.hash_cnt; in mmu_init()
998 if (mmu.hash_cnt == mmu.hat32_hash_cnt) { in hat_init()
2113 if (mmu.kmap_addr <= va && va < mmu.kmap_eaddr) { in hat_memload()
[all …]
H A Dhtable.c1564 if (mmu.pae_hat) in htable_attach()
1650 if (l == mmu.max_level && va >= mmu.hole_start && va <= mmu.hole_end) in htable_scan()
1651 va = mmu.hole_end + va - mmu.hole_start; in htable_scan()
1872 if (ht->ht_level == mmu.max_level && va >= mmu.hole_start) in htable_e2va()
1873 va += ((mmu.hole_end - mmu.hole_start) + 1); in htable_e2va()
1962 if (mmu.pae_hat) in x86pte_mapin()
1968 newpte = MAKEPTE(pfn, 0) | mmu.pt_global | mmu.pt_nx; in x86pte_mapin()
1987 if (mmu.pae_hat) in x86pte_mapin()
2352 pte = MAKEPTE(src->ht_pfn, 0) | mmu.pt_global | mmu.pt_nx; in x86pte_copy()
2354 if (mmu.pae_hat) in x86pte_copy()
[all …]
H A Dhat_kdi.c88 hat_kdi_use_pae = mmu.pae_hat; in hat_kdi_init()
184 for (level = mmu.max_level; ; --level) { in kdi_vtop()
185 index = (va >> LEVEL_SHIFT(level)) & (mmu.ptes_per_table - 1); in kdi_vtop()
186 *pap += index << mmu.pte_size_shift; in kdi_vtop()
188 if (kdi_pread((caddr_t)&pte, mmu.pte_size, *pap, &len) != 0) in kdi_vtop()
192 if (level > 0 && level <= mmu.max_page_level && in kdi_vtop()
H A Dhtable.h137 (((ht)->ht_level == mmu.max_level) ? 512 : 4) : 512)
140 ((ht)->ht_level == mmu.max_level ? ((uintptr_t)0UL - MMU_PAGESIZE) :\
145 ((va & LEVEL_MASK(l)) + LEVEL_SIZE(l) == mmu.hole_start ? \
146 mmu.hole_end : (va & LEVEL_MASK(l)) + LEVEL_SIZE(l))
151 (!mmu.pae_hat ? 1024 : ((ht)->ht_level == 2 ? 4 : 512))
H A Dkboot_mmu.c264 probe_va = mmu.hole_end; in kbm_probe()
317 if (PTE_GET(pte_val, mmu.pt_nx)) in kbm_probe()
H A Dvm_machdep.c488 for (l = mmu.umax_page_level; l > 0; --l) { in map_pgsz()
505 for (l = mmu.umax_page_level; l > 0; --l) { in map_pgsz()
562 if (mmu.max_page_level == 0) in map_pgszcvec()
840 mmu.umax_page_level; in map_addr_proc()
1269 pfnseg = mmu.highest_pfn; in page_get_contigpage()
1837 for (i = 0; i <= mmu.max_page_level; i++) { in page_coloring_init()
1857 for (i = 0; i <= mmu.max_page_level; i++) { in page_coloring_init()
1878 for (i = 0; i <= mmu.max_page_level; i++) { in page_coloring_init()
4051 offset += mmu.hole_start; /* something in VA hole */ in page_get_physical()
/illumos-gate/usr/src/cmd/mdb/i86pc/modules/unix/
H A Di86mmu.c71 if (mmu.num_level == 0) in platform_vtop()
165 struct hat_mmu_info mmu; variable
185 if (mmu.num_level != 0) in init_mmu()
188 if (mdb_readsym(&mmu, sizeof (mmu), "mmu") == -1) in init_mmu()
488 if (mmu.num_level == 0) in pte_dcmd()
532 if ((mdb_pread(&buf, mmu.pte_size, paddr)) == mmu.pte_size) in get_pte()
647 if (mmu.num_level == 0) in va2pfn_dcmd()
810 if (mmu.num_level == 0) in report_maps_dcmd()
932 if (mmu.num_level == 0) in ptable_dcmd()
1003 if (mmu.num_level == 0) in htables_dcmd()
[all …]
/illumos-gate/usr/src/lib/libvmm/
H A Dlibvmm.c720 if ((mmu->vm_cr0 & CR0_PE) == 0) in vmm_vcpu_mmu_mode()
722 else if ((mmu->vm_cr4 & CR4_PAE) == 0) in vmm_vcpu_mmu_mode()
724 else if ((mmu->vm_efer & AMD_EFER_LME) == 0) in vmm_vcpu_mmu_mode()
733 vmm_mmu_t mmu = { 0 }; in vmm_vcpu_mode() local
736 vmm_mmu_regnum, (uint64_t *)&mmu) != 0) in vmm_vcpu_mode()
739 return (vmm_vcpu_mmu_mode(vmm, vcpuid, &mmu)); in vmm_vcpu_mode()
817 vmm_mmu_t mmu = { 0 }; in vmm_vtop() local
824 vmm_mmu_regnum, (uint64_t *)&mmu) != 0) in vmm_vtop()
827 if ((mmu.vm_cr0 & CR0_PG) == 0) { in vmm_vtop()
833 switch (vmm_vcpu_mmu_mode(vmm, vcpuid, &mmu)) { in vmm_vtop()
[all …]
/illumos-gate/usr/src/uts/i86xpv/os/
H A Dxpv_panic.c169 if (mmu.pae_hat) in xpv_panic_map()
200 for (l = mmu.max_level; l >= 0; l--) in xpv_va_walk()
208 for (l = mmu.max_level; l >= 0; l--) { in xpv_va_walk()
219 if (l == mmu.max_level && mmu.pae_hat) in xpv_va_walk()
228 (idx << mmu.pte_size_shift)); in xpv_va_walk()
233 scan_va += mmu.level_size[l]; in xpv_va_walk()
756 for (l = mmu.max_level; l >= 0; l--) in xpv_do_panic()
757 xpv_panic_nptes[l] = mmu.ptes_per_table; in xpv_do_panic()
995 for (i = 0; i < mmu.num_level; i++) in xpv_panic_init()
/illumos-gate/usr/src/uts/intel/asm/
H A DMakefile37 mmu.h \
/illumos-gate/usr/src/uts/i86pc/os/
H A Dstartup.c360 ((uintptr_t)P2ROUNDUP((uintptr_t)(x), mmu.level_size[1]))
364 ((uintptr_t)P2ROUNDUP((uintptr_t)(x), mmu.level_size[mmu.max_level]))
634 valloc_align = mmu.level_size[mmu.max_page_level > 0]; in perform_allocations()
1094 mmu.pt_nx = 0; in startup_memlist()
1096 PRM_DEBUG(mmu.pt_nx); in startup_memlist()
2003 if (!auto_lpg_disable && mmu.max_page_level > 0) { in startup_vm()
2011 if (physmem < privm_lpg_min_physmem || mmu.max_page_level == 0 || in startup_vm()
2016 mcntl0_lpsize = LEVEL_SIZE(mmu.umax_page_level); in startup_vm()
H A Dtrap.c498 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { in trap()
832 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { in trap()
/illumos-gate/usr/src/cmd/mdb/intel/modules/mdb_kb/
H A Dmdb_kb.c744 xkb_get_pte(mmu_info_t *mmu, char *ptep) in xkb_get_pte() argument
748 if (mmu->mi_ptesize == 8) { in xkb_get_pte()
778 mmu_info_t *mmu = &xkb->xkb_mmu; in xkb_va_to_mfn() local
782 for (level = mmu->mi_max; ; --level) { in xkb_va_to_mfn()
788 entry = (va >> mmu->mi_shift[level]) & (mmu->mi_ptes - 1); in xkb_va_to_mfn()
790 pte = xkb_get_pte(mmu, (char *)xkb->xkb_pt_map[level].mm_map + in xkb_va_to_mfn()
791 entry * mmu->mi_ptesize); in xkb_va_to_mfn()
806 mfn += (va & ((1 << mmu->mi_shift[level]) - 1)) >> in xkb_va_to_mfn()
/illumos-gate/usr/src/uts/sun4v/ml/
H A Dwbuf.S60 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
196 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
396 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
/illumos-gate/usr/src/
H A DMakefile.psm52 ROOT_PSM_MMU_DIR_32 = $(ROOT_PSM_MOD_DIR)/mmu
71 ROOT_PSM_MMU_DIR_64 = $(ROOT_PSM_MOD_DIR)/mmu/$(SUBDIR64)
/illumos-gate/usr/src/uts/sun4u/ml/
H A Dwbuf.S59 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
193 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
334 ! g5 = mmu trap type, g6 = tag access reg (g5 != T_ALIGNMENT) or
H A Dtrap_table.S2697 SWITCH_GLOBALS ! back to mmu globals
/illumos-gate/usr/src/uts/sun4/io/fpc/
H A Dfpc.h55 mmu, enumerator
H A Dfpc-kstats.c266 case mmu: in fpc_dev_kstat()
318 else if (reg_group == mmu) in fpc_dev_kstat()
/illumos-gate/usr/src/uts/sun4u/io/px/
H A Dpx_err_impl.h207 PX_ERPT_SEND_DEC(mmu);
H A Dpx_err.c290 { MMU_BIT_DESC(TTC_CAE, panic, mmu) }
613 { CHP_FO, MnT6(mmu), R4(MMU), "MMU Error"},
1751 PX_ERPT_SEND_DEC(mmu) in PX_ERPT_SEND_DEC() argument
/illumos-gate/usr/src/uts/sun4/ml/
H A Dswtch.S146 ldn [THREAD_REG + T_PROCP], %i2 ! load old curproc - for mmu
/illumos-gate/usr/src/uts/sfmmu/ml/
H A Dsfmmu_asm.S581 lduw [%o2 + CPU_MMU_IDX], %g2 ! %g2 = mmu index

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