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Searched refs:ipltospl (Results 1 – 25 of 54) sorted by relevance

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/illumos-gate/usr/src/uts/common/os/
H A Dpanic.c311 splx(ipltospl(CLOCK_LEVEL)); in panicsys()
378 splx(ipltospl(CLOCK_LEVEL)); in panicsys()
396 splx(MIN(s, ipltospl(CLOCK_LEVEL))); in panicsys()
H A Dunix_bb.c115 lock_set_spl(&unix_bb_lock, ipltospl(NMI_LEVEL), &s);
H A Dsoftint.c191 (void *)ipltospl(SPL8)); in softcall_init()
H A Dlogsubr.c210 log_freeq = log_makeq(LOG_MINFREE, LOG_MAXFREE, (void *)ipltospl(SPL8)); in log_init()
216 log_intrq = log_makeq(0, LOG_HIWAT, (void *)ipltospl(SPL8)); in log_init()
/illumos-gate/usr/src/uts/i86pc/os/
H A Dpci_cfgspace.c115 (ddi_iblock_cookie_t)ipltospl(15)); in pci_cfgspace_init()
117 (ddi_iblock_cookie_t)ipltospl(DISP_LEVEL)); in pci_cfgspace_init()
119 (ddi_iblock_cookie_t)ipltospl(15)); in pci_cfgspace_init()
H A Dmp_call.c83 int save_spl = splr(ipltospl(XC_HI_PIL)); in cpu_call()
H A Dx_call.c476 save_spl = splr(ipltospl(XC_HI_PIL)); in xc_common()
634 int save_spl = splr(ipltospl(XC_HI_PIL)); in xc_priority()
/illumos-gate/usr/src/uts/intel/sys/
H A Dspl.h37 #define ipltospl(n) (n) macro
H A Dmachlock.h65 #define SPIN_LOCK(pl) ((pl) > ipltospl(LOCK_LEVEL))
/illumos-gate/usr/src/uts/sparc/sys/
H A Dspl.h39 #define ipltospl(n) (n) macro
H A Dmachlock.h61 #define SPIN_LOCK(pl) ((pl) > ipltospl(LOCK_LEVEL))
/illumos-gate/usr/src/uts/sun4u/os/
H A Dmach_cpu_states.c293 if (spl == ipltospl(PIL_14)) { in panic_enter_hw()
312 } else if (spl == ipltospl(PIL_15)) { in panic_enter_hw()
/illumos-gate/usr/src/uts/sun/sys/
H A Dzsdev.h271 #define ZS_PL ipltospl(SPL3) /* translates to SPARC IPL 6 */
272 #define ZS_PL_HI ipltospl(SPLTTY) /* translates to SPARC IPL 12 */
/illumos-gate/usr/src/uts/i86pc/sys/
H A Dclock.h96 ipltospl(XC_HI_PIL), oldsplp)
/illumos-gate/usr/src/uts/i86pc/io/
H A Dcbe.c164 return (splr(ipltospl(ipl))); in cbe_set_level()
303 s = splr(ipltospl(XC_HI_PIL)); in cbe_hres_tick()
/illumos-gate/usr/src/uts/sun4/sys/
H A Dclock.h168 ipltospl(CBE_HIGH_PIL), oldsplp)
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_sc.c106 (void *)ipltospl(XCALL_PIL)); in sc_create()
/illumos-gate/usr/src/uts/common/disp/
H A Ddisp_lock.c86 lock_set_spl(lp, ipltospl(DISP_LEVEL), &curthread->t_oldspl); in disp_lock_enter()
/illumos-gate/usr/src/uts/intel/os/
H A Dcpc_subr.c65 return (ipltospl(APIC_PCINT_IPL)); in kcpc_hw_add_ovf_intr()
/illumos-gate/usr/src/uts/common/ipp/
H A Dippconf.c278 (void *)ipltospl(LOCK_LEVEL)); in ipp_init()
1700 (void *)ipltospl(LOCK_LEVEL)); in ipp_stat_create()
3277 (void *)ipltospl(LOCK_LEVEL)); in init_mods()
3292 (void *)ipltospl(LOCK_LEVEL)); in init_mods()
3308 (void *)ipltospl(LOCK_LEVEL)); in init_actions()
3325 (void *)ipltospl(LOCK_LEVEL)); in init_actions()
3384 (void *)ipltospl(LOCK_LEVEL)); in mod_constructor()
3468 (void *)ipltospl(LOCK_LEVEL)); in action_constructor()
H A Dipp_impl.h115 (void *)ipltospl(LOCK_LEVEL)); \
/illumos-gate/usr/src/uts/sun4/os/
H A Dcpu_states.c244 if ((s = getpil()) < ipltospl(12)) in debug_enter()
H A Dmp_states.c55 mutex_init(&cpu_idle_lock, NULL, MUTEX_SPIN, (void *)ipltospl(PIL_15)); in idlestop_init()
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_pbm.c131 (void *)(uintptr_t)ipltospl(spltoipl( in pcmu_pbm_register_intr()
/illumos-gate/usr/src/uts/sparc/os/
H A Darchdep.c250 return (ipltospl(ipl)); in __ipltospl()

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