Home
last modified time | relevance | path

Searched refs:ih_p (Results 1 – 11 of 11) sorted by relevance

/illumos-gate/usr/src/uts/sun4/io/px/
H A Dpx_ib.c495 ih_p->ih_next = ih_p; in px_ib_new_ino_pil()
771 if ((ih_p->ih_dip == rdip) && (ih_p->ih_inum == inum) && in px_ib_intr_locate_ih()
786 px_ih_t *ih_p; in px_ib_alloc_ih() local
803 return (ih_p); in px_ib_alloc_ih()
815 px_ih_t *ih_p; in px_ib_update_intr_state() local
1118 px_ih_t *ih_p; in pxtool_ib_get_ino_devs() local
1132 i++, j++, ih_p = ih_p->ih_next) { in pxtool_ib_get_ino_devs()
1174 px_ih_t *ih_p; in pxtool_ib_get_msi_info() local
1188 i++, ih_p = ih_p->ih_next) { in pxtool_ib_get_msi_info()
1218 px_ih_t *ih_p; in px_ib_log_new_cpu() local
[all …]
H A Dpx_intr.c74 px_ih_t *ih_p; in px_spurintr() local
106 i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) in px_spurintr()
159 for (i = 0; i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) { in px_intx_intr()
259 px_ih_t *ih_p; in px_msiq_intr() local
353 ih_p = ih_p->ih_next, j++) in px_msiq_intr()
929 ih_p->ih_ksp->ks_private = ih_p; in px_create_intr_kstats()
947 px_ih_t *ih_p; in px_add_intx_intr() local
1037 ih_p->ih_handler_arg1, ih_p->ih_handler_arg2); in px_add_intx_intr()
1105 px_ih_t *ih_p; in px_rem_intx_intr() local
1162 px_ih_t *ih_p; in px_add_msiq_intr() local
[all …]
H A Dpx_ib.h145 uint_t pil, px_ih_t *ih_p);
147 extern int px_ib_ino_add_intr(px_t *px_p, px_ino_pil_t *ipil_p, px_ih_t *ih_p);
148 extern int px_ib_ino_rem_intr(px_t *px_p, px_ino_pil_t *ipil_p, px_ih_t *ih_p);
156 extern void px_ib_free_ih(px_ih_t *ih_p);
/illumos-gate/usr/src/uts/sun4u/opl/io/pcicmu/
H A Dpcmu_intr.c70 ih_t *ih_p = ino_p->pino_ih_start; in pcmu_spurintr() local
98 for (i = 0; i < ino_p->pino_ih_size; i++, ih_p = ih_p->ih_next) { in pcmu_spurintr()
100 ih_p->ih_inum); in pcmu_spurintr()
129 ih_t *ih_p = ino_p->pino_ih_start; in pcmu_intr_wrapper() local
136 for (i = 0; i < ino_p->pino_ih_size; i++, ih_p = ih_p->ih_next) { in pcmu_intr_wrapper()
137 dev_info_t *dip = ih_p->ih_dip; in pcmu_intr_wrapper()
174 ih_t *ih_p; in pcmu_add_intr() local
234 ih_p->ih_handler_arg1, ih_p->ih_handler_arg2); in pcmu_add_intr()
264 if (ih_p->ih_config_handle) in pcmu_add_intr()
267 kmem_free(ih_p, sizeof (ih_t)); in pcmu_add_intr()
[all …]
H A Dpcmu_ib.c456 ih_p->ih_next = ih_p; in pcmu_ib_new_ino()
457 ino_p->pino_ih_head = ih_p; in pcmu_ib_new_ino()
458 ino_p->pino_ih_tail = ih_p; in pcmu_ib_new_ino()
459 ino_p->pino_ih_start = ih_p; in pcmu_ib_new_ino()
551 ino_p->pino_ih_tail = ih_p; in pcmu_ib_ino_add_intr()
639 if (ih_lst != ih_p) in pcmu_ib_ino_rem_intr()
711 ih_t *ih_p; in pcmu_ib_alloc_ih() local
714 ih_p->ih_dip = rdip; in pcmu_ib_alloc_ih()
715 ih_p->ih_inum = inum; in pcmu_ib_alloc_ih()
721 return (ih_p); in pcmu_ib_alloc_ih()
[all …]
/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpci_intr.c257 for (i = 0; i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) in pci_spurintr()
259 ih_p->ih_inum); in pci_spurintr()
299 for (i = 0; i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) { in pci_intr_wrapper()
405 ih_t *ih_p = ksp->ks_private; in pci_ks_update() local
456 ih_t *ih_p; in pci_add_intr() local
559 ih_p->ih_handler_arg1, ih_p->ih_handler_arg2); in pci_add_intr()
587 ih_p->ih_ipil_p = ipil_p; in pci_add_intr()
593 if (ih_p->ih_ksp != NULL) { in pci_add_intr()
597 ih_p->ih_ksp->ks_private = ih_p; in pci_add_intr()
599 kstat_install(ih_p->ih_ksp); in pci_add_intr()
[all …]
H A Dpci_ib.c531 ih_p->ih_next = ih_p; in ib_new_ino_pil()
791 for (i = 0; i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) { in ib_intr_locate_ih()
792 if (ih_p->ih_dip == rdip && ih_p->ih_inum == inum) in ib_intr_locate_ih()
793 return (ih_p); in ib_intr_locate_ih()
806 ih_t *ih_p; in ib_alloc_ih() local
820 return (ih_p); in ib_alloc_ih()
831 ih_t *ih_p; in ib_update_intr_state() local
997 ih_t *ih_p; in ib_get_ino_devs() local
1010 i++, j++, ih_p = ih_p->ih_next) { in ib_get_ino_devs()
1032 ih_t *ih_p; in ib_log_new_cpu() local
[all …]
/illumos-gate/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c252 niumx_ih_t *ih_p; in niumx_attach() local
920 niumx_ih_t *ih_p; in niumx_set_intr() local
936 ih_p->ih_inum, ih_p->ih_sysino); in niumx_set_intr()
955 niumx_ih_t *ih_p; in niumx_get_intr_target() local
985 niumx_ih_t *ih_p; in niumx_set_intr_target() local
1051 niumx_ih_t *ih_p; in niumx_add_intr() local
1096 hdlp->ih_vector, ih_p->ih_inum, ih_p->ih_sysino); in niumx_add_intr()
1108 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, ih_p->ih_hdlr, ih_p->ih_arg1, in niumx_add_intr()
1195 ih_p->ih_hdlr, caddr_t, ih_p->ih_arg1, caddr_t, ih_p->ih_arg2); in niumx_intr_hdlr()
1197 r = (*ih_p->ih_hdlr)(ih_p->ih_arg1, ih_p->ih_arg2); in niumx_intr_hdlr()
[all …]
/illumos-gate/usr/src/uts/i86pc/io/pci/
H A Dpci_kstats.c77 ddi_intr_handle_impl_t tmp_hdl, *ih_p = private_data->hdlp; in pci_ih_ks_update() local
78 dev_info_t *dip = ih_p->ih_dip; in pci_ih_ks_update()
104 bcopy(ih_p, &tmp_hdl, sizeof (ddi_intr_handle_impl_t)); in pci_ih_ks_update()
110 if ((ih_p->ih_state != DDI_IHDL_STATE_ENABLE) || in pci_ih_ks_update()
134 switch (ih_p->ih_type) { in pci_ih_ks_update()
145 pci_ks_template.ihks_pil.value.ui64 = ih_p->ih_pri; in pci_ih_ks_update()
147 ((ihdl_plat_t *)ih_p->ih_private)->ip_ticks; in pci_ih_ks_update()
149 pci_ks_template.ihks_cookie.value.ui64 = ih_p->ih_vector; in pci_ih_ks_update()
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Dpci_ib.h199 ih_t *ih_p);
203 extern void ib_ino_add_intr(pci_t *pci_p, ib_ino_pil_t *ipil_p, ih_t *ih_p);
204 extern void ib_ino_rem_intr(pci_t *pci_p, ib_ino_pil_t *ipil_p, ih_t *ih_p);
210 extern void ib_free_ih(ih_t *ih_p);
221 extern void ib_cpu_ticks_to_ih_nsec(ib_t *ib_p, ih_t *ih_p, uint32_t cpu_id);
/illumos-gate/usr/src/uts/sun4u/opl/sys/pcicmu/
H A Dpcmu_ib.h150 pcmu_ib_ino_t ino_num, ih_t *ih_p);
156 pcmu_ib_ino_info_t *ino_p, ih_t *ih_p);
158 pcmu_ib_ino_info_t *ino_p, ih_t *ih_p);