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Searched refs:gt_irq_mask (Results 1 – 3 of 3) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_ringbuffer.c841 dev_priv->gt_irq_mask &= ~ring->irq_enable_mask; in gen5_ring_get_irq()
842 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in gen5_ring_get_irq()
859 dev_priv->gt_irq_mask |= ring->irq_enable_mask; in gen5_ring_put_irq()
860 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in gen5_ring_put_irq()
1045 dev_priv->gt_irq_mask &= ~ring->irq_enable_mask; in gen6_ring_get_irq()
1046 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in gen6_ring_get_irq()
1068 dev_priv->gt_irq_mask |= ring->irq_enable_mask; in gen6_ring_put_irq()
1069 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in gen6_ring_put_irq()
H A Di915_irq.c750 dev_priv->gt_irq_mask &= ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT; in ivybridge_parity_work()
751 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in ivybridge_parity_work()
769 dev_priv->gt_irq_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT; in ivybridge_handle_parity_error()
770 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in ivybridge_handle_parity_error()
2705 dev_priv->gt_irq_mask = ~0; in ironlake_irq_postinstall()
2708 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in ironlake_irq_postinstall()
2766 dev_priv->gt_irq_mask = ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT; in ivybridge_irq_postinstall()
2769 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in ivybridge_irq_postinstall()
2836 I915_WRITE(GTIMR, dev_priv->gt_irq_mask); in valleyview_irq_postinstall()
H A Di915_drv.h1058 u32 gt_irq_mask; member