Home
last modified time | relevance | path

Searched refs:control (Results 126 – 150 of 287) sorted by relevance

12345678910>>...12

/illumos-gate/usr/src/cmd/ast/libast/sparc/FEATURE/
H A Dtty116 /* set ECHOCTL if driver can echo control charaters as ^c */
/illumos-gate/usr/src/cmd/ast/libast/amd64/FEATURE/
H A Dtty116 /* set ECHOCTL if driver can echo control charaters as ^c */
/illumos-gate/usr/src/cmd/ast/libast/i386/FEATURE/
H A Dtty116 /* set ECHOCTL if driver can echo control charaters as ^c */
/illumos-gate/usr/src/cmd/ast/libast/sparcv9/FEATURE/
H A Dtty116 /* set ECHOCTL if driver can echo control charaters as ^c */
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_hio.c2571 nxge_ldgv_t *control; in nxge_hio_rxdma_bind_intr() local
2585 control = nxge->ldgvp; in nxge_hio_rxdma_bind_intr()
2586 if (control == NULL) { in nxge_hio_rxdma_bind_intr()
2590 group = &control->ldgp[dc->ldg.vector]; in nxge_hio_rxdma_bind_intr()
2591 device = &control->ldvp[dc->ldg.ldsv]; in nxge_hio_rxdma_bind_intr()
H A Dnxge_main.c2455 nxge_dma_common_t **control; in nxge_alloc_rxb() local
2487 control = &nxgep->rx_cntl_pool_p->dma_buf_pool_p[channel]; in nxge_alloc_rxb()
2492 nxge_free_rx_cntl_dma(nxgep, *control); in nxge_alloc_rxb()
2510 nxge_dma_common_t *control; in nxge_free_rxb() local
2522 control = nxgep->rx_cntl_pool_p->dma_buf_pool_p[channel]; in nxge_free_rxb()
2523 nxge_free_rx_cntl_dma(nxgep, control); in nxge_free_rxb()
2528 KMEM_FREE(control, sizeof (nxge_dma_common_t)); in nxge_free_rxb()
2964 nxge_dma_common_t *control; in nxge_free_txb() local
2976 control = nxgep->tx_cntl_pool_p->dma_buf_pool_p[channel]; in nxge_free_txb()
2977 nxge_free_tx_cntl_dma(nxgep, control); in nxge_free_txb()
[all …]
/illumos-gate/usr/src/common/smbsrv/
H A Dsmb_token_xdr.c246 if (!xdr_uint32_t(xdrs, &objp->control)) in smb_privset_xdr()
/illumos-gate/usr/src/uts/intel/io/vmm/amd/
H A Damdvi_priv.h202 uint16_t control :13; member
H A Damdvi_hw.c478 if ((ctrl->control & AMDVI_CTRL_EN) == 0) in amdvi_wait()
1336 ctrl->control = val; in amdvi_enable()
1353 ctrl->control = 0; in amdvi_disable()
/illumos-gate/usr/src/uts/common/io/iwk/
H A Diwk_hw.h2383 uint16_t control; member
2871 uint16_t control; member
2943 uint8_t control; member
/illumos-gate/usr/src/cmd/lp/model/
H A Dtsol_netstandard184 # the fourth (copies) is used to control the number of copies to print,
424 # sets default value for ordering of data and control files with
426 # may set to control file first with lpadmin -o bsdctrl=first
H A Dtsol_netstandard_foomatic186 # the fourth (copies) is used to control the number of copies to print,
442 # sets default value for ordering of data and control files with
444 # may set to control file first with lpadmin -o bsdctrl=first
H A Dstandard332 # the fourth (copies) is used to control the number of copies to print,
608 # estty # for printer needing hardware flow control (3B2/EPORTS)
609 # fctty # for printer needing hardware flow control (3B15,3B20)
660 # in the control sequences for carriage return and form-feed.
663 # in the control sequence for doing a newline (move to beginning
H A Dtsol_standard343 # the fourth (copies) is used to control the number of copies to print,
624 # estty # for printer needing hardware flow control (3B2/EPORTS)
625 # fctty # for printer needing hardware flow control (3B15,3B20)
676 # in the control sequences for carriage return and form-feed.
679 # in the control sequence for doing a newline (move to beginning
/illumos-gate/usr/src/uts/common/io/bge/
H A Dbge_main2.c1565 if ((rulep[i].control & RECV_RULE_CTL_ENABLE) == 0 &&
1566 (rulep[i+1].control & RECV_RULE_CTL_ENABLE) == 0)
1573 rulep[i].control = RULE_DEST_MAC_1(ring) | RECV_RULE_CTL_AND;
1575 bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i), rulep[i].control);
1579 rulep[i+1].control = RULE_DEST_MAC_2(ring);
1581 bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i+1), rulep[i+1].control);
1636 rulep[start].control = 0;
1638 bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(start), rulep[start].control);
1641 rulep[start].control = 0;
1643 bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(start), rulep[start].control);
/illumos-gate/usr/src/cmd/troff/
H A Dn3.c80 control(i, 1); in caseig()
245 control(req, 1); in casede()
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/hsi_repository/
H A Dcommon_hsi.h1281 __le16 control; member
1324 __le32 control; member
/illumos-gate/usr/src/uts/common/io/
H A Dgldutil.c77 snaphdr->control == CNTL_LLC_UI && \
1767 if (snaphdr->control != CNTL_LLC_UI) in gld_rcc_receive()
1850 nsnaphdr->control = CNTL_LLC_UI; in gld_send_rqr()
1951 if ((snaphdr->control & 0xef) == 0xe3) { in gld_rcc_send()
2024 nsnaphdr->control = CNTL_LLC_UI; in gld_rde_pdu_req()
/illumos-gate/usr/src/cmd/cmd-inet/etc/ike/
H A Dconfig.sample117 remote_id "" # Take any, use remote_addr for access control.
/illumos-gate/usr/src/uts/common/io/cxgbe/firmware/
H A Dt6fw_cfg.txt122 # filter control: compact, fcoemask
204 #enable bottleneck-bw congestion control mode
559 # folling params control how the buffer memory is distributed and the L2 flow
560 # control settings:
/illumos-gate/usr/src/cmd/filesync/
H A DREADME327 main.c setup and control
335 Gross calling structure / flow of control
387 found). Others are more subtle and control the evaluation
/illumos-gate/usr/src/cmd/hal/
H A DLICENSE44 …controls, is controlled by, or is under common control with you. For purposes of this definition, …
/illumos-gate/usr/src/uts/sun4u/cpu/
H A Dus3_jalapeno_asm.S743 ldxa [%g0]ASI_MCU_CTRL, %o0 ! MCU control reg1 is at offset 0
750 stxa %o0, [%g0]ASI_MCU_CTRL ! MCU control reg1 is at offset 0
/illumos-gate/usr/src/uts/common/io/vr/
H A Dvr.h340 uint16_t control; member
/illumos-gate/usr/src/cmd/lp/filter/postscript/postio/
H A DREADME29 and runs in a mode that can help if flow control doesn't appear to be working

12345678910>>...12