Searched refs:cfghdl (Results 1 – 3 of 3) sorted by relevance
/illumos-gate/usr/src/uts/sun4v/io/ |
H A D | cnex.c | 367 rv = hvldc_intr_getvalid(ssp->cfghdl, iinfo->ino, &intr_state); in cnex_intr_new_cpu() 390 (void) hvldc_intr_setvalid(ssp->cfghdl, iinfo->ino, in cnex_intr_new_cpu() 421 rv = hvldc_intr_getstate(ssp->cfghdl, iinfo->ino, &intr_state); in cnex_intr_dis_wait() 713 rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino, in cnex_add_intr() 849 rv = hvldc_intr_setvalid(cnex_ssp->cfghdl, in cnex_rem_intr() 952 rv = hvldc_intr_setstate(cnex_ssp->cfghdl, iinfo->ino, in cnex_clr_intr() 1046 cnex_ssp->cfghdl = SUN4V_REG_SPEC2CFG_HDL(reg_p->physaddr); in cnex_attach() 1049 D1("cnex_attach: cfghdl=0x%llx\n", cnex_ssp->cfghdl); in cnex_attach() 1298 uint64_t cfghdl; in cnex_find_chan_dip() local 1332 " property value = 0x%x\n", chan_id, cfghdl); in cnex_find_chan_dip() [all …]
|
/illumos-gate/usr/src/uts/intel/io/mc-amd/ |
H A D | mcamd_drv.c | 167 r1[i] = mc_pcicfg_get32(cfghdl, r1addr); in mc_prop_read_pair() 169 r2[i] = mc_pcicfg_get32(cfghdl, r2addr); in mc_prop_read_pair() 649 mc_mkprops_htcfg(mc_pcicfg_hdl_t cfghdl, mc_t *mc) in mc_mkprops_htcfg() argument 656 mc_pcicfg_get32(cfghdl, MC_HT_REG_NODEID); in mc_mkprops_htcfg() 679 mc_mkprops_addrmap(mc_pcicfg_hdl_t cfghdl, mc_t *mc) in mc_mkprops_addrmap() argument 716 mc_pcicfg_get32(cfghdl, MC_AM_REG_HOLEADDR); in mc_mkprops_addrmap() 826 mc_pcicfg_get32(cfghdl, MC_DC_REG_DRAMMISC); in mc_mkprops_dramctl() 861 mc_prop_read_pair(cfghdl, in mc_mkprops_dramctl() 1535 mc_pcicfg_hdl_t cfghdl; in mc_attach() local 1641 bm->bm_mkprops(cfghdl, mc); in mc_attach() [all …]
|
/illumos-gate/usr/src/uts/sun4v/sys/ |
H A D | cnex.h | 94 uint64_t cfghdl; /* cnex config handle */ member
|