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Searched refs:_3D_CHICKEN2_WM_READ_PIPELINED (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c3992 _3D_CHICKEN2_WM_READ_PIPELINED << 16 | in ironlake_init_clock_gating()
3993 _3D_CHICKEN2_WM_READ_PIPELINED); in ironlake_init_clock_gating()
H A Di915_reg.h787 # define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14) macro