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Searched refs:WM0_PIPEC_IVB (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c2021 val = I915_READ(WM0_PIPEC_IVB); in ivybridge_update_wm()
2023 I915_WRITE(WM0_PIPEC_IVB, val | in ivybridge_update_wm()
2527 previous.wm_pipe[2] = I915_READ(WM0_PIPEC_IVB); in hsw_write_wm_values()
2567 I915_WRITE(WM0_PIPEC_IVB, results->wm_pipe[2]); in hsw_write_wm_values()
2752 reg = WM0_PIPEC_IVB; in sandybridge_update_sprite_wm()
H A Di915_reg.h3180 #define WM0_PIPEC_IVB 0x45200 macro