Searched refs:V_MI0_CLK_DIV (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/chxge/com/
H A D	fpga_defs.h	78 #define V_MI0_CLK_DIV(x) ((x) << S_MI0_CLK_DIV) macro
H A D	ch_subr.c	268 t1_write_reg_4(adapter, A_MI0_CLK, V_MI0_CLK_DIV(3)); in fpga_mdio_init()

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