Home
last modified time | relevance | path

Searched refs:VIDEO_DIP_ENABLE (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_hdmi.c150 if (!(val & VIDEO_DIP_ENABLE)) in g4x_write_infoframe()
190 if (!(val & VIDEO_DIP_ENABLE)) in ibx_write_infoframe()
230 if (!(val & VIDEO_DIP_ENABLE)) in cpt_write_infoframe()
411 val &= ~VIDEO_DIP_ENABLE; in g4x_set_infoframes()
431 val &= ~VIDEO_DIP_ENABLE; in g4x_set_infoframes()
439 val |= VIDEO_DIP_ENABLE; in g4x_set_infoframes()
468 val &= ~VIDEO_DIP_ENABLE; in ibx_set_infoframes()
491 val &= ~VIDEO_DIP_ENABLE; in ibx_set_infoframes()
499 val |= VIDEO_DIP_ENABLE; in ibx_set_infoframes()
562 val &= ~VIDEO_DIP_ENABLE; in vlv_set_infoframes()
[all …]
H A Di915_reg.h2143 #define VIDEO_DIP_ENABLE (1UL << 31) macro