Searched refs:REG_PIO_WRITE64 (Results 1 – 6 of 6) sorted by relevance
/illumos-gate/usr/src/uts/common/io/nxge/npi/ |
H A D | npi_fflp.c | 675 REG_PIO_WRITE64(handle, addr_reg, addr.value); in npi_fflp_fcram_entry_write() 769 REG_PIO_WRITE64(handle, addr_reg, addr.value); in npi_fflp_fcram_entry_read() 818 REG_PIO_WRITE64(handle, addr_reg, addr.value); in npi_fflp_fcram_entry_invalidate() 822 REG_PIO_WRITE64(handle, data_reg, hdr.value); in npi_fflp_fcram_entry_invalidate() 883 REG_PIO_WRITE64(handle, data_reg, data); in npi_fflp_fcram_subarea_write() 986 REG_PIO_WRITE64(handle, offset, sel.value); in npi_fflp_cfg_fcram_partition() 1060 REG_PIO_WRITE64(handle, offset, sel.value); in npi_fflp_cfg_fcram_partition_disable() 1605 REG_PIO_WRITE64(handle, offset, cfg.value); in npi_fflp_cfg_enet_vlan_table_assoc() 1691 REG_PIO_WRITE64(handle, offset, cfg.value); in npi_fflp_cfg_enet_vlan_table_set_pri() 1728 REG_PIO_WRITE64(handle, offset, clear); in npi_fflp_cfg_vlan_table_clear() [all …]
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/illumos-gate/usr/src/uts/common/io/hxge/ |
H A D | hpi_pfc.c | 441 REG_PIO_WRITE64(handle, offset, addr.value); in hpi_pfc_set_mac_address() 462 REG_PIO_WRITE64(handle, offset, zaddr); in hpi_pfc_clear_mac_address() 463 REG_PIO_WRITE64(handle, moffset, zmask); in hpi_pfc_clear_mac_address() 477 REG_PIO_WRITE64(handle, offset, 0ULL); in hpi_pfc_clear_multicast_hash_table() 492 REG_PIO_WRITE64(handle, offset, address); in hpi_pfc_set_multicast_hash_table() 690 REG_PIO_WRITE64(handle, offset, tcp.value); in hpi_pfc_set_tcp_control_discard() 711 REG_PIO_WRITE64(handle, offset, tcp.value); in hpi_pfc_set_tcp_control_fin() 731 REG_PIO_WRITE64(handle, offset, tcp.value); in hpi_pfc_set_tcp_control_syn() 751 REG_PIO_WRITE64(handle, offset, tcp.value); in hpi_pfc_set_tcp_control_rst() 771 REG_PIO_WRITE64(handle, offset, tcp.value); in hpi_pfc_set_tcp_control_psh() [all …]
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H A D | hxge_pfc.h | 48 #define REG_PIO_WRITE64(handle, offset, value) \ macro 61 REG_PIO_WRITE64(handle, PFC_TCAM_CTRL, ctl) 67 REG_PIO_WRITE64(handle, PFC_TCAM_KEY0, key) 69 REG_PIO_WRITE64(handle, PFC_TCAM_KEY1, key) 71 REG_PIO_WRITE64(handle, PFC_TCAM_MASK0, mask) 73 REG_PIO_WRITE64(handle, PFC_TCAM_MASK1, mask)
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H A D | hpi_vmac.c | 251 REG_PIO_WRITE64(handle, offset, HXGE_VMAC_RX_STAT_CLEAR); in hpi_vmac_clear_rx_int_stat() 262 REG_PIO_WRITE64(handle, offset, HXGE_VMAC_TX_STAT_CLEAR); in hpi_vmac_clear_tx_int_stat() 281 REG_PIO_WRITE64(handle, offset, value); in hpi_pfc_set_rx_int_stat_mask() 302 REG_PIO_WRITE64(handle, offset, value); in hpi_pfc_set_tx_int_stat_mask()
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H A D | hxge_pfc.c | 891 REG_PIO_WRITE64(handle, offset, vlanid_group); in hxge_pfc_update_hw()
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/illumos-gate/usr/src/uts/common/sys/nxge/ |
H A D | nxge_fflp_hw.h | 1095 #define REG_PIO_WRITE64(handle, offset, value) \ macro 1102 REG_PIO_WRITE64(handle, FFLP_TCAM_CTL_REG, ctl) 1109 REG_PIO_WRITE64(handle, FFLP_TCAM_KEY_0_REG, key) 1111 REG_PIO_WRITE64(handle, FFLP_TCAM_KEY_1_REG, key) 1113 REG_PIO_WRITE64(handle, FFLP_TCAM_KEY_2_REG, key) 1115 REG_PIO_WRITE64(handle, FFLP_TCAM_KEY_3_REG, key) 1117 REG_PIO_WRITE64(handle, FFLP_TCAM_MASK_0_REG, mask) 1119 REG_PIO_WRITE64(handle, FFLP_TCAM_MASK_1_REG, mask) 1121 REG_PIO_WRITE64(handle, FFLP_TCAM_MASK_2_REG, mask) 1123 REG_PIO_WRITE64(handle, FFLP_TCAM_MASK_3_REG, mask)
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