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Searched refs:PIPE_VBLANK_INTERRUPT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_irq.c2166 PIPE_VBLANK_INTERRUPT_ENABLE); in i915_enable_vblank()
2244 PIPE_VBLANK_INTERRUPT_ENABLE | in i915_disable_vblank()
H A Di915_reg.h3029 #define PIPE_VBLANK_INTERRUPT_ENABLE (1UL<<17) macro