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Searched refs:PIPE_FIFO_UNDERRUN_STATUS (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_irq.c949 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in valleyview_irq_handler()
3018 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i8xx_irq_handler()
3189 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i915_irq_handler()
3424 if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS) in i965_irq_handler()
H A Di915_reg.h3013 #define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31) macro