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Searched refs:PIPECONF_INTERLACE_MASK (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h2982 #define PIPECONF_INTERLACE_MASK (7 << 21) macro
H A Dintel_display.c1507 if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK) in ironlake_enable_pch_transcoder()
4771 if (I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_INTERLACE_MASK) { in intel_get_pipe_timings()