| /illumos-gate/usr/src/uts/sun4u/sys/pci/ |
| H A D | db21554_config.h | 54 #define DB_PCONF_DS_UMEM3 PCI_CONF_BASE5
68 #define DB_SCONF_DS_UMEM3 DB_PCONF_PRI_HDR_OFF+PCI_CONF_BASE5
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| /illumos-gate/usr/src/uts/common/os/ |
| H A D | sunpci.c | 426 chsp->chs_base5 = pci_config_get32(confhdl, PCI_CONF_BASE5);
780 pci_config_put32(confhdl, PCI_CONF_BASE5, chs_p->chs_base5);
802 (void) pci_config_get32(confhdl, PCI_CONF_BASE5);
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| /illumos-gate/usr/src/uts/sun4/io/px/ |
| H A D | px_tools.c | 62 PCI_CONF_BASE5,
577 if (cfg_prg.offset >= PCI_CONF_BASE5) { in pxtool_get_bar()
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| /illumos-gate/usr/src/uts/common/io/igb/ |
| H A D | igb_debug.c | 117 pci_config_get32(handle, PCI_CONF_BASE5)); in pci_dump()
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| /illumos-gate/usr/src/uts/sun4u/io/pci/ |
| H A D | pci_tools.c | 95 PCI_CONF_BASE5,
786 if (bar_offset >= PCI_CONF_BASE5) { in pcitool_get_bar()
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| H A D | db21554.c | 1638 ph->bar5 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE5); in db_pci_get_header()
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| /illumos-gate/usr/src/uts/i86pc/io/pci/ |
| H A D | pci_tools.c | 78 PCI_CONF_BASE5,
1109 if (prg2.offset >= PCI_CONF_BASE5) { in pcitool_dev_reg_ops()
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| /illumos-gate/usr/src/uts/common/io/ixgbe/ |
| H A D | ixgbe_debug.c | 242 pci_config_get32(handle, PCI_CONF_BASE5)); in ixgbe_pci_dump()
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| /illumos-gate/usr/src/uts/common/io/e1000g/ |
| H A D | e1000g_debug.c | 423 pciconfig_bar(Adapter, PCI_CONF_BASE5, "PCI_CONF_BASE5"); in pciconfig_dump()
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| H A D | e1000g_main.c | 749 offset <= PCI_CONF_BASE5; offset += 4) { in e1000g_regs_map()
1219 (bar_offset <= PCI_CONF_BASE5)); in e1000g_get_bar_info()
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| /illumos-gate/usr/src/uts/common/sys/ |
| H A D | pci.h | 59 #define PCI_CONF_BASE5 0x24 /* base register 5, 4 bytes */ macro
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| /illumos-gate/usr/src/uts/sun4/io/ |
| H A D | pcicfg.c | 470 pci_config_get32(config_handle, PCI_CONF_BASE5)); in pcicfg_dump_device_config()
2935 if ((PCI_REG_REG_G(assigned[i].pci_phys_hi) > PCI_CONF_BASE5) && in pcicfg_free_device_resources()
4208 while (i <= PCI_CONF_BASE5) { in pcicfg_populate_reg_props()
4796 while (i <= PCI_CONF_BASE5) { in pcicfg_populate_props_from_bar()
6024 for (i = PCI_CONF_BASE0; i <= PCI_CONF_BASE5; ) { in pcicfg_fcode_assign_bars()
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| /illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/ |
| H A D | pcicfg.c | 439 pci_config_get32(config_handle, PCI_CONF_BASE5)); in pcicfg_dump_device_config()
3592 while (i <= PCI_CONF_BASE5) { in pcicfg_populate_reg_props()
3674 while (i <= PCI_CONF_BASE5) { in pcicfg_populate_props_from_bar()
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| /illumos-gate/usr/src/cmd/pcitool/ |
| H A D | pcitool.c | 280 { PCI_CONF_BASE5, 4, "BAR5", "Base Address Register 5 (@24)" },
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| /illumos-gate/usr/src/uts/intel/io/vmm/io/ |
| H A D | ppt.c | 149 (b) <= PCI_CONF_BASE5 && \
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| /illumos-gate/usr/src/uts/common/io/cardbus/ |
| H A D | cardbus_cfg.c | 2952 while (i <= PCI_CONF_BASE5) { in cardbus_probe_children()
4359 pci_config_get32(config_handle, PCI_CONF_BASE5));
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| /illumos-gate/usr/src/uts/common/io/scsi/adapters/pvscsi/ |
| H A D | pvscsi.c | 843 for (offset = PCI_CONF_BASE0; offset <= PCI_CONF_BASE5; offset += 4) { in pvscsi_setup_io()
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| /illumos-gate/usr/src/uts/common/io/scsi/adapters/pmcs/ |
| H A D | pmcs_fwlog.c | 761 pci_config_get32(pwp->pci_acc_handle, PCI_CONF_BASE5)); in pmcs_dump_pcie_conf()
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| /illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/ |
| H A D | ql_api.c | 16351 chs.chs_base5 = ql_pci_config_get32(ha, PCI_CONF_BASE5); in ql_save_config_regs()
16416 ql_pci_config_put32(ha, PCI_CONF_BASE5, chs_p->chs_base5); in ql_restore_config_regs()
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| /illumos-gate/usr/src/uts/common/io/comstar/port/qlt/ |
| H A D | qlt.c | 530 w32h = PCICFG_RD32(qlt, PCI_CONF_BASE5); in qlt_attach()
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