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Searched refs:PCH_DREF_CONTROL (Results 1 – 3 of 3) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_ums.c111 dev_priv->regfile.savePCH_DREF_CONTROL = I915_READ(PCH_DREF_CONTROL); in i915_save_display_reg()
336 I915_WRITE(PCH_DREF_CONTROL, dev_priv->regfile.savePCH_DREF_CONTROL); in i915_restore_display_reg()
H A Dintel_display.c1164 val = I915_READ(PCH_DREF_CONTROL); in assert_pch_refclk_enabled()
5069 val = I915_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
5127 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
5128 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
5144 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
5145 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
5155 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
5156 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
5166 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
5167 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
H A Di915_reg.h4038 #define PCH_DREF_CONTROL 0xC6200 macro